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Reel/Frame:022920/0866   Pages: 10
Recorded: 07/07/2009
Attorney Dkt #:5649-2544
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
02/21/2012
Application #:
12498528
Filing Dt:
07/07/2009
Publication #:
Pub Dt:
05/06/2010
Title:
METHODS OF FORMING INTEGRATED CIRCUIT DEVICES HAVING VERTICAL SEMICONDUCTOR INTERCONNECTS AND DIODES THEREIN AND DEVICES FORMED THEREBY
Assignors
1
Exec Dt:
04/28/2009
2
Exec Dt:
04/28/2009
3
Exec Dt:
04/28/2009
4
Exec Dt:
04/28/2009
5
Exec Dt:
04/28/2009
6
Exec Dt:
04/28/2009
7
Exec Dt:
04/29/2009
Assignee
1
416 MAETAN-DONG, YEONGTONG-GU
SUWON-SI
GYEONGGI-DO, KOREA, REPUBLIC OF
Correspondence name and address
MYERS BIGEL SIBLEY & SAJOVEC
PO BOX 37428
RALEIGH, NC 27627

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