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Total properties:
39
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Patent #:
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Issue Dt:
|
08/04/1992
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Application #:
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07742605
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Filing Dt:
|
08/08/1991
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Title:
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INPUT/OUTPUT MACROCELL FOR PROGRAMMABLE LOGIC DEVICE
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Patent #:
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Issue Dt:
|
11/05/1996
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Application #:
|
08219142
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Filing Dt:
|
03/29/1994
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Title:
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METHOD AND APPARATUS FOR CONTROLLING EXTENDED MEMORY CHIPS IN A RANDOM BLOCK ACCESS OPERATION
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Patent #:
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|
Issue Dt:
|
02/24/1998
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Application #:
|
08495876
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Filing Dt:
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06/28/1995
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Title:
|
FONT ROM CONTROL CIRCUIT FOR ON-SCREEN DISPLAY
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Patent #:
|
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Issue Dt:
|
12/24/1996
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Application #:
|
08499087
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Filing Dt:
|
07/06/1995
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Title:
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FIRST-IN FIRST-OUT BUFFER MEMORY
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Patent #:
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Issue Dt:
|
12/09/1997
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Application #:
|
08525881
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Filing Dt:
|
09/08/1995
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Title:
|
MEMORY MANAGEMENT UNIT WITH ADDRESS TRANSLATION FUNCTION
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Patent #:
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|
Issue Dt:
|
03/18/1997
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Application #:
|
08529964
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Filing Dt:
|
09/19/1995
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Title:
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AUTOMATIC DATA TRANSMISSION RATE DETECTION CIRCUIT
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Patent #:
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Issue Dt:
|
12/30/1997
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Application #:
|
08540169
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Filing Dt:
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10/06/1995
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Title:
|
APPARATUS OF TESTING PROGRAM MEMORY FOR ONE-CHIP MICROCOMPUTER AND METHOD THEREFOR
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/20/1998
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Application #:
|
08574478
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Filing Dt:
|
12/19/1995
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Title:
|
INPUT/OUTPUT DEVICE WITH SELF-TEST CAPABILITY IN AN INTEGRATED CIRCUIT
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|
|
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Patent #:
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|
Issue Dt:
|
06/16/1998
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Application #:
|
08658424
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Filing Dt:
|
06/05/1996
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Title:
|
METHOD AND APPARATUS FOR BI-DIRECTIONAL TRANSFER OF DATA BETWEEN TWO BUSES WITH DIFFERENT WIDTHS
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|
|
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Patent #:
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Issue Dt:
|
06/30/1998
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Application #:
|
08730900
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Filing Dt:
|
10/18/1996
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|
Title:
|
CONTROL DEVICE AND METHOD FOR VARIABLY CONTROLLING AN OPERATION TIME OF AN OPERATION APPARATUS
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|
|
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Patent #:
|
|
Issue Dt:
|
09/01/1998
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Application #:
|
08905955
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Filing Dt:
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08/05/1997
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Title:
|
BURN-IN CHECKING APPARATUS FOR SEMICONDUCTOR MEMORY DEBVICE
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|
|
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Patent #:
|
|
Issue Dt:
|
04/24/2001
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Application #:
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08931754
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Filing Dt:
|
09/16/1997
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Title:
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DEVICE AND METHOD FOR GENERATING INTERRUPT
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|
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Patent #:
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|
Issue Dt:
|
06/20/2000
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Application #:
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08964113
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Filing Dt:
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11/05/1997
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Title:
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APPARATUS FOR EXECUTING A LOAD INSTRUCTION OR EXCHANGE INSTRUCTION IN PARALLEL WITH OTHER INSTRUCTIONS IN A DUAL PIPELINED PROCESSOR
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|
|
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Patent #:
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|
Issue Dt:
|
03/28/2000
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Application #:
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08964867
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Filing Dt:
|
11/05/1997
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Title:
|
BRANCH PREDICTION APPARATUS HAVING BRANCH TARGET BUFFER FOR EFFECTIVELY PROCESSING BRANCH INSTRUCTION
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|
|
|
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Patent #:
|
|
Issue Dt:
|
01/04/2000
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Application #:
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08964903
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Filing Dt:
|
11/05/1997
|
|
Title:
|
HIGH SPEED TRANSLATION LOOKASIDE BUFFER EMPLOYING CONTENT ADDRESS MEMORY
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|
|
|
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Patent #:
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|
Issue Dt:
|
03/14/2000
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Application #:
|
08968039
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Filing Dt:
|
11/12/1997
|
|
Title:
|
LOOP BACK TEST APPARATUS FOR SMALL COMPUTER SYSTEM INTERFACE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/12/2002
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Application #:
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09021939
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Filing Dt:
|
02/11/1998
|
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Title:
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SERIAL DATA TRANSMISSION APPARATUS AND METHOD WITH A DATA CHECKING FEATURE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/30/2001
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Application #:
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09031200
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Filing Dt:
|
02/26/1998
|
|
Title:
|
BUS ARBITRATION SYSTEM HAVING BOTH ROUND ROBIN AND DAISY CHAIN ARBITERS
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|
|
|
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Patent #:
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|
Issue Dt:
|
03/20/2001
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Application #:
|
09073968
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Filing Dt:
|
05/07/1998
|
|
Title:
|
ADDRESS TRANSLATION UNIT SUPPORTING VARIABLE PAGE SIZES
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|
|
|
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Patent #:
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|
Issue Dt:
|
11/21/2000
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Application #:
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09074601
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Filing Dt:
|
05/08/1998
|
|
Title:
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APPARATUS AND METHOD FOR CONVERTING FLOATING POINT NUMBER INTO INTEGER IN FLOATING POINT UNIT
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|
|
|
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Patent #:
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|
Issue Dt:
|
11/07/2000
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Application #:
|
09082586
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Filing Dt:
|
04/21/1998
|
|
Title:
|
METHOD AND APPARATUS FOR PERFORMING MULTIPLY OPERATION OF FLOATING POINT DATA IN 2-CYCLE PIPELINE SCHEME
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|
|
|
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Patent #:
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|
Issue Dt:
|
10/23/2001
|
Application #:
|
09104542
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Filing Dt:
|
06/26/1998
|
|
Title:
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APPARATUS FOR ADAPTIVELY CONTROLLING A PREFETCH QUEUE BASED ON VARIOUS FLUSH CONDITIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2000
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Application #:
|
09104543
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Filing Dt:
|
06/26/1998
|
|
Title:
|
BUS ARBITRATOR WITH A HIERARCHICAL CONTROL STRUCTURE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/24/2000
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Application #:
|
09107418
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Filing Dt:
|
06/30/1998
|
|
Title:
|
HIGH-PERFORMANCE LRU MEMORY CAPABLE OF SUPPORTING MULTIPLE PORTS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
09126599
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Filing Dt:
|
07/31/1998
|
|
Title:
|
A TRANSMISSION POWER CONTROL SYSTEM AND METHOD FOR A MOBILE STATION
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|
|
|
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Patent #:
|
|
Issue Dt:
|
11/07/2000
|
Application #:
|
09143346
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Filing Dt:
|
08/28/1998
|
|
Title:
|
SERIES REED-SOLOMON DECODER SYNCHRONIZED WITH BIT CLOCK SIGNAL
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2001
|
Application #:
|
09168068
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Filing Dt:
|
10/08/1998
|
|
Title:
|
MULTITHREADED DATA PROCESSING METHOD WITH LONG LATENCY SUBINSTRUCTIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2001
|
Application #:
|
09200935
|
Filing Dt:
|
11/30/1998
|
|
Title:
|
INTERFACE UNIT FOR SERIAL-TO-PARALLEL CONVERSION AND/OR PARALLEL-TO-SERIAL CONVERSION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2001
|
Application #:
|
09221873
|
Filing Dt:
|
12/29/1998
|
|
Title:
|
VERIFICATION METHOD BY MEANS OF COMPARING INTERNAL STATE TRACES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2002
|
Application #:
|
09223388
|
Filing Dt:
|
12/30/1998
|
|
Title:
|
BREAKPOINT INTERRUPT GENERATING APPARATUS IN A SUPERSCALAR MICROPROCESSOR
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2002
|
Application #:
|
09281973
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Filing Dt:
|
03/31/1999
|
|
Title:
|
TEST MODE SETUP CIRCUIT FOR MICROCONTROLLER UNIT
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|
|
|
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Patent #:
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|
Issue Dt:
|
07/23/2002
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Application #:
|
09290611
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Filing Dt:
|
04/13/1999
|
|
Title:
|
INTERFACE CONTROL APPARATUS FOR FRAME BUFFER
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|
|
|
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Patent #:
|
|
Issue Dt:
|
04/02/2002
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Application #:
|
09303688
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Filing Dt:
|
05/03/1999
|
|
Title:
|
PIPELINED FAST FOURIER TRANSFORM (FFT) PROCESSOR HAVING CONVERGENT BLOCK FLOATING POINT (CBFP) ALGORITHM
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|
|
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Patent #:
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|
Issue Dt:
|
01/29/2002
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Application #:
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09342091
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Filing Dt:
|
06/29/1999
|
|
Title:
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MICRO-CONTROLLER UNIT FOR ACCESSING EXTERNAL MEMORY USING MICROCODE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09458053
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Filing Dt:
|
12/10/1999
|
|
Title:
|
TEXTURE MAPPING SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2004
|
Application #:
|
09805963
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Filing Dt:
|
03/14/2001
|
|
Publication #:
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|
Pub Dt:
|
02/21/2002
| | | | |
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Title:
|
LOW POWER AUDIO PROCESSOR THAT MULTIPLEXES COMPONENT DISTRIBUTION SIGNALS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
10043291
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Filing Dt:
|
01/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
MICRO CONTROLLER DEVELOPMENT SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2004
|
Application #:
|
10227165
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Filing Dt:
|
08/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD FOR GENERATING REGISTER TRANSFER LEVEL CODE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10829635
|
Filing Dt:
|
04/22/2004
|
|
Publication #:
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|
Pub Dt:
|
10/07/2004
| | | | |
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Title:
|
Signal processing system for reducing power consumption
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|
