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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:023330/0771   Pages: 44
Recorded: 10/06/2009
Conveyance: CONTRIBUTION AGREEMENT (RELEVANT PARTS; ENGLISH TRANSLATION)
Total properties: 31
1
Patent #:
Issue Dt:
11/30/2004
Application #:
10157175
Filing Dt:
05/29/2002
Publication #:
Pub Dt:
12/05/2002
Title:
ELECTRONIC STRUCTURE
2
Patent #:
Issue Dt:
09/20/2005
Application #:
10326367
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
CURRENT SENSE AMPLIFIER
3
Patent #:
Issue Dt:
05/24/2005
Application #:
10440480
Filing Dt:
05/15/2003
Publication #:
Pub Dt:
01/15/2004
Title:
METHOD FOR CONNECTING CIRCUIT DEVICES
4
Patent #:
Issue Dt:
12/27/2005
Application #:
10446396
Filing Dt:
05/28/2003
Publication #:
Pub Dt:
01/22/2004
Title:
CONNECTION OF INTEGRATED CIRCUITS
5
Patent #:
Issue Dt:
02/26/2008
Application #:
10722576
Filing Dt:
11/28/2003
Publication #:
Pub Dt:
06/02/2005
Title:
MEMORY SYSTEM AND PROCESS FOR CONTROLLING A MEMORY COMPONENT TO ACHIEVE DIFFERENT KINDS OF MEMORY CHARACTERISTICS ON ONE AND THE SAME MEMORY COMPONENT
6
Patent #:
Issue Dt:
02/26/2008
Application #:
10733217
Filing Dt:
12/11/2003
Publication #:
Pub Dt:
08/26/2004
Title:
METHOD FOR FORMING THREE-DIMENSIONAL STRUCTURES ON A SUBSTRATE
7
Patent #:
Issue Dt:
05/08/2007
Application #:
11074946
Filing Dt:
03/09/2005
Publication #:
Pub Dt:
09/15/2005
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR MEMORY CELL
8
Patent #:
Issue Dt:
07/06/2010
Application #:
11076027
Filing Dt:
03/10/2005
Publication #:
Pub Dt:
09/14/2006
Title:
METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT INCLUDING AN ELECTROLYTE MATERIAL LAYER
9
Patent #:
Issue Dt:
10/28/2008
Application #:
11113332
Filing Dt:
04/25/2005
Publication #:
Pub Dt:
11/10/2005
Title:
RESISTIVELY SWITCHING MEMORY
10
Patent #:
Issue Dt:
05/08/2007
Application #:
11115953
Filing Dt:
04/27/2005
Publication #:
Pub Dt:
11/17/2005
Title:
SEMICONDUCTOR MEMORY COMPONENT IN CROSS-POINT ARCHITECTURE
11
Patent #:
Issue Dt:
09/10/2013
Application #:
11133716
Filing Dt:
05/20/2005
Publication #:
Pub Dt:
11/23/2006
Title:
METHOD FOR OPERATING AN INTEGRATED CIRCUIT HAVING A RESISTIVITY CHANGING MEMORY CELL
12
Patent #:
Issue Dt:
11/09/2010
Application #:
11153964
Filing Dt:
06/16/2005
Publication #:
Pub Dt:
01/05/2006
Title:
METHOD FOR PRODUCING MEMORY HAVING A SOLID ELECTROLYTE MATERIAL REGION
13
Patent #:
Issue Dt:
01/15/2008
Application #:
11159404
Filing Dt:
06/23/2005
Publication #:
Pub Dt:
12/29/2005
Title:
RESISTIVE SEMICONDUCTOR ELEMENT BASED ON A SOLID-STATE ION CONDUCTOR
14
Patent #:
Issue Dt:
04/20/2010
Application #:
11197746
Filing Dt:
08/05/2005
Publication #:
Pub Dt:
02/08/2007
Title:
METHOD FOR FABRICATING AN INTEGRATED DEVICE COMPRISING A STRUCTURE WITH A SOLID ELECTROLYTE
15
Patent #:
Issue Dt:
02/05/2008
Application #:
11204569
Filing Dt:
08/16/2005
Publication #:
Pub Dt:
02/22/2007
Title:
A MEMORY DEVICE INCLUDING ELECTRICAL CIRCUIT CONFIGURED TO PROVIDE REVERSIBLE BIAS ACROSS THE PMC MEMORY CELL TO PERFORM ERASE AND WRITE FUNCTIONS
16
Patent #:
Issue Dt:
05/13/2008
Application #:
11209424
Filing Dt:
08/23/2005
Publication #:
Pub Dt:
03/23/2006
Title:
MEMORY HAVING CBRAM MEMORY CELLS AND METHOD
17
Patent #:
Issue Dt:
06/19/2007
Application #:
11209977
Filing Dt:
08/23/2005
Publication #:
Pub Dt:
03/09/2006
Title:
INTEGRATED MEMORY ARRANGEMENT BASED ON RESISTIVE MEMORY CELLS AND PRODUCTION METHOD
18
Patent #:
Issue Dt:
06/15/2010
Application #:
11214692
Filing Dt:
08/29/2005
Publication #:
Pub Dt:
03/23/2006
Title:
MEMORY COMPONENT WITH MEMORY CELLS HAVING CHANGEABLE RESISTANCE AND FABRICATION METHOD THEREFOR
19
Patent #:
Issue Dt:
05/08/2007
Application #:
11215443
Filing Dt:
08/30/2005
Publication #:
Pub Dt:
03/09/2006
Title:
RESISTIVE MEMORY ARRANGEMENT
20
Patent #:
Issue Dt:
05/18/2010
Application #:
11238117
Filing Dt:
09/29/2005
Publication #:
Pub Dt:
03/30/2006
Title:
METHOD FOR MANUFACTURING A CBRAM SEMICONDUCTOR MEMORY
21
Patent #:
Issue Dt:
01/27/2009
Application #:
11261212
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
05/25/2006
Title:
METHOD FOR IMPROVING THE THERMAL CHARACTERISTICS OF SEMICONDUCTOR MEMORY CELLS
22
Patent #:
Issue Dt:
08/14/2007
Application #:
11337940
Filing Dt:
01/23/2006
Publication #:
Pub Dt:
08/10/2006
Title:
PMC MEMORY CIRCUIT AND METHOD FOR STORING A DATUM IN A PMC MEMORY CIRCUIT
23
Patent #:
Issue Dt:
10/02/2007
Application #:
11341902
Filing Dt:
01/27/2006
Publication #:
Pub Dt:
08/24/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY WITH AN ARRANGEMENT OF NONVOLATILE MEMORY CELLS, AND METHOD
24
Patent #:
Issue Dt:
05/06/2008
Application #:
11344533
Filing Dt:
02/01/2006
Publication #:
Pub Dt:
09/07/2006
Title:
METHOD FOR FABRICATING A RESISTIVE MEMORY
25
Patent #:
Issue Dt:
03/31/2009
Application #:
11346571
Filing Dt:
02/03/2006
Publication #:
Pub Dt:
08/17/2006
Title:
RESISTIVE MEMORY ELEMENT WITH SHORTENED ERASE TIME
26
Patent #:
Issue Dt:
08/10/2010
Application #:
11377633
Filing Dt:
03/16/2006
Publication #:
Pub Dt:
10/05/2006
Title:
SOLID ELECTROLYTE MEMORY ELEMENT AND METHOD FOR FABRICATING SUCH A MEMORY ELEMENT
27
Patent #:
Issue Dt:
02/02/2010
Application #:
11399744
Filing Dt:
04/07/2006
Publication #:
Pub Dt:
11/16/2006
Title:
MEMORY CELL, MEMORY DEVICE AND METHOD FOR THE PRODUCTION THEREOF
28
Patent #:
Issue Dt:
05/26/2009
Application #:
11411994
Filing Dt:
04/26/2006
Publication #:
Pub Dt:
11/01/2007
Title:
INTEGRATED CIRCUIT INCLUDING RESISTIVITY CHANGING MEMORY CELLS
29
Patent #:
Issue Dt:
02/14/2012
Application #:
11492305
Filing Dt:
07/25/2006
Publication #:
Pub Dt:
01/31/2008
Title:
MEMORY CELLS WITH AN ANODE COMPRISING INTERCALATING MATERIAL AND METAL SPECIES DISPERSED THEREIN
30
Patent #:
Issue Dt:
04/07/2009
Application #:
11497810
Filing Dt:
08/02/2006
Publication #:
Pub Dt:
02/07/2008
Title:
CBRAM CELL AND CBRAM ARRAY, AND METHOD OF OPERATING THEREOF
31
Patent #:
Issue Dt:
02/09/2010
Application #:
11541391
Filing Dt:
09/29/2006
Publication #:
Pub Dt:
04/10/2008
Title:
METHOD FOR FABRICATING A SOLID ELECTROLYTE MEMORY DEVICE AND SOLID ELECTROLYTE MEMORY DEVICE
Assignor
1
Exec Dt:
04/25/2006
Assignee
1
GUSTAV-HEINEMANN-RING 212
81639 MUNICH, GERMANY
Correspondence name and address
DICKE, BILLIG & CZAJA
FIFTH STREET TOWERS
100 SOUTH FIFTH STREET, SUITE 2250
MINNEAPOLIS, MN 55402

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