Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 023355/0499 | |
| Pages: | 4 |
| | Recorded: | 10/12/2009 | | |
| Attorney Dkt #: | 125.009US02-05 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
4
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Patent #:
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Issue Dt:
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01/09/2007
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Application #:
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10950085
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Filing Dt:
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09/24/2004
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Publication #:
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Pub Dt:
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02/17/2005
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Title:
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INTEGRATED CIRCUIT WITH A PN JUNCTION DIODE
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Patent #:
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Issue Dt:
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12/13/2005
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Application #:
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10950273
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Filing Dt:
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09/24/2004
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Publication #:
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Pub Dt:
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03/03/2005
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Title:
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METHOD OF MANUFACTURING LATERAL MOSFET STRUCTURE OF AN INTEGRATED CIRCUIT HAVING SEPARATED DEVICE REGIONS
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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11238344
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Filing Dt:
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09/29/2005
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Publication #:
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Pub Dt:
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02/02/2006
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Title:
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METHOD OF MANUFACTURING LATERAL MOSFET STRUCTURE OF AN INTEGRATED CIRCUIT HAVING SEPARATED DEVICE REGIONS
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Patent #:
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Issue Dt:
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03/30/2010
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Application #:
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12058507
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Filing Dt:
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03/28/2008
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Publication #:
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Pub Dt:
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07/24/2008
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Title:
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METHOD OF MANUFACTURING A MOSFET STRUCTURE
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Assignee
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| 7585 IRVINE CENTER DRIVE |
| SUITE 100 |
| IRVINE, CALIFORNIA 92618 |
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Correspondence name and address
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FOGG & POWERS LLC
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5810 W. 78TH STREET
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STE 100
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MINNEAPOLIS, MN 55439
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