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06/24/1997
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08/10/1995
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09/26/2000
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01/07/1998
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07/25/2000
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01/15/1998
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01/30/2001
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03/09/1998
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11/27/2001
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11/13/1998
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05/31/2001
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Title:
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02/27/2001
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12/17/1998
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Title:
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11/26/2002
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01/04/1999
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Title:
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06/05/2001
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02/23/1999
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Title:
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Patent #:
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07/31/2001
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09258563
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02/26/1999
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07/10/2001
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09305434
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05/05/1999
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05/08/2001
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09339271
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06/23/1999
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Title:
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07/16/2002
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09366132
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08/02/1999
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Title:
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09/12/2000
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09/29/1999
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08/07/2001
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10/05/1999
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07/17/2001
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09420402
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10/18/1999
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Title:
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SELF-ALIGNED METAL CAPS FOR INTERLEVEL METAL CONNECTIONS
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07/30/2002
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10/21/1999
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05/15/2001
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09442890
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11/18/1999
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11/21/2000
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09450546
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11/30/1999
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Title:
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05/29/2001
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12/08/1999
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09/18/2001
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09456589
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12/08/1999
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05/22/2001
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09458878
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12/10/1999
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Title:
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HIGH PERFORMANCE CMOS WORD-LINE DRIVER
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07/16/2002
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09460034
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12/13/1999
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Title:
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SEMICONDUCTOR DEVICE FABRICATION USING A PHOTOMASK WITH ASSIST FEATURES
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07/16/2002
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12/14/1999
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METHOD FOR REMOVAL OF HARD MASK USED TO DEFINE NOBLE METAL ELECTRODE
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11/20/2001
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09460701
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12/14/1999
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SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHODS
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08/14/2001
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09460820
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12/14/1999
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CHARGE PUMP SYSTEM HAVING MULTIPLE INDEPENDENTLY ACTIVATED CHARGE PUMPS AND CORRESPONDING METHOD
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03/26/2002
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09469371
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12/22/1999
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CVD/PVD/CVD/PVD FILL PROCESS
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03/19/2002
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09471428
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12/23/1999
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07/17/2001
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01/21/2000
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11/06/2001
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01/27/2000
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Full swing voltage input/full swing output bi-directional repeaters for high resistance or high capacitance bi-directional signal lines and methods therefor
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02/25/2003
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09500110
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02/08/2000
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03/26/2002
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02/09/2000
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Reduction of orientation dependent oxidation for vertical sidewalls of semiconductor substrates
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09/11/2001
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09504409
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02/15/2000
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Title:
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Method for probing semiconductor devices for active measuring of electrical characteristics
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12/26/2000
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09512922
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02/25/2000
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Method for addressing electrical fuses
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08/20/2002
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09512923
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02/25/2000
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Title:
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METHOD OF USING OPTICAL PROXIMITY EFFECTS TO CREATE ELECTRICALLY BLOWN FUSES WITH SUB-CRITICAL DIMENSION NECK DOWNS
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08/14/2001
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09519104
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03/06/2000
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Title:
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Receiver with switched current feedback for controlled hysteresis
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07/16/2002
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09525729
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03/14/2000
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Title:
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FUSE PROCESSING USING DIELECTRIC PLANARIZATION PILLARS
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11/26/2002
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09535445
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03/24/2000
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SEMICONDUCTOR CONTACT AND METHOD OF FORMING THE SAME
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07/16/2002
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09551757
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04/18/2000
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METHOD FOR FORMING AN INTEGRATED BARRIER/PLUG FOR A STACKED CAPACITOR
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08/20/2002
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09560081
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04/27/2000
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SEMICONDUCTOR MEMORY DEVICE WITH REDUCED ORIENTATION-DEPENDENT OXIDATION IN TRENCH STRUCTURES
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01/28/2003
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04/28/2000
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09/17/2002
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09561472
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04/28/2000
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PLURAL INTERLEAVED EXPOSURE PROCESS FOR INCREASED FEATURE ASPECT RATIO IN DENSE ARRAYS
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01/15/2002
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05/02/2000
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Capacitor stack structure and method of fabricating description
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08/07/2001
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09583596
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05/31/2000
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Semiconductor memory with programmable bitline multiplexers
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02/19/2002
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06/07/2000
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Diamond as a polish-stop layer for chemical-mechanical planarization in a damascene process flow
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03/19/2002
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06/16/2000
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Clean method for recessed conductive barriers
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03/19/2002
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09596097
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06/16/2000
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Orientation independent oxidation of silicon
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10/08/2002
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09597121
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06/20/2000
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POWER CONTROLLED INPUT RECEIVER
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08/19/2003
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09597122
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06/20/2000
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REMOVABLE INORGANIC ANTI-REFLECTION COATING PROCESS
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04/16/2002
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09598374
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06/21/2000
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METHOD OF REDUCING POST-DEVELOPMENT DEFECTS IN AND AROUND OPENINGS FORMED IN PHOTORESIST BY USE OF MULTIPLE DEVELOPMENT/RINSE CYCLES
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06/28/2005
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06/21/2000
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Buried bit line-field isolation defined active semiconductor areas
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01/15/2002
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06/23/2000
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Title:
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Structure and process for 6F2 trench capacitor dram cell with vertical mosfet and 3F bitline pitch
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06/03/2003
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09603442
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06/23/2000
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SINGLE SIDED BURIED STRAP
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06/04/2002
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06/29/2000
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HIGHLY CONFORMAL TITANIUM NITRIDE DEPOSITION PROCESS FOR HIGH ASPECT RATIO STRUCTURES
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09/03/2002
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09645424
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08/24/2000
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DISPOSABLE SPACER TECHNOLOGY FOR DEVICE TAILORING
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10/21/2003
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09/14/2000
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SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATION INCLUDING FORMING ALUMINUM COLUMNS
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01/21/2003
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09670741
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09/27/2000
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07/29/2003
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09675953
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09/29/2000
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METHOD TO DESCRAMBLE THE DATA MAPPING IN MEMORY CIRCUITS
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05/20/2003
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05/21/2001
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09/13/2001
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METAL WIRE FUSE STRUCTURE WITH CAVITY
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03/02/2004
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01/25/2002
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09/19/2002
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METHOD FOR THE DETERMINATION OF RESISTANCES AND CAPACITANCES OF A CIRCUIT DIAGRAM, WHICH REPRESENTS AN ELECTRICAL CIRCUIT
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06/03/2003
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03/11/2002
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VERTICAL MOSFET WITH ASYMMETRICALLY GRADED CHANNEL DOPING
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03/23/2004
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05/13/2002
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11/13/2003
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09/28/2004
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05/31/2002
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12/19/2002
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02/24/2004
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06/05/2002
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12/05/2002
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METHOD FOR FABRICATING POSITIONALLY EXACT SURFACE-WIDE MEMBRANE MASKS
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05/11/2004
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07/22/2002
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01/22/2004
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NON-VOLATILE MEMORY CELL AND FABRICATION METHOD
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08/10/2004
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07/31/2002
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03/27/2003
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01/20/2004
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07/31/2002
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02/05/2004
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02/08/2005
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07/31/2002
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12/28/2004
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02/13/2003
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LARGE-AREA MEMBRANE MASK AND METHOD FOR FABRICATING THE MASK
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10219885
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Filing Dt:
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08/14/2002
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
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METHOD FOR ETCHING HIGH-ASPECT-RATIO FEATURES
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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10233878
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Filing Dt:
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09/03/2002
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Publication #:
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Pub Dt:
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03/06/2003
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Title:
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PARTICLE MEASUREMENT CONFIGURATION AND SEMICONDUCTOR WAFER PROCESSING DEVICE WITH SUCH A CONFIGURATION
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Patent #:
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Issue Dt:
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08/16/2005
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Application #:
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10233901
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Filing Dt:
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09/03/2002
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Publication #:
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Pub Dt:
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03/13/2003
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Title:
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CONFIGURATION FOR DETERMINING A CONCENTRATION OF CONTAMINATING PARTICLES IN A LOADING AND UNLOADING CHAMBER OF AN APPLIANCE FOR PROCESSING AT LEAST ONE DISK-LIKE OBJECT
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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10250201
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Filing Dt:
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06/12/2003
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Title:
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ERROR DETECTION AND CORRECTION METHOD AND APPARATUS IN A MAGNETORESISTIVE RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
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01/10/2006
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Application #:
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10261709
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Filing Dt:
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10/01/2002
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Publication #:
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Pub Dt:
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04/01/2004
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Title:
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SPACER INTEGRATION SCHEME IN MRAM TECHNOLOGY
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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10283483
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Filing Dt:
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10/30/2002
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Publication #:
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Pub Dt:
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05/06/2004
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Title:
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METHOD FOR FABRICATING A TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10289488
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Filing Dt:
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11/06/2002
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Publication #:
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Pub Dt:
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05/06/2004
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Title:
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BILAYER CMP PROCESS TO IMPROVE SURFACE ROUGHNESS OF MAGNETIC STACK IN MRAM TECHNOLOGY
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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10294100
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Filing Dt:
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11/14/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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SILICON NITRIDE ISLAND FORMATION FOR INCREASED CAPACITANCE
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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10318795
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Filing Dt:
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12/13/2002
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Title:
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WORDLINE ON AND OFF VOLTAGE COMPENSATION CIRCUIT BASED ON THE ARRAY DEVICE THRESHOLD VOLTAGE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10336140
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Filing Dt:
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01/02/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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Internal data generation and compare via unused external pins
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Patent #:
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Issue Dt:
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09/25/2007
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Application #:
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10338254
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Filing Dt:
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01/07/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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HIGH DENSITY PLASMA OXIDATION
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10338273
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Filing Dt:
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01/07/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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APPARATUS AND METHOD TO IMPROVE RESIST LINE ROUGHNESS IN SEMICONDUCTOR WAFER PROCESSING
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10355726
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Filing Dt:
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01/31/2003
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Publication #:
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Pub Dt:
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08/05/2004
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Title:
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GATE METAL RECESS FOR OXIDATION PROTECTION AND PARASITIC CAPACITANCE REDUCTION
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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10522563
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Filing Dt:
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04/20/2005
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Publication #:
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Pub Dt:
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10/06/2005
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Title:
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NOZZLE ASSEMBLY FOR APPLYING A LIQUID TO A SUBSTRATE
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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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10605857
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Filing Dt:
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10/31/2003
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Publication #:
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Pub Dt:
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05/05/2005
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Title:
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HDP PROCESS FOR HIGH ASPECT RATIO GAP FILLING
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Patent #:
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Issue Dt:
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07/31/2007
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Application #:
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10632365
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Filing Dt:
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07/31/2003
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Publication #:
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Pub Dt:
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02/03/2005
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Title:
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MAGNETICALLY LINED CONDUCTORS
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10720490
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Filing Dt:
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11/24/2003
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Publication #:
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Pub Dt:
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06/03/2004
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Title:
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METHOD FOR FORMONG ITTO NITRIDE LINER FOR IMPROVED COLLAR PROTECTION AND TTO RELIABILITY
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Patent #:
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Issue Dt:
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08/08/2006
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Application #:
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10944394
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Filing Dt:
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09/16/2004
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Publication #:
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Pub Dt:
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05/05/2005
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Title:
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METHOD FOR GENERATING CHIP STACKS
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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10974726
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Filing Dt:
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10/28/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Title:
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PHOTORESIST SUITABLE FOR USE IN 157 NM PHOTOLITHOGRAPHY AND INCLUDING A POLYMER BASED ON FLUORINATED NORBORNENE DERIVATIVES
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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11024945
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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07/06/2006
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Title:
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HYBRID MEMORY CELL FOR SPIN-POLARIZED ELECTRON CURRENT INDUCED SWITCHING AND WRITING/READING PROCESS USING SUCH MEMORY CELL
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Patent #:
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Issue Dt:
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12/08/2009
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Application #:
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11845525
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Filing Dt:
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08/27/2007
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Publication #:
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Pub Dt:
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04/24/2008
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Title:
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HYBRID MEMORY CELL FOR SPIN-POLARIZED ELECTRON CURRENT INDUCED SWITCHING AND WRITING/READING PROCESS USING SUCH MEMORY CELL
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