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Patent #:
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Issue Dt:
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02/25/1997
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Application #:
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08402378
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Filing Dt:
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03/13/1995
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Title:
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ETCH PROFILE SHAPING THROUGH WAFER TEMPERATURE CONTROL
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Patent #:
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Issue Dt:
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03/04/1997
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Application #:
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08477060
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Filing Dt:
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06/07/1995
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Title:
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FUSE ELEMENT FOR EFFECTIVE LASER BLOW IN AN INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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08518209
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Filing Dt:
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08/23/1995
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Title:
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PLANARIZED FINAL PASSIVATION FOR SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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09/16/1997
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Application #:
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08519373
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Filing Dt:
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08/25/1995
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Title:
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IN-SITU WAFER TEMPERATURE CONTROL APPARATUS FOR SINGLE WAFER TOOLS
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Patent #:
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Issue Dt:
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02/11/1997
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Application #:
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08519669
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Filing Dt:
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08/25/1995
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Title:
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OFF-STATE GATE-OXIDE FIELD REDUCTION IN CMOS
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Patent #:
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Issue Dt:
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07/01/1997
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Application #:
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08531844
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Filing Dt:
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09/21/1995
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Title:
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APPLICATION OF THIN CRYSTALLINE SI3N4 LINERS IN SHALLOW TRENCH ISOLATION (STI) STRUCTURES
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Patent #:
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Issue Dt:
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01/07/1997
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Application #:
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08539475
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Filing Dt:
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10/05/1995
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Title:
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ENHANCED DEEP TRENCH STORAGE NODE CAPACITANCE FOR DRAM
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Patent #:
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Issue Dt:
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01/20/1998
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Application #:
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08549885
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Filing Dt:
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10/27/1995
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Title:
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INTEGRATED POLYSILICON DIODE CONTACT FOR GAIN MEMORY CELLS
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Patent #:
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Issue Dt:
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06/03/1997
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Application #:
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08554209
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Filing Dt:
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10/24/1995
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Title:
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IN-SITU TEMPERATURE MEASUREMENT USING X-RAY DIFFRACTION
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Patent #:
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Issue Dt:
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06/23/1998
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Application #:
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08578165
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Filing Dt:
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12/29/1995
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Title:
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METHOD FOR FORMING SEMICONDUCTOR STRUCTURE USING MODULATION DOPED SILICAT GLASSES
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Patent #:
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Issue Dt:
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10/27/1998
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Application #:
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08605622
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Filing Dt:
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02/22/1996
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Title:
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BURIED-STRAP FORMATION IN A DRAM TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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02/10/1998
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Application #:
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08606469
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Filing Dt:
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03/04/1996
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Title:
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NITRIDE CAP FORMATION IN A DRAM TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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12/28/1999
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Application #:
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08618161
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Filing Dt:
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03/19/1996
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Title:
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ETCHING HIGH ASPECT CONTACT HOLES IN SOLID STATE DEVICES
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08626192
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Filing Dt:
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03/29/1996
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Title:
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AUTOMATED NON-VISUAL METHOD OF LOCATING PERIODICALLY ARRANGED SUB-MICRON OBJECTS
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08643983
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Filing Dt:
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05/07/1996
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Title:
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CONTROLLED RECRYSTALLIZATION OF BURIED STRAP IN A SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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02/23/1999
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Application #:
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08645458
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Filing Dt:
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05/13/1996
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Title:
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POLYCIDE ETCHING WITH HCL AND CHLORINE
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Patent #:
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Issue Dt:
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05/04/1999
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Application #:
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08647392
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Filing Dt:
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05/09/1996
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Title:
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METHOD FOR FABRICATING A TITANIUM RESISTSOR
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Patent #:
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Issue Dt:
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11/04/1997
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Application #:
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08648791
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Filing Dt:
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05/16/1996
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Title:
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UNIFORM TRENCH FILL RECESS BY MEANS OF ISOTROPIC ETCHING
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08667541
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Filing Dt:
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06/21/1996
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Title:
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THREE-DIMENSIONAL DEVICE LAYOUT HAVING A TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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10/20/1998
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Application #:
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08688346
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Filing Dt:
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07/30/1996
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Title:
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METHOD OF MANUFACTURING AN INSULATED GATE FIELD EFFECT TRANSISTOR
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Patent #:
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Issue Dt:
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05/26/1998
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Application #:
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08688457
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Filing Dt:
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07/30/1996
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Title:
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INSULATED GATE FIELD EFFECT TRANSISTOR
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Patent #:
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Issue Dt:
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02/24/1998
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Application #:
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08688458
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Filing Dt:
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07/30/1996
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Title:
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INTEGRATED CIRCUIT CHIP HAVING ISOLATION TRENCHES COMPOSED OF A DIELECTRIC LAYER WITH OXIDATION CATALYST MATERIAL
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Patent #:
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Issue Dt:
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11/02/1999
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Application #:
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08689174
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Filing Dt:
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08/06/1996
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Title:
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LOW PRESSURE AND LOW POWER C12/HC1 PROCESS FOR SUB-MICRON METAL ETCHING
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08703754
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Filing Dt:
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08/27/1996
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Title:
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PREPARATION OF POLY-O-HYDROXYAMIDES AND POLY-O-MERCAPTOAMIDES
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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08730839
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Filing Dt:
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10/17/1996
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Title:
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NITRIDE CAP FORMATION IN A DRAM TRENCH CAPACITOR
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Patent #:
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|
Issue Dt:
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10/26/1999
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Application #:
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08736301
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Filing Dt:
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10/24/1996
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Title:
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METHOD FOR SUPPRESSING PATTERN DISTORTION ASSOCIATED WITH BPSG REFLOW AND INTEGRATED CIRCUIT CHIP FORMED THEREBY
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Patent #:
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Issue Dt:
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04/13/1999
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Application #:
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08742533
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Filing Dt:
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11/01/1996
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Title:
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THREE-DIMENSIONAL DEVICE LAYOUT WITH SUB-GROUNDRULE FEATURES
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Patent #:
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Issue Dt:
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12/29/1998
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Application #:
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08764382
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Filing Dt:
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12/13/1996
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Title:
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METHOD OF MAKING AN ALUMINUM CONTACT
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Patent #:
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Issue Dt:
|
09/15/1998
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Application #:
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08768826
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Filing Dt:
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12/18/1996
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Title:
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UNIFORM DISTRIBUTION OF REACTANTS IN A DEVICE LAYER
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Patent #:
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|
Issue Dt:
|
08/10/1999
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Application #:
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08770962
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Filing Dt:
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12/20/1996
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Title:
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MEMORY CELL THAT INCLUDES A VERTICAL TRANSISTOR AND A TRENCH CAPACITOR
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Patent #:
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|
Issue Dt:
|
07/07/1998
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Application #:
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08777156
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Filing Dt:
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12/26/1996
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Title:
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PAD STACK WITH A POLY SI ETCH STOP FOR TEOS MASK REMOVAL WITH RIE
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Patent #:
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|
Issue Dt:
|
05/05/1998
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Application #:
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08785322
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Filing Dt:
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01/21/1997
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Title:
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APPLICATION OF THIN CRYSTALLINE SI3N4 LINERS IN SHALLOW TRENCH ISOLATION (STI) STRUCTURES
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|
|
Patent #:
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|
Issue Dt:
|
06/09/1998
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Application #:
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08790266
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Filing Dt:
|
01/28/1997
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Title:
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SHALLOW TRENCH ISOLATION WITH OXIDE-NITRIDE/OXYNITRIDE LINER
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Patent #:
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|
Issue Dt:
|
09/01/1998
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Application #:
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08801685
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Filing Dt:
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02/18/1997
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Title:
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CONTROL OF GAS CONTENT IN PROCESS LIQUIDS FOR IMPROVED MEGASONIC CLEANING OF SEMICONDUCTOR WAFERS AND MICROELECTRONICS SUBSTRATES
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08823668
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Filing Dt:
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03/24/1997
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Title:
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CRACK STOPS
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Patent #:
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Issue Dt:
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01/12/1999
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Application #:
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08825312
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Filing Dt:
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03/28/1997
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Title:
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FLEXIBLE FUSE PLACEMENT IN REDUNANT SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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07/20/1999
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Application #:
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08829255
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Filing Dt:
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03/31/1997
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Title:
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METHOD FOR FORMING A STRUCTURE
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Patent #:
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|
Issue Dt:
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12/29/1998
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Application #:
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08829257
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Filing Dt:
|
03/31/1997
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Title:
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METHOD FOR FORMING METALLIZATION IN SEMICONDUCTOR DEVICES WITH A SELF- PLANARIZING MATERIAL
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|
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Patent #:
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|
Issue Dt:
|
02/15/2000
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Application #:
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08829371
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Filing Dt:
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03/31/1997
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Title:
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DEVICE WITH ASYMMETRICAL CHANNEL DOPANT PROFILE
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Patent #:
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|
Issue Dt:
|
02/15/2000
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Application #:
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08829575
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Filing Dt:
|
03/31/1997
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Title:
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ETCHING OF CONTACT HOLES
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Patent #:
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|
Issue Dt:
|
04/25/2000
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Application #:
|
08833557
|
Filing Dt:
|
04/07/1997
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Title:
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METHOD FOR FORMING DEEP DEPLETION MODE DYNAMIC RANDOM ACCESS MEMORY (DRAM) CELL
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|
|
Patent #:
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|
Issue Dt:
|
10/05/1999
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Application #:
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08846924
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Filing Dt:
|
04/30/1997
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Title:
|
METHOD OF PLANARIZING THE SEMICONDUCTOR STRUCTURE
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|
Patent #:
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|
Issue Dt:
|
12/10/2002
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Application #:
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08846925
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Filing Dt:
|
04/30/1997
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Title:
|
INTEGRATED CIRCUITS AND MANUFACTURING METHODS
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|
|
Patent #:
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|
Issue Dt:
|
06/29/1999
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Application #:
|
08861465
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Filing Dt:
|
05/21/1997
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Title:
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INTEGRATED MULTI-LAYER TEST PADS
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|
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Patent #:
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|
Issue Dt:
|
12/01/1998
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Application #:
|
08867114
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Filing Dt:
|
06/02/1997
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Title:
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SINGLE- ELECTRON MEMORY CELL CONFIGURATION
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|
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Patent #:
|
|
Issue Dt:
|
10/06/1998
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Application #:
|
08870121
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Filing Dt:
|
06/03/1997
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Title:
|
SEMICONDUCTOR STRUCTURE FOR AN MOS TRANSISTOR AND METHOD FOR FABRICATING THE SEMICONDUCTOR STRUCTURE
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|
|
Patent #:
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|
Issue Dt:
|
12/01/1998
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Application #:
|
08879871
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Filing Dt:
|
06/20/1997
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Title:
|
BURIED STRAP FORMATION IN A DRAM TRENCH CAPACITOR
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|
|
Patent #:
|
|
Issue Dt:
|
11/07/2000
|
Application #:
|
08898734
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Filing Dt:
|
07/23/1997
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Title:
|
LEADFRAME FOR SEMICONDUCTOR CHIPS AND SEMICONDUCTOR MODULE HAVING THE LEAD FRAME
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|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
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Application #:
|
08904500
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Filing Dt:
|
08/01/1997
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Title:
|
FUSE REFRESH CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
02/16/1999
|
Application #:
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08911542
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Filing Dt:
|
08/14/1997
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Title:
|
FUSE WINDOW WITH CONTROLLED FUSE OXIDE THICKNESS
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|
|
Patent #:
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|
Issue Dt:
|
07/27/1999
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Application #:
|
08921818
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Filing Dt:
|
09/02/1997
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Title:
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CURRENT-MODE SENSE AMPLIFIER
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Patent #:
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|
Issue Dt:
|
05/11/1999
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Application #:
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08923593
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Filing Dt:
|
09/04/1997
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Title:
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CIRCUIT AND METHOD TO EXTERNALLY ADJUST INTERNAL CIRCUIT TIMING
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|
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Patent #:
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|
Issue Dt:
|
11/16/1999
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Application #:
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08959257
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Filing Dt:
|
10/29/1997
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Title:
|
THRESHOLD LOGIC CIRCUIT WITH LOW SPACE REQUIREMENT
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|
|
Patent #:
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|
Issue Dt:
|
08/10/1999
|
Application #:
|
08963590
|
Filing Dt:
|
11/04/1997
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Title:
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METHOD FOR TESTING A MEMORY CHIP, DIVIDED INTO CELL ARRAYS, DURING ONGOING OPERATION OF A COMPUTER WHILE MAINTAINING REAL-TIME CONDITIONS
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|
|
Patent #:
|
|
Issue Dt:
|
03/27/2001
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Application #:
|
08987886
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Filing Dt:
|
12/10/1997
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Title:
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SLAVES STATION WITH TWO OUTPUT CIRCUITS COMMONLY AND DIRECTLY CONNECTED TO A LINE FOR SERIALLY TRANSMITTING DATA TO A MASTER STATION IN TWO OPERATIONAL MODES
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|
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Patent #:
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|
Issue Dt:
|
03/16/1999
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Application #:
|
08988023
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Filing Dt:
|
12/10/1997
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Title:
|
SYNTHESIS OF POLYBENZOXASOLE AND POLYBENZOTHIAZOLE PRECURSORS
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|
|
Patent #:
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|
Issue Dt:
|
04/04/2000
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Application #:
|
08989303
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Filing Dt:
|
12/12/1997
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Title:
|
SHALLOW TRENCH ISOLATION WITH OXIDE-NITRIDE/OXYNITRIDE LINER
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|
|
Patent #:
|
|
Issue Dt:
|
03/14/2000
|
Application #:
|
09015452
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Filing Dt:
|
01/29/1998
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Title:
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METHOD FOR PRODUCING A NOBLE METAL-CONTAINING STRUCTURE ON A SUBSTRATE, AND SEMICONDUCTOR COMPONENT HAVING SUCH A NOBLE METAL- CONTAINING STRUCTURE
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|
|
Patent #:
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|
Issue Dt:
|
02/08/2000
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Application #:
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09032484
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Filing Dt:
|
02/27/1998
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Title:
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METHOD FOR MANUFACTURING A CAPACITOR FOR A SEMICONDUCTOR ARRANGEMENT
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|
|
Patent #:
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|
Issue Dt:
|
10/24/2000
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Application #:
|
09047850
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Filing Dt:
|
03/25/1998
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Title:
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PRODUCTION PROCESS FOR A CAPACITOR ELECTRODE FORMED OF A PLATINUM METAL
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|
|
Patent #:
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|
Issue Dt:
|
12/28/1999
|
Application #:
|
09054926
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Filing Dt:
|
04/03/1998
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Title:
|
INPUT AMPLIFIER FOR INPUT SIGNALS WITH STEEP EDGES
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|
Patent #:
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|
Issue Dt:
|
02/01/2000
|
Application #:
|
09054927
|
Filing Dt:
|
04/03/1998
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Title:
|
INPUT AMPLIFIER WITH UNILATERAL CURRENT SHUTOFF FOR INPUT SIGNALS WITH STEEP EDGES
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|
|
Patent #:
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|
Issue Dt:
|
12/07/1999
|
Application #:
|
09055800
|
Filing Dt:
|
04/06/1998
|
Title:
|
METHOD FOR CREATING A CONDUCTIVE CONNECTION BETWEEN AT LEAST TWO ZONES OF A FIRST CONDUCTIVITY TYPE
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Patent #:
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|
Issue Dt:
|
02/27/2001
|
Application #:
|
09063314
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Filing Dt:
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04/20/1998
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Title:
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CIRCUIT CONFIGURATION FOR GENERATING AN INTERNAL SUPPLY VOLTAGE
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Patent #:
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Issue Dt:
|
06/26/2001
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Application #:
|
09065010
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Filing Dt:
|
04/23/1998
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Title:
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CHEMICALLY AMPLIFIED RESIST
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Patent #:
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|
Issue Dt:
|
05/23/2000
|
Application #:
|
09065173
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Filing Dt:
|
04/23/1998
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Title:
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AN INTEGRATED CIRCUIT ARRANGEMENT HAVING AT LEAST ONE MOS TRANSISTOR MANUFACTURED BY USE OF A PLANAR TRANSISTOR LAYOU
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|
|
Patent #:
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|
Issue Dt:
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04/18/2000
|
Application #:
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09066245
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Filing Dt:
|
04/24/1998
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Title:
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METHOD OF PRODUCING A PLATINUM-METAL PATTERN OR STRUCTURE BY A LIFT-OFF PROCESS
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|
Patent #:
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|
Issue Dt:
|
06/15/1999
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Application #:
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09067766
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Filing Dt:
|
04/29/1998
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Title:
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METHOD FOR PRODUCING A CMOS CIRCUIT
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|
Patent #:
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|
Issue Dt:
|
07/03/2001
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Application #:
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09071798
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Filing Dt:
|
05/04/1998
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Title:
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DRAM CELL CONFIGURATION AND METHOD FOR ITS PRODUCTION
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|
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Patent #:
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Issue Dt:
|
04/23/2002
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Application #:
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09079020
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Filing Dt:
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05/14/1998
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Title:
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INTEGRATED CIRCUIT HAVING AT LEAST TWO VERTICAL MOS TRANSISTORS AND METHOD FOR MANUFACTURING SAME
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Patent #:
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Issue Dt:
|
04/11/2000
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Application #:
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09089539
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Filing Dt:
|
06/03/1998
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Title:
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DRAM CELL ARRANGEMENT HAVING DYNAMIC SELF-AMPLIFYING MEMORY CELLS, AND METHOD FOR MANUFACTURING SAME
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Patent #:
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Issue Dt:
|
07/11/2000
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Application #:
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09093572
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Filing Dt:
|
06/08/1998
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Title:
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DRAM CELL CONFIGURATION AND METHOD FOR ITS FABRICATION
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|
Patent #:
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Issue Dt:
|
05/16/2000
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Application #:
|
09095261
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Filing Dt:
|
06/10/1998
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Title:
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CIRCUIT CONFIGURATION FOR GENERATING DIGITAL SIGNALS
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Patent #:
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Issue Dt:
|
06/13/2000
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Application #:
|
09105235
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Filing Dt:
|
06/26/1998
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Title:
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DRAM CELL ARRANGEMENT AND METHOD FOR ITS FABRICATION
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Patent #:
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|
Issue Dt:
|
08/08/2000
|
Application #:
|
09106237
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Filing Dt:
|
06/29/1998
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Title:
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METHOD OF PRODUCING A BARRIER LAYER IN A SEMICONDUCTOR BODY
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Patent #:
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Issue Dt:
|
02/13/2001
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Application #:
|
09115618
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Filing Dt:
|
07/13/1998
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Title:
|
REDUNDANCY CIRCUIT FOR SEMICONDUCTOR MEMORIES
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Patent #:
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Issue Dt:
|
11/14/2000
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Application #:
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09128387
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Filing Dt:
|
08/03/1998
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Title:
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CONFIGURATION FOR THE AUTOMATIC INSCRIPTION OR REINSCRIPTION OF WAFERS
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|
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Patent #:
|
|
Issue Dt:
|
10/02/2001
|
Application #:
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09128388
|
Filing Dt:
|
08/03/1998
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Title:
|
STRUCTURING PROCESS
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|
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Patent #:
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|
Issue Dt:
|
09/24/2002
|
Application #:
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09128389
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Filing Dt:
|
08/03/1998
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Title:
|
STRUCTURING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
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Application #:
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09128806
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Filing Dt:
|
08/04/1998
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Title:
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DATABUS
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|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09128807
|
Filing Dt:
|
08/04/1998
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Title:
|
METHOD AND CIRCUIT CONFIGURATION FOR PROCESSING DIGITAL SIGNALS
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|
|
Patent #:
|
|
Issue Dt:
|
08/01/2000
|
Application #:
|
09133704
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Filing Dt:
|
08/13/1998
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Title:
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CIRCUIT APPARATUS FOR EVALUATING THE DATA CONTENT OF MEMORY CELLS
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|
|
Patent #:
|
|
Issue Dt:
|
11/06/2001
|
Application #:
|
09133893
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Filing Dt:
|
08/14/1998
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Title:
|
SEMICONDUCTOR COMPONENT AND METHOD FOR TESTING AND OPERATING A SEMICONDUCTOR COMPONENT
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|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
|
Application #:
|
09138160
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Filing Dt:
|
08/21/1998
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Title:
|
CIRCUIT ARRANGEMENT WITH AT LEAST FOUR TRANSISTORS, AND METHOD FOR THE MANUFACTURE THEREOF
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|
|
Patent #:
|
|
Issue Dt:
|
01/09/2001
|
Application #:
|
09140972
|
Filing Dt:
|
08/27/1998
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Title:
|
DRAM CELL ARRANGEMENT AND METHOD FOR THE MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2001
|
Application #:
|
09143122
|
Filing Dt:
|
08/28/1998
|
Title:
|
FUSE CONFIGURATION FOR A SEMICONDUCTOR STORAGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2001
|
Application #:
|
09146636
|
Filing Dt:
|
09/03/1998
|
Title:
|
STRUCTURING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
09149829
|
Filing Dt:
|
09/08/1998
|
Title:
|
METHOD FOR PRODUCING STRUCTURES HAVING A HIGH ASPECT RATIO AND STRUCTURE HAVING A HIGH ASPECT RATIO
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
09150789
|
Filing Dt:
|
09/10/1998
|
Title:
|
LEVEL CONVERTING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
09160875
|
Filing Dt:
|
09/24/1998
|
Title:
|
O-AMINO (THIO) PHENOLCARBOXYLIC ACIDS AND THEIR PREPARATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
09160880
|
Filing Dt:
|
09/25/1998
|
Title:
|
RS FLIP-FLOP WITH ENABLE INPUTS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2000
|
Application #:
|
09161004
|
Filing Dt:
|
09/25/1998
|
Title:
|
POINTER CIRCUIT WITH LOW SURFACE REQUIREMENT HOGH SPEED AND LOW POWER LOSS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2000
|
Application #:
|
09161144
|
Filing Dt:
|
09/24/1998
|
Title:
|
BIS-O-AMINO(THIO)PHENOLS, AND THEIR PREPARATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2001
|
Application #:
|
09161147
|
Filing Dt:
|
09/24/1998
|
Title:
|
O-AMINO (THIO) PHENOLCARBOXYLIC ACIDS, AND THEIR PREPARATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2000
|
Application #:
|
09161148
|
Filing Dt:
|
09/24/1998
|
Title:
|
POLYBENZOXAZOLE AND POLYBENZOTHIAZOLE PRECURSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2001
|
Application #:
|
09161149
|
Filing Dt:
|
09/24/1998
|
Title:
|
O-NITRO(THIO)PHENOL DERIVATIVES, AND THEIR PREPARATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
09161196
|
Filing Dt:
|
09/25/1998
|
Title:
|
CAPACITOR HAVING A BARRIER LAYER MADE OF A TRANSITION METAL PHOSPHIDE, ARSENIDE OR SULFIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
09161202
|
Filing Dt:
|
09/24/1998
|
Title:
|
POLYBENZOXAZOLE AND POLYBENZOTHIAZOLE PRECURSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2000
|
Application #:
|
09161549
|
Filing Dt:
|
09/24/1998
|
Title:
|
BIS-O-AMINO (THIO) PHENOLS, AND THEIR PREPARATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2000
|
Application #:
|
09162608
|
Filing Dt:
|
09/29/1998
|
Title:
|
ASSOCIATIVE MEMORY AND METHOD FOR THE OPERATION THEREOF
|
|