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Patent #:
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Issue Dt:
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06/18/1991
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Application #:
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07464685
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Filing Dt:
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01/16/1990
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Title:
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THREE-DIMENSIONAL ONE-DIMENSIONAL CELL ARRANGEMENT FOR DYNAMIC SEMICONDUCTOR MEMORIES AND METHOD FOR THE MANUFACTURE OF A BIT LINE CONTACT
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Patent #:
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Issue Dt:
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03/03/1992
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Application #:
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07487932
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Filing Dt:
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03/05/1990
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Title:
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STATIC MEMORY HAVING PIPELINE REGISTERS
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Patent #:
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Issue Dt:
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02/02/1993
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Application #:
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07494122
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Filing Dt:
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03/15/1990
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY OF THE DRAM TYPE AND METHOD FOR TESTING THE SAME
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Patent #:
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Issue Dt:
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01/14/1992
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Application #:
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07494614
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Filing Dt:
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03/16/1990
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Title:
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PHOTOSENSITIVE MIXTURE
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Patent #:
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Issue Dt:
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04/14/1992
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Application #:
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07501600
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Filing Dt:
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03/29/1990
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Title:
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PREPARING HIGHLY THERMORESISTANT RELIEF STRUCTURES
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Patent #:
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Issue Dt:
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08/06/1991
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Application #:
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07504931
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Filing Dt:
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04/05/1990
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Title:
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PLANARIZING DIELECTRIC
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Patent #:
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Issue Dt:
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12/22/1992
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Application #:
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07513570
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Filing Dt:
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04/24/1990
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Title:
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ETCH-RESISTANT DEEP ULTRAVIOLET RESIST PROCESS HAVING AN AROMATIC TREATING STEP AFTER DEVELOPMENT
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Patent #:
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Issue Dt:
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06/29/1993
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Application #:
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07528552
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Filing Dt:
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05/25/1990
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Title:
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A METHOD IN A PARALLEL TEST APPARATUS FOR SEMICONDUCTOR MEMORIES
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Patent #:
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Issue Dt:
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06/25/1991
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Application #:
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07546008
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Filing Dt:
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06/29/1990
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Title:
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CIRCUIT CONFIGURATION FOR IDENTIFICATION OF INTEGRATED SEMICONDUCTOR CIRCUITRIES
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Patent #:
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Issue Dt:
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06/23/1992
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Application #:
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07547605
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Filing Dt:
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06/28/1990
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Title:
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INTEGRATED CIRCUIT WITH A CONFIGURATION CIRCUIT
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Patent #:
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Issue Dt:
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12/15/1992
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Application #:
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07665782
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Filing Dt:
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03/07/1991
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Title:
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INTEGRATABLE TRANSISTOR CIRCUIT FOR OUTPUTTING LOGICAL LEVELS
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Patent #:
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Issue Dt:
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07/20/1993
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Application #:
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07682142
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Filing Dt:
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04/08/1991
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Title:
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METHOD FOR PRODUCING A RESIST STRUCTURE
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Patent #:
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Issue Dt:
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11/16/1993
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Application #:
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07692364
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Filing Dt:
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04/26/1991
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Title:
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METHOD FOR PRODUCING A RESIST STRUCTURE
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Patent #:
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Issue Dt:
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05/12/1992
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Application #:
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07698332
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Filing Dt:
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05/06/1991
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Title:
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PLANAR PN-JUNCTION OF HIGH ELECTRIC STRENGTH
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Patent #:
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Issue Dt:
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10/18/1994
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Application #:
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07769172
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Filing Dt:
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09/30/1991
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Title:
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METHOD FOR DATA TRANSFER FOR A SEMICONDUCTOR MEMORY USING COMBINED CONTROL SIGNALS TO PROVIDE HIGH SPEED TRANSFER, AND SEMICONDUCTOR MEMORY FOR CARRYING OUT THE METHOD
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Patent #:
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Issue Dt:
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06/30/1992
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Application #:
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07774733
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Filing Dt:
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10/10/1991
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Title:
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INTEGRATED CIRCUIT WITH ANTI LATCH-UP CIRCUIT IN COMPLEMENTARY MOS CIRCUIT TECHNOLOGY
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Patent #:
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Issue Dt:
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07/26/1994
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Application #:
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07788642
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Filing Dt:
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11/06/1991
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Title:
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PROTECTION APPARATUS FOR SERIES PASS MOSFETS
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Patent #:
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Issue Dt:
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01/04/1994
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Application #:
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07799907
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Filing Dt:
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11/26/1991
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Title:
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INTEGRATED SEMICONDUCTOR CIRCUIT
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Patent #:
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Issue Dt:
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01/24/1995
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Application #:
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07811706
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Filing Dt:
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12/20/1991
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Title:
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PRODUCTION OF PHOTOLITHOGRAPHIC STRUCTURES
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Patent #:
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Issue Dt:
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03/16/1993
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Application #:
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07812582
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Filing Dt:
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12/20/1991
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Title:
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PROCESS FOR PRODUCING N-TERTIARY BUTOXYCARBONYL-MALEINIMIDE
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Patent #:
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Issue Dt:
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10/05/1993
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Application #:
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07812585
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Filing Dt:
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12/20/1991
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Title:
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PHOTOSTRUCTURING PROCESS
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Patent #:
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Issue Dt:
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05/10/1994
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Application #:
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07812712
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Filing Dt:
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12/23/1991
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Title:
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PROCESS FOR PRODUCING AN ARSENIC-DOPED SMOOTH POLYCRYSTALLINE SILICON LAYER FOR VERY LARGE SCALE INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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11/24/1992
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Application #:
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07823860
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Filing Dt:
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01/22/1992
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Title:
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INTEGRATED CIRCUIT FOR GENERATING A RESET SIGNAL
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Patent #:
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Issue Dt:
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07/05/1994
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Application #:
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07839787
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Filing Dt:
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02/21/1992
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Title:
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REGULATING CIRCUIT FOR A SUBSTRATE BIAS VOLTAGE GENERATOR
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Patent #:
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Issue Dt:
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11/16/1993
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Application #:
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07841693
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Filing Dt:
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02/26/1992
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Title:
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REFRACTORY METAL CAPPED LOW RESISITIVITY METAL CONDUCTOR LINES AND VIAS
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Patent #:
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Issue Dt:
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09/14/1993
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Application #:
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07854379
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Filing Dt:
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03/19/1992
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Title:
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LEVEL INVERTER CIRCUIT
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Patent #:
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Issue Dt:
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07/19/1994
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Application #:
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07869472
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Filing Dt:
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04/15/1992
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Title:
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CMOS/ECL SIGNAL LEVEL CONVERTER
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Patent #:
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Issue Dt:
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10/17/1995
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Application #:
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07920315
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Filing Dt:
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08/17/1992
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY WITH REDUNDANCY ARRANGEMENT
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Patent #:
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Issue Dt:
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08/03/1993
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Application #:
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07921425
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Filing Dt:
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07/28/1992
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Title:
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ON-CHIP INTERMEDIATE DRIVER FOR DISCRETE WSI SYSTEMS
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Patent #:
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Issue Dt:
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06/22/1993
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Application #:
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07945598
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Filing Dt:
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09/16/1992
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Title:
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CIRCUIT CONFIGURATION FOR IDENTIFICATION OF INTEGRATED SEMICONDUCTOR CIRCUITRIES
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Patent #:
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Issue Dt:
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11/29/1994
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Application #:
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07945766
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Filing Dt:
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09/16/1992
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Title:
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METHOD FOR THE PRODUCTION OF A BOTTOM RESIST
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Patent #:
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Issue Dt:
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07/05/1994
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Application #:
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07956896
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Filing Dt:
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12/29/1992
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Title:
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ARRANGEMENT WITH SELF-AMPLIFYING DYNAMIC MOS TRANSISTOR STORAGE CELLS
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Patent #:
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Issue Dt:
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03/08/1994
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Application #:
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07974855
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Filing Dt:
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11/10/1992
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY WITH PARALLEL TEST CAPABILITY AND REDUNDANCY METHOD
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Patent #:
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Issue Dt:
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07/25/1995
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Application #:
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07983866
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Filing Dt:
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03/05/1993
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Title:
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CIRCUIT ARRANGEMENT FOR TESTING A SEMICONDUCTOR MEMORY BY MEANS OF PARALLEL TESTS USING VARIOUS TEST BIT PATTERNS
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Patent #:
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Issue Dt:
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05/24/1994
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Application #:
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07984376
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Filing Dt:
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12/02/1992
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Title:
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BIT LINE ARRANGEMENT FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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07/26/1994
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Application #:
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07984579
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Filing Dt:
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03/09/1993
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Title:
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DYNAMIC SEMICONDUCTOR MEMORY HAVING LOCAL READ AMPLIFIER DRIVER CIRCUITS WHICH ARE OPTIMIZED WITH RESPECT TO THEIR DRIVE FUNCTION
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Patent #:
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Issue Dt:
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03/08/1994
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Application #:
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07988956
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Filing Dt:
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03/10/1993
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Title:
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DYNAMIC SEMICONDUCTOR MEMORY HAVING A READ AMPLIFIER DRIVE CIRCUIT FOR ACHIEVING SHORT ACCESS TIMES WITH A LOW TOTAL PEAK CURRENT
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Patent #:
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Issue Dt:
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11/16/1993
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Application #:
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08006939
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Filing Dt:
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01/21/1993
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Title:
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METHOD OF MANUFACTURING A PERFORATED WORKPIECE
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Patent #:
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Issue Dt:
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11/01/1994
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Application #:
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08059518
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Filing Dt:
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05/10/1993
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Title:
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POSITIVE 0-QUINONE DIAZIDE PHOTORESIST CONTAINING BASE COPOLYMER UTILIZING MONOMER HAVING ANHYDRIDE FUNCTION AND FURTHER MONOMER THAT INCREASES ETCH RESISTANCE
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Patent #:
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Issue Dt:
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02/07/1995
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Application #:
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08073622
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Filing Dt:
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06/03/1993
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Title:
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METHOD FOR THE SELECTIVE DEPOSITION OF TUNGSTEN ON A SILICON SURFACE
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Patent #:
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Issue Dt:
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11/28/1995
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Application #:
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08087814
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Filing Dt:
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07/09/1993
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Title:
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FERROELECTRIC MEMORY CELL ARRANGEMENT
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Patent #:
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Issue Dt:
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03/14/1995
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Application #:
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08088153
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Filing Dt:
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07/06/1993
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Title:
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SWITCHING STAGE
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Patent #:
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Issue Dt:
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07/11/1995
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Application #:
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08122302
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Filing Dt:
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09/17/1993
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Title:
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MANUFACTURING METHOD FOR A SELF-ALIGNED THROUGH HOLE AND SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
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03/12/1996
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Application #:
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08126333
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Filing Dt:
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09/24/1993
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Title:
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TERNARY/BINARY CONVERTER CIRCUIT
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Patent #:
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Issue Dt:
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08/15/1995
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Application #:
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08129959
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Filing Dt:
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09/30/1993
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Title:
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INTEGRATED CIRCUIT FOR GENERATING A RESET SIGNAL
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Patent #:
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Issue Dt:
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06/25/1996
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Application #:
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08172017
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Filing Dt:
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12/22/1993
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Title:
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METHOD OF DEPOSITING CONDUCTORS IN HIGH ASPECT RATIO APERTURES UNDER HIGH TEMPERATURE CONDITIONS
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Patent #:
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Issue Dt:
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01/03/1995
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Application #:
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08182187
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Filing Dt:
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01/26/1994
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Title:
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COMPACT SEMICONDUCTOR STORAGE ARRANGEMENT AND METHOD FOR ITS PRODUCTION
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Patent #:
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Issue Dt:
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12/23/1997
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Application #:
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08192188
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Filing Dt:
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02/04/1994
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH TRENCH CAPACITOR AND METHOD FOR THE PRODUCTION THEREOF
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Patent #:
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Issue Dt:
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08/08/1995
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Application #:
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08193317
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Filing Dt:
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02/08/1994
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Title:
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OFF-CHIP DRIVER WITH VOLTAGE REGULATED PREDRIVE
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Patent #:
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Issue Dt:
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05/30/1995
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Application #:
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08193927
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Filing Dt:
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02/09/1994
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Title:
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ZAG FUSE FOR REDUCED BLOW-CURRENT APPLICATION
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Patent #:
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Issue Dt:
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10/10/1995
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Application #:
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08198502
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Filing Dt:
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02/17/1994
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Title:
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COLUMN REDUNDANCE CIRCUIT CONFIGURATION FOR A MEMORY
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Patent #:
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Issue Dt:
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06/27/1995
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Application #:
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08209027
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Filing Dt:
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03/09/1994
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Title:
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AMORPHOUS, HYDROGENTATED CARBON AS AN INSULATOR IN DEVICE FABRICATION
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Patent #:
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Issue Dt:
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12/05/1995
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Application #:
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08217854
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Filing Dt:
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03/25/1994
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Title:
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METHOD FOR MANUFACTURING TUNNEL-EFFECT SENSORS
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Patent #:
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Issue Dt:
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09/12/1995
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Application #:
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08222597
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Filing Dt:
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04/04/1994
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Title:
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METHOD FOR MANUFACTURING ROD-SHAPED SILICON STRUCTURES
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Patent #:
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Issue Dt:
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09/05/1995
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Application #:
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08268378
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Filing Dt:
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06/29/1994
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Title:
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SHALLOW TRENCH ISOLATION WITH THIN NITRIDE LINER
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Patent #:
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Issue Dt:
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09/24/1996
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Application #:
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08269857
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Filing Dt:
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06/30/1994
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Title:
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P-MOSFETS WITH ENHANCED ANOMALOUS NARROW CHANNEL EFFECT
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Patent #:
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Issue Dt:
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07/01/1997
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Application #:
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08279106
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Filing Dt:
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07/22/1994
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Title:
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METHOD FOR PRODUCING A SEMICONDUCTOR LAYER STRUCTURE HAVING A PLANARIZED SURFACE AND THE USE THEREOF IN THE MANUFACTURE OF BIPOLAR TRANSISTORS AND DRAMS
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Patent #:
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Issue Dt:
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01/07/1997
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Application #:
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08279918
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Filing Dt:
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07/25/1994
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Title:
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VOLTAGE GENERATOR CIRCUIT
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Patent #:
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Issue Dt:
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08/13/1996
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Application #:
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08279919
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Filing Dt:
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07/25/1994
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Title:
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CHARGE PUMP
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Patent #:
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Issue Dt:
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07/11/1995
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Application #:
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08284502
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Filing Dt:
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08/04/1994
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Title:
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PROCESS FOR MAKING A CONTACT BETWEEN A CAPACITOR ELECTRODE DISPOSED IN A TRENCH AND AN MOS TRANSISTOR SOURCE/DRAIN REGION DISPOSED OUTSIDE THE TRENCH
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Patent #:
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Issue Dt:
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03/19/1996
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Application #:
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08294333
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Filing Dt:
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08/23/1994
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Title:
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METHOD FOR MANUFACTURING A BIT LINE VIA HOLE IN A MEMORY CELL
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Patent #:
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Issue Dt:
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04/30/1996
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Application #:
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08301285
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Filing Dt:
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09/06/1994
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Title:
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METHOD FOR THE PRODUCTION OF A BOTTOM RESIST
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Patent #:
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Issue Dt:
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11/07/1995
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Application #:
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08317151
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Filing Dt:
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10/03/1994
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Title:
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METHOD OF MAKING CONTACT FOR SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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01/23/1996
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Application #:
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08330227
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Filing Dt:
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10/27/1994
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Title:
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NEGATIVE RESISTS WITH HIGH THERMAL STABILITY COMPRISING END CAPPED POLYBENZOXAZOLE AND BISAZIDE
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Patent #:
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Issue Dt:
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08/13/1996
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Application #:
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08334478
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Filing Dt:
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11/04/1994
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Title:
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PERSONALIZED AREA LEADFRAME COINING OR HALF ETCHING FOR REDUCED MECHANICAL STRESS AT DEVICE EDGE
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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08340500
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Filing Dt:
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11/15/1994
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Title:
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UNIT CELL LAYOUT AND TRANSFER GATE DESIGN FOR HIGH DENSITY DRAMS HAVING A TRENCH CAPACITOR WITH SIGNAL ELECTRODE COMPOSED OF THREE DIFFENTLY DOPED POLYSILICON LAYERS
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Patent #:
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Issue Dt:
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03/05/1996
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Application #:
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08351464
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Filing Dt:
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12/06/1994
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Title:
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PROCESS FOR PRODUCING STORAGE CAPACITORS FOR DRAM CELLS
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08359790
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Filing Dt:
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12/20/1994
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Title:
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EMBEDDED PHASE SHIFTING PHOTOMASKS AND METHOD FOR MANUFACTURING SAME
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08362399
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Filing Dt:
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12/22/1994
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Title:
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GLOBAL PLANARIZATION USING SELF ALIGNED POLISHING OR SPACER TECHNIQUE AND ISOTROPIC ETCH PROCESS
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Patent #:
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Issue Dt:
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10/14/1997
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Application #:
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08365649
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Filing Dt:
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12/29/1994
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Title:
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PROCESS FOR FABRICATING A DRAM TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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07/30/1996
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Application #:
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08365932
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Filing Dt:
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12/29/1994
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Title:
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MICROELECTRONIC COMPONENT
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Patent #:
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Issue Dt:
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03/05/1996
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Application #:
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08366361
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Filing Dt:
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12/29/1994
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY DEVICE CAPABLE OF SWITCHING FROM A MEMORY MODE TO AN INTERNAL TEST MODE
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Patent #:
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Issue Dt:
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09/03/1996
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Application #:
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08371829
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Filing Dt:
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01/12/1995
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT AND METHOD FOR ITS OPERATION
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Patent #:
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Issue Dt:
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08/13/1996
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Application #:
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08376683
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Filing Dt:
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01/23/1995
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Title:
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CIRCUIT ARRAY FOR AMPLIFYING AND HOLDING DATA WITH DIFFERENT SUPPLY VOLTAGES
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Patent #:
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Issue Dt:
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06/25/1996
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Application #:
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08377049
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Filing Dt:
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01/23/1995
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Title:
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METHOD FOR MANUFACTURING A CUBICALLY INTEGRATED CIRCUIT ARRANGEMENT
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Patent #:
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Issue Dt:
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02/04/1997
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Application #:
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08382048
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Filing Dt:
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02/10/1995
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Title:
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DRAM-TYPE MEMORY CELL ARRANGEMENT ON A SUBSTRATE
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Patent #:
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Issue Dt:
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08/29/2000
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Application #:
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08386136
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Filing Dt:
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02/09/1995
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Title:
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PHOTORESISTS WHICH ARE SUITABLE FOR PRODUCING SUB-MICRON SIZE STRUCTURES
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Patent #:
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Issue Dt:
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12/01/1998
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Application #:
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08414241
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Filing Dt:
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03/31/1995
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Title:
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ABLATION PATTERNING OF MULTI-LAYERED STRUCTURES
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Patent #:
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Issue Dt:
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04/21/1998
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Application #:
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08425827
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Filing Dt:
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04/20/1995
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Title:
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METHOD FOR CHECKING SEMICONDUCTOR WAFERS AND APPARATUSES FOR CARRYING OUT THE METHOD
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08430011
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Filing Dt:
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04/27/1995
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Title:
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ISOTROPIC SILICON ETCH PROCESS THAT IS HIGHLY SELECTIVE TO TUNGSTEN
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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08430972
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Filing Dt:
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04/28/1995
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Title:
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TWO-STEP CHEMICAL MECHANICAL POLISH SURFACE PLANARIZATION TECHNIQUE
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Patent #:
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Issue Dt:
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04/01/1997
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Application #:
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08434955
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Filing Dt:
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05/04/1995
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Title:
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COPOLYMERS
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Patent #:
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Issue Dt:
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02/11/1997
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Application #:
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08443298
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Filing Dt:
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05/17/1995
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Title:
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MULTILAYER PRINTED CIRCUIT BOARDS AND MULTICHIP-MODULE SUBSTRATES WITH LAYERS OF AMORPHOUS HYDROGENATED CARBON
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Patent #:
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Issue Dt:
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11/19/1996
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Application #:
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08458848
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Filing Dt:
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06/02/1995
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Title:
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PERSONALIZED AREA LEADFRAME COINING OR HALF ETCHING FOR REDUCED MECHANICAL STRESS AT DEVICE EDGE
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Patent #:
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Issue Dt:
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09/17/1996
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Application #:
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08495246
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Filing Dt:
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06/27/1995
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Title:
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CONNECTION AND BUILD-UP TECHNIQUE FOR MULTICHIP MODULES
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Patent #:
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Issue Dt:
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11/05/1996
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Application #:
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08498165
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Filing Dt:
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07/05/1995
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Title:
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MODULE BOARD INCLUDING CONDUCTOR TRACKS HAVING DISCONNECTABLE CONNECTING ELEMENTS
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08498687
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Filing Dt:
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07/03/1995
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Title:
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METHOD FOR HIERARCHIC LOGIC VERIFICATION OF VLSI CIRCUITS
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Patent #:
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Issue Dt:
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08/12/1997
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Application #:
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08514602
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Filing Dt:
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08/14/1995
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Title:
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REDUNDANT CIRCUIT CONFIGURATION FOR AN INTEGRATED SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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07/28/1998
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Application #:
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08537915
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Filing Dt:
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10/31/1995
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Title:
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PROCESS FOR DEPOSITING A SURFACE-WIDE LAYER THROUGH A MASK AND OPTIONALLY CLOSING SAID MASK
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08542360
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Filing Dt:
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10/12/1995
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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12/08/1998
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Application #:
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08545647
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Filing Dt:
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11/03/1995
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Title:
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CONTACT STRUCTURE FOR VERTICAL CHIP CONNECTIONS
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08545650
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Filing Dt:
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11/03/1995
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Title:
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PROCESS FOR PRODUCING SEMICONDUCTOR COMPONENTS BETWEEN WHICH CONTACT IS MADE VERTICALLY
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Patent #:
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Issue Dt:
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12/29/1998
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Application #:
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08563882
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Filing Dt:
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11/21/1995
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Title:
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TRANSISTOR ISOLATION PROCESS
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Patent #:
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Issue Dt:
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07/15/1997
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Application #:
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08571879
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Filing Dt:
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01/05/1995
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Title:
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RADIATION-SENSITIVE RESIST COMPOSITION COMPRISING A DIAZOKETONE
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Patent #:
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Issue Dt:
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10/12/1999
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Application #:
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08603409
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Filing Dt:
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02/20/1996
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Title:
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FLEXIBLE ECC/PARITY BIT ARCHITECTURE
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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08605901
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Filing Dt:
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02/23/1996
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Title:
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TEST CIRCUIT AND TESTING METHOD FOR FUNCTION TESTING OF ELECTRONIC CIRCUITS
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08610047
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Filing Dt:
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03/04/1996
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Title:
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SEMICONDUCTOR MEMORY WITH CELLS COMBINED INTO INDIVIDUALLY ADDRESSABLE UNITS, AND METHOD FOR OPERATING SUCH MEMORIES
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Patent #:
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Issue Dt:
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09/29/1998
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Application #:
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08617125
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Filing Dt:
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03/18/1996
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Title:
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AN INTEGRATED CIRCUIT BOARD WITH BUILT-IN TERMINAL CONNECTION TESTING CIRCUITRY
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Patent #:
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Issue Dt:
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11/18/1997
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Application #:
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08618488
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Filing Dt:
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03/19/1996
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Title:
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METHODS FOR PRODUCING POLYBENZOXAZOL PRECURSORS AND CORRESPONDING RESIST SOLUTIONS
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Patent #:
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Issue Dt:
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03/11/1997
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Application #:
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08625840
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Filing Dt:
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04/01/1996
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Title:
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LOW POWER SENSE AMPLIFIER FOR GAIN MEMORY CELLS
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