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Patent #:
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Issue Dt:
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03/28/2000
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Application #:
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09274733
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Filing Dt:
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03/23/1999
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Title:
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DRAM CELL ARRANGEMENT AND METHOD FOR ITS PRODUCTION
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09275834
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Filing Dt:
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03/25/1999
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Title:
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SEMICONDUCTOR MEMORY WITH A STRIP-SHAPED CELL PLATE
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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09277280
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Filing Dt:
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03/26/1999
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Title:
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CIRCUIT CONFIGURATION AND METHOD FOR AUTOMATIC RECOGNITION AND ELIMINATION OF WORD LINE/BIT LINE SHORT CIRCUITS
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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09277281
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Filing Dt:
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03/26/1999
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Title:
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CONFIGURATION FOR INDENTIFYING CONTACT FAULTS DURING THE TESTING OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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06/11/2002
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Application #:
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09285897
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Filing Dt:
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04/08/1999
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Title:
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METHOD FOR FABRICATING A STACKED CAPACITOR IN A SEMICONDUCTOR CONFIGURATION, AND STACKED CAPACITOR FABRICATED BY THIS METHOD
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09289491
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Filing Dt:
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04/09/1999
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Title:
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METHOD AND APPARATUS FOR THE TREATMENT OF OBJECTS, PREFERABLY WAFERS
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09302649
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Filing Dt:
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04/30/1999
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Title:
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CONFIGURATION FOR TESTING A PLURALITY OF MEMORY CHIPS ON A WAFER
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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09302655
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Filing Dt:
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04/30/1999
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Title:
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METHOD FOR FABRICATING A CAPACITOR FOR A SEMICONDUCTOR MEMORY CONFIGURATION
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Patent #:
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Issue Dt:
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06/29/2004
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Application #:
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09311118
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Filing Dt:
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05/13/1999
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Title:
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OPTIMIZED-DELAY MULTIPLEXER
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Patent #:
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Issue Dt:
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10/03/2000
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Application #:
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09312571
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Filing Dt:
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05/14/1999
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Title:
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MANUFACTURING METHOD FOR A CAPACITOR IN AN INTEGRATED STORAGE CIRCUIT
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09312572
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Filing Dt:
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05/14/1999
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Title:
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MANUFACTURING METHOD FOR A CAPACITOR IN AN INTEGRATED MEMORY CIRCUIT
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09313422
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Filing Dt:
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05/17/1999
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Title:
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METHOD OF HOLDING A WAFER AND TESTING THE INTEGRATED CIRCUITS ON THE WAFER
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09315328
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Filing Dt:
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05/20/1999
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Title:
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SEMICONDUCTOR MEMORY HAVING DIFFERENTIAL BIT LINES
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Patent #:
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Issue Dt:
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06/11/2002
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Application #:
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09315329
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Filing Dt:
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05/20/1999
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Title:
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PROCESS FOR PRODUCING METAL-CONTAINING LAYERS
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09321174
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Filing Dt:
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05/27/1999
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Title:
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FUSE-LATCH CIRCUIT
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09322717
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Filing Dt:
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05/28/1999
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Title:
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CIRCUIT CONFIGURATION FOR BURN-IN SYSTEMS FOR TESTING MODULES BY USING A BOARD
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Patent #:
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Issue Dt:
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12/12/2000
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Application #:
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09322718
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Filing Dt:
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05/28/1999
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Title:
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CONFIGURATION FOR CROSSTALK ATTENUATION IN WORD LINES OF DRAM CIRCUITS
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09326366
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Filing Dt:
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06/04/1999
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Title:
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BONDING PAD TEST CONFIGURATION
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09327699
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Filing Dt:
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06/08/1999
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Title:
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INTEGRATED SEMICONDUCTOR CIRCUIT HAVING DUMMY STRUCTURES
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09335561
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Filing Dt:
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06/18/1999
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Title:
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DEVICE FOR THE DEPOSITION OF SUBSTANCES
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Patent #:
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Issue Dt:
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01/16/2001
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Application #:
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09343429
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Filing Dt:
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06/30/1999
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Title:
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DYNAMIC SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR INITIALIZING A DYNAMIC SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09343431
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Filing Dt:
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06/30/1999
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Title:
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DYNAMIC SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR INTIALIZING A DYNAMIC SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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09344922
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Filing Dt:
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06/28/1999
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Title:
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INTEGRATED MEMORY
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Patent #:
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Issue Dt:
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10/10/2000
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Application #:
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09346379
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Filing Dt:
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07/01/1999
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Title:
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OUTPUT DRIVER OF AN INTEGRATED SEMICONDUCTOR CHIP
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Patent #:
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Issue Dt:
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02/13/2001
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Application #:
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09348736
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Filing Dt:
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07/06/1999
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Title:
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INTEGRATED MEMORY HAVING COLUMN DECODGE FOR ADDRESSING CORRESPONDING BIT
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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09352992
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Filing Dt:
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07/14/1999
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Title:
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CONFIGURATION AND METHOD FOR STORING THE TEST RESULTS OBTAINED BY A BIST CIRCUIT
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09353612
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Filing Dt:
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07/14/1999
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Title:
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CONFIGURATION FOR TESTING CHIPS
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Patent #:
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Issue Dt:
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02/20/2001
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Application #:
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09356402
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Filing Dt:
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07/16/1999
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Title:
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METHOD OF PRODUCING A STACKED CAPACITOR
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Patent #:
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Issue Dt:
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10/17/2000
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Application #:
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09356811
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Filing Dt:
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07/19/1999
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Title:
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INTEGRATED CIRCUIT WITH A VOLTAGE REGULATOR
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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09356813
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Filing Dt:
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07/19/1999
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Title:
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INTEGRATED CIRCUIT HAVING A SELF-TEST DEVICE
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09356955
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Filing Dt:
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07/19/1999
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Title:
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CONFIGURATION FOR TESTING INTEGRATED COMPONENTS
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09360944
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Filing Dt:
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07/26/1999
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Title:
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PROCESS FOR CLEANING CVD UNITS
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Patent #:
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Issue Dt:
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07/17/2001
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Application #:
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09360973
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Filing Dt:
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07/27/1999
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Title:
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COMPOSITE MEMBER COMPOSED OF AT LEAST TWO INTEGRATED CIRCUITS AND METHOD FOR THE MANUFACTURE OF A COMPOSITE MEMBER COMPOSED OF AT LEAST TWO INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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10/23/2001
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Application #:
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09363263
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Filing Dt:
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07/29/1999
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Title:
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INTEGRATED SEMICONDUCTOR CHIP WITH MODULAR DUMMY STRUCTURES
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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09363277
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Filing Dt:
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07/28/1999
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Title:
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TRENCH CAPACITOR WITH AN INSULATION COLLAR AND METHOD FOR PRODUCING A TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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07/02/2002
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Application #:
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09368134
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Filing Dt:
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08/04/1999
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Title:
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INTEGRATED CIRCUIT HAVING A SELF-TEST DEVICE AND METHOD FOR PRODUCING THE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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11/06/2001
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Application #:
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09372307
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Filing Dt:
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08/11/1999
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Title:
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METHOD OF TESTING LEAKAGE CURRENT AT A CONTACT-MAKING POINT IN AN INTEGRATED CIRCUIT BY DETERMINING A POTENTIAL AT THE CONTACT-MAKING POINT
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09374893
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Filing Dt:
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08/13/1999
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Title:
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PROCESS FOR PRODUCING STRUCTURED LAYERS, PROCESS FOR PRODUCING COMPONENTS OF AN INTEGRATED CIRCUIT, AND PROCESS FOR PRODUCING A MEMORY CONFIGURATION
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Patent #:
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Issue Dt:
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06/27/2000
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Application #:
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09374894
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Filing Dt:
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08/13/1999
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Title:
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COMBINED PRECHARGING AND HOMOGENIZING CIRCUIT
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09374895
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Filing Dt:
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08/13/1999
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Title:
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INTEGRATED SEMICONDUCTOR CHIP HAVING LEADS TO ONE OR MORE EXTERNAL TERMINALS
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Patent #:
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Issue Dt:
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02/13/2001
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Application #:
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09384701
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Filing Dt:
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08/27/1999
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY WITH CONTROL DEVICE FOR CLOCK-SYNCHRONOUS WRITING AND READING
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Patent #:
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Issue Dt:
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04/11/2000
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Application #:
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09407384
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Filing Dt:
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09/28/1999
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Title:
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GAPFILL OF SEMICONDUCTOR STRUCTURE USING DOPED SILICATE GLASSES
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09428582
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Filing Dt:
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10/28/1999
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Title:
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METHOD AND AN APPARATUS FOR TREATING WASTEWATER FROM A CHEMICAL-MECHANICAL POLISHING PROCESS USED IN CHIP FABRICATION
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09452217
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Filing Dt:
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12/01/1999
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Title:
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REDUCING OXIDATION STRESS IN THE FABRICATION OF DEVICES
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09482064
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Filing Dt:
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01/13/2000
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Title:
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METHOD OF FORMING DRAM CELL ARRANGEMENT
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09541952
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Filing Dt:
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04/03/2000
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Title:
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METHOD FOR DRAM CELL ARRANGEMENT AND METHOD FOR ITS PRODUCTION
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09621433
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Filing Dt:
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07/21/2000
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Title:
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Method for fabricating stacked vias
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09690298
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Filing Dt:
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10/17/2000
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Title:
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MEMORY CONFIGURATION HAVING REDUNDANT MEMORY LOCATIONS AND METHOD FOR ACCESSING REDUNDANT MEMORY LOCATIONS
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09708279
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Filing Dt:
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11/08/2000
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Title:
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SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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09716336
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Filing Dt:
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11/20/2000
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Title:
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INTEGRATED CIRCUIT CONFIGURATION HAVING AT LEAST ONE TRANSISTOR AND ONE CAPACITOR, AND METHOD FOR FABRICATING IT
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Patent #:
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Issue Dt:
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04/15/2003
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Application #:
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09734466
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Filing Dt:
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12/11/2000
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Publication #:
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Pub Dt:
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09/12/2002
| | | | |
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Title:
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STORAGE CAPACITOR FOR A DRAM
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Patent #:
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Issue Dt:
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10/22/2002
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Application #:
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09751961
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Filing Dt:
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12/29/2000
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Publication #:
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Pub Dt:
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09/27/2001
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Title:
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METHOD FOR FABRICATING SEMICONDUCTOR COMPONENTS
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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09767393
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Filing Dt:
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01/23/2001
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Publication #:
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Pub Dt:
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08/09/2001
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Title:
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INTEGRATED CIRCUIT HAVING A SELF-TEST DEVICE FOR CARRYING OUT A SELF-TEST OF THE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09773218
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Filing Dt:
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01/31/2001
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Publication #:
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Pub Dt:
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10/18/2001
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Title:
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METHOD FOR FABRICATING A MEMORY CELL
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Patent #:
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Issue Dt:
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10/16/2001
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Application #:
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09776954
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Filing Dt:
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02/05/2001
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Publication #:
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Pub Dt:
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09/06/2001
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Title:
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Integrated circuit with electrical connection points that can be severed by the action of enegry
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Patent #:
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Issue Dt:
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07/09/2002
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Application #:
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09793789
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Filing Dt:
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02/26/2001
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Publication #:
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Pub Dt:
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08/30/2001
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Title:
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METHOD OF REPAIRING DEFECTIVE MEMORY CELLS OF AN INTEGRATED MEMORY
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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09796208
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Filing Dt:
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02/28/2001
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Publication #:
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Pub Dt:
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10/25/2001
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Title:
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MICROELECTRONIC MEMORY CELL STRUCTURE WITH A LAYER OF TIN HAVING N:TI
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09806617
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Filing Dt:
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03/30/2001
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Title:
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MAGNETORESISTIVE ELEMENT AND THE USE THEREOF AS STORAGE ELEMENT IN A STORAGE CELL ARRAY
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09829871
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Filing Dt:
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04/10/2001
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Publication #:
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Pub Dt:
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08/30/2001
| | | | |
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Title:
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APPARATUS FOR TREATING WASTEWATER FROM A CHEMICAL-MECHANICAL POLISHING PROCESS USED IN CHIP FABRICATION
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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09885553
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Filing Dt:
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06/20/2001
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Publication #:
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Pub Dt:
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10/25/2001
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Title:
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MOS TRANSISTOR IN A SINGLE-TRANSISTOR MEMORY CELL HAVING A LOCALLY THICKENED GATE OXIDE
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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09976233
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Filing Dt:
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10/12/2001
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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METHOD OF PRODUCING AN INTEGRATED CIRCUIT CONFIGURATION
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