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Patent #:
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Issue Dt:
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07/12/1983
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Application #:
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06247676
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Filing Dt:
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03/26/1981
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Title:
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METHOD AND APPARATUS FOR SEQUENCING ADDRESSES OF A FAST FOURIER TRANSFORM ARRAY
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Patent #:
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Issue Dt:
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10/25/1983
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Application #:
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06305015
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Filing Dt:
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09/24/1981
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Title:
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ZERO-CROSSING INTERPOLATOR TO REDUCE ISOCHRONOUS DISTORTION IN A DIGITAL FSK MODEM
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Patent #:
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Issue Dt:
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02/26/1985
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Application #:
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06499747
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Filing Dt:
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05/31/1983
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Title:
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FLUORINE PLASMA OXIDATION OF RESIDUAL SULFUR SPECIES
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Patent #:
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Issue Dt:
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08/27/1985
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Application #:
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06529917
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Filing Dt:
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09/07/1983
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Title:
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HIGH SPEED REFERENCELESS BIPOLAR LOGIC GATE WITH MINIMUN INPUT CURRENT
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Patent #:
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Issue Dt:
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05/29/1984
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Application #:
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06529920
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Filing Dt:
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09/07/1983
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Title:
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METHOD FOR INTERCONNECTING METALLIC LAYERS
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Patent #:
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Issue Dt:
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10/14/1986
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Application #:
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06530176
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Filing Dt:
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09/07/1983
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Title:
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EMITTER COUPLED LOGIC HAVING ENHANCED SPEED CHARACTERISTIC FOR TURN - OFF
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Patent #:
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Issue Dt:
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09/03/1985
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Application #:
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06550528
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Filing Dt:
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11/09/1983
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Title:
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DYNAMIC ECL CIRCUIT ADAPTED TO DRIVE LOADS HAVING SIGNIFICANT CAPACITANCE
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Patent #:
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Issue Dt:
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10/15/1985
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Application #:
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06550529
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Filing Dt:
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11/09/1983
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Title:
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ECL LOGIC CIRCUIT WITH A BIAS CIRCUIT FOR DYNAMICALLY SWITCHABLE LOW DROP CURRENT SOURCE
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Patent #:
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Issue Dt:
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11/05/1985
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Application #:
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06562802
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Filing Dt:
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12/19/1983
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Title:
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ECL GATE WITH SWITCHED LOAD CURRENT SOURCE
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Patent #:
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Issue Dt:
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03/18/1986
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Application #:
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06564812
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Filing Dt:
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12/22/1983
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Title:
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OUTPUT VOLTAGE DRIVER WITH TRANSIENT ACTIVE PULL-DOWN
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Patent #:
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Issue Dt:
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08/06/1985
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Application #:
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06567971
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Filing Dt:
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01/04/1984
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Title:
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PROCESS FOR FORMING SLOTS HAVING NEAR VERTICAL SIDEWALLS AT THEIR UPPER EXTREMITIES
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Patent #:
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Issue Dt:
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04/01/1986
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Application #:
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06576658
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Filing Dt:
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02/03/1984
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Title:
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PROCESS FOR FORMING SLOTS OF DIFFERENT TYPES IN SELF-ALIGNED RELATIONSHIP USING A LATENT IMAGE MASK
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Patent #:
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Issue Dt:
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04/12/1988
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Application #:
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06585315
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Filing Dt:
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03/01/1984
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Title:
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CURRENT SOURCE ARRANGEMENT FOR THREE-LEVEL EMITTER-COUPLED LOGIC AND FOUR-LEVEL CURRENT MODE LOGIC
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Patent #:
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Issue Dt:
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04/08/1986
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Application #:
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06593335
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Filing Dt:
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03/26/1984
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Title:
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FORMING A CONDUCTIVE, PROTECTIVE LAYER FOR MULTILAYER METALLIZATION
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Patent #:
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Issue Dt:
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12/17/1985
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Application #:
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06597618
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Filing Dt:
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04/06/1984
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Title:
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TEMPERATURE TRACKING AND SUPPLY VOLTAGE INDEPENDENT LINE DRIVER FOR ECL CIRCUITS
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Patent #:
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Issue Dt:
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12/09/1986
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Application #:
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06605320
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Filing Dt:
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04/30/1984
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Title:
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PHASE DETECTOR
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Patent #:
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Issue Dt:
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03/17/1987
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Application #:
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06681447
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Filing Dt:
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12/13/1984
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Title:
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SWITCHED CAPACITOR COUPLED LINE RECEIVER CIRCUIT
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Patent #:
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Issue Dt:
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08/26/1986
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Application #:
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06682384
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Filing Dt:
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12/17/1984
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Title:
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CONTROLLABLE EFFECTIVE RESISTANCE AND PHASE LOCK LOOP WITH CONTROLLABE FILTER
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Patent #:
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Issue Dt:
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05/26/1987
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Application #:
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06697374
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Filing Dt:
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02/01/1985
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Title:
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LOW ORDER CHARGE-PUMP FILTER
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Patent #:
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Issue Dt:
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08/11/1987
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Application #:
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06697545
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Filing Dt:
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02/01/1985
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Title:
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PHASE DETECTOR AND PHASE-LOCKED LOOP APPARATUS
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Patent #:
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Issue Dt:
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06/02/1987
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Application #:
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06702962
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Filing Dt:
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02/19/1985
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Title:
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MULTILEVEL DIFFERENTIAL ECL/CML GATE CIRCUIT
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Patent #:
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Issue Dt:
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11/11/1986
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Application #:
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06707728
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Filing Dt:
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03/04/1985
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Title:
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METHOD OF MAKING AN ISOLATION SLOT FOR INTEGRATED CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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02/10/1987
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Application #:
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06707730
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Filing Dt:
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03/04/1985
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Title:
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METHOD OF MAKING AN INTERGRATED CIRCUIT STRUCTURE WITH SELF-ALIGNED EXTRINSIC BASE FROM EMITTER
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Patent #:
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Issue Dt:
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08/12/1986
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Application #:
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06718393
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Filing Dt:
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04/01/1985
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Title:
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METHOD OF FABRICATING INTEGRATED CIRCUIT STRUCTURE HAVING CMOS AND BIPOLAR DEVICES
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Patent #:
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Issue Dt:
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12/02/1986
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Application #:
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06719185
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Filing Dt:
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04/03/1985
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Title:
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METHOD FOR PLANARIZING AN ISOLATION SLOT IN AN INTEGRATED CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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11/18/1986
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Application #:
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06720824
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Filing Dt:
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04/08/1985
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Title:
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METHOD OF MAKING INTEGRATED BIPOLAR SEMICONDUCTOR DEVICE BY FIRST FORMING JUNCTION ISOLATION REGIONS AND RECESSED OXIDE ISOLATION REGIONS WITHOUT BIRDS BEAK
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Patent #:
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Issue Dt:
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06/09/1987
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Application #:
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06722957
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Filing Dt:
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04/12/1985
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Title:
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INTEGRATED CIRCUIT STRUCTURE HAVING CONDUCTIVE, PROTECTIVE LAYER FOR MULTILAYER METALLIZATION TO PERMIT REWORKING
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Patent #:
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Issue Dt:
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05/17/1988
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Application #:
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06730709
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Filing Dt:
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05/03/1985
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Title:
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TEMPERATURE COMPENSATION FOR ECL CIRCUITS
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Patent #:
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Issue Dt:
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07/28/1987
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Application #:
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06747517
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Filing Dt:
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06/21/1985
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Title:
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FAST BIPOLAR TRANSISTOR FOR INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING SAME
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Patent #:
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Issue Dt:
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04/12/1988
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Application #:
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06759623
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Filing Dt:
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07/26/1985
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Title:
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SERIAL PORT SYNCHRONIZER
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Patent #:
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Issue Dt:
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04/05/1988
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Application #:
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06759624
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Filing Dt:
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07/26/1985
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Title:
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PROGRAMMABLE DATA-ROUTING MULTIPLEXER
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Patent #:
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Issue Dt:
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04/07/1987
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Application #:
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06759625
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Filing Dt:
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07/26/1985
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Title:
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PROCESS FOR SMOOTHING A NON-PLANAR SURFACE
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Patent #:
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Issue Dt:
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09/16/1986
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Application #:
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06770817
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Filing Dt:
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08/28/1985
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Title:
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MERGED PMOS/BIPOLAR LOGIC CIRCUITS
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Patent #:
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Issue Dt:
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05/26/1987
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Application #:
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06771386
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Filing Dt:
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08/30/1985
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Title:
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ANTI-CORROSION TREATMENT FOR PATTERNING OF METALLIC LAYERS
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Patent #:
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Issue Dt:
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05/01/1990
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Application #:
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06777149
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Filing Dt:
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09/18/1985
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Title:
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BIPOLAR AND MOS DEVICES FABRICATED ON SAME INTEGRATED CIRCUIT SUBSTRATE
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Patent #:
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Issue Dt:
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11/17/1987
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Application #:
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06777153
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Filing Dt:
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09/18/1985
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Title:
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METHOD OF MAKING A PLANAR STRUCTURE CONTAINING MOS AND BIPOLAR TRANSISTORS
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Patent #:
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Issue Dt:
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06/02/1987
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Application #:
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06794357
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Filing Dt:
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11/01/1985
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Title:
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INTEGRATED CIRCUIT FABRICATION PROCESS FOR FORMING A BIPOLAR TRANSISTOR HAVING EXTRINSIC BASE REGIONS
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Patent #:
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Issue Dt:
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03/24/1987
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Application #:
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06795367
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Filing Dt:
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11/06/1985
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Title:
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RINGING APPLICATION CIRCUIT
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Patent #:
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Issue Dt:
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07/07/1987
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Application #:
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06817228
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Filing Dt:
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01/08/1986
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Title:
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TTL COMPATIBLE MERGED BIPOLAR/CMOS OUTPUT BUFFER CIRCUITS
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Patent #:
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Issue Dt:
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05/19/1987
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Application #:
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06831012
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Filing Dt:
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02/19/1986
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Title:
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HIGH-SPEED FULL DIFFERENTIAL AMPLIFIER WITH COMMON MODE REJECTION
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Patent #:
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Issue Dt:
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05/26/1987
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Application #:
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06831020
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Filing Dt:
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02/19/1986
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Title:
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HIGH SPEED OPERATIONAL AMPLIFIER
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Patent #:
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Issue Dt:
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06/19/1990
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Application #:
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06836025
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Filing Dt:
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03/04/1986
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Title:
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SIGNAL PROCESSOR MEMORY MANAGEMENT UNIT WITH INDIRECT ADDRESSING USING SELECTABLE OFFSETS & MODULO VALUES FOR INDEXED ADDRESS CALCULATIONS
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Patent #:
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|
Issue Dt:
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08/14/1990
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Application #:
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06836936
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Filing Dt:
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03/06/1986
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Title:
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POINTER INPLEMENTED FIFO CONTROLLER FOR CONVERTING A STANDARD RAM INTO A SIMULATED DUAL FIFO BY CONTROLLING THE RAM,S ADDRESS INPUTS.
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Patent #:
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Issue Dt:
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03/14/1989
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Application #:
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06838993
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Filing Dt:
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03/12/1986
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Title:
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FRACTURABLE X-Y STORAGE ARRAY USING A RAM CELL WITH BIDIRECTIONAL SHIFT
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Patent #:
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Issue Dt:
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08/18/1987
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Application #:
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06853504
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Filing Dt:
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04/18/1986
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Title:
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DYNAMIC ECL LINE DRIVER CIRCUIT
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Patent #:
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Issue Dt:
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05/29/1990
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Application #:
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06869759
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Filing Dt:
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06/02/1986
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Title:
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MOS TRANSISTOR CONSTRUCTION WITH SELF ALIGNED SILICIDED CONTACTS TO GATE, SOURCE, AND DRAIN REGIONS
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Patent #:
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Issue Dt:
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09/13/1988
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Application #:
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06891438
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Filing Dt:
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07/28/1986
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Title:
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TIME-SLOT ASSIGNER MULTIPLEXER
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Patent #:
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Issue Dt:
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01/24/1989
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Application #:
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06891713
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Filing Dt:
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07/30/1986
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Title:
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WORD-SLICED SIGNAL PROCESSOR
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Patent #:
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Issue Dt:
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06/07/1988
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Application #:
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06897686
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Filing Dt:
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08/18/1986
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Title:
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VERTICAL SLOT BOTTOM BIPOLAR TRANSISTOR STRUCTURE
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Patent #:
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Issue Dt:
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02/28/1989
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Application #:
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06900949
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Filing Dt:
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08/27/1986
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Title:
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DATA ASSEMBLY APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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01/26/1988
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Application #:
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06910595
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Filing Dt:
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09/23/1986
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Title:
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IC INPUT CIRCUITRY PROGRAMMABLE FOR REALIZING MULTIPLE FUNCTIONS FROM A SINGLE INPUT
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Patent #:
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Issue Dt:
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02/28/1989
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Application #:
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07035687
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Filing Dt:
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04/02/1987
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Title:
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DUAL-PORT TIMING CONTROLLER
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Patent #:
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Issue Dt:
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07/25/1989
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Application #:
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07035817
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Filing Dt:
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04/03/1987
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Title:
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PACKET-AT-A-TIME REPORTING IN A DATA LINK CONTROLLER
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Patent #:
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Issue Dt:
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08/23/1988
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Application #:
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07047077
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Filing Dt:
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05/05/1987
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Title:
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PHASE DETECTOR AND PHASE-LOCKED LOOP APPARATUS
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Patent #:
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Issue Dt:
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05/30/1989
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Application #:
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07073532
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Filing Dt:
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07/15/1987
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Title:
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COMMUNICATION FILTER
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Patent #:
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Issue Dt:
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03/07/1989
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Application #:
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07077252
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Filing Dt:
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07/24/1987
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Title:
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DEFECT SKIPPING MECHANISM FOR DISK DRIVES
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Patent #:
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Issue Dt:
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02/14/1989
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Application #:
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07111476
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Filing Dt:
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10/22/1987
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Title:
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PROPAGATING FIFO STORAGE DEVICE
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Patent #:
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Issue Dt:
|
02/28/1989
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Application #:
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07123823
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Filing Dt:
|
11/23/1987
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Title:
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METHOD OF MAKING BIPOLAR AND MOS DEVICES ON SAME INTEGRATED CIRCUIT SUBSTRATE
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Patent #:
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|
Issue Dt:
|
06/11/1991
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Application #:
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07173325
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Filing Dt:
|
03/25/1988
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Title:
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FDDI BIT ERROR RATE TESTER
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Patent #:
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Issue Dt:
|
01/02/1990
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Application #:
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07193232
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Filing Dt:
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05/11/1988
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Title:
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INTEGRATED SCR CURRENT SOURCING SINKING DEVICE
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Patent #:
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Issue Dt:
|
08/29/1989
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Application #:
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07205636
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Filing Dt:
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06/13/1988
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Title:
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ASYNCHRONOUS INTERRUPT STATUS BIT CIRCUIT
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Patent #:
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Issue Dt:
|
04/03/1990
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Application #:
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07226610
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Filing Dt:
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08/01/1988
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Title:
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METHOD FOR TRANSFER OF DATA BETWEEN A MEDIA ACCESS CONTROLLER AND BUFFER MEMORY IN A TOKEN RING NETWORK
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Patent #:
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Issue Dt:
|
06/05/1990
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Application #:
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07245617
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Filing Dt:
|
09/19/1988
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|
Title:
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A METHOD OF GENERATING UPDATED TRANSVERSAL FILTER COEFFICIENTS
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Patent #:
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Issue Dt:
|
05/15/1990
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Application #:
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07251309
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Filing Dt:
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09/30/1988
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Title:
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MODULAR TEST STRUCTURE FOR SINGLE CHIP DIGITAL EXCHANGE CONTROLLER
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Patent #:
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Issue Dt:
|
02/19/1991
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Application #:
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07262658
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Filing Dt:
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10/25/1988
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Title:
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SYSTEM FOR DETECTING AND CORRECTING ERRORS GENERATED BY ARITHMETIC LOGIC UNITS
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Patent #:
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Issue Dt:
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12/26/1989
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Application #:
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07268396
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Filing Dt:
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11/07/1988
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Title:
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RELIABLE RECOVERY OF DATA IN ENCODER/DECODER
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Patent #:
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Issue Dt:
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09/05/1989
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Application #:
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07272563
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Filing Dt:
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11/17/1988
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Title:
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A RAM CELL HAVING MEANS FOR CONTROLLING A BIDIRECTIONAL SHIFT
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Patent #:
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Issue Dt:
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12/18/1990
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Application #:
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07278724
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Filing Dt:
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12/02/1988
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Title:
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METHODS AND APPARATUS FOR PERFORMING RESTRICTED TOKEN OPERATIONS ON AN FDDI NETWORK
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Patent #:
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Issue Dt:
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08/21/1990
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Application #:
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07281991
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Filing Dt:
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12/09/1988
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Title:
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METHOD AND APPARATUS FOR CONFIGURING DATA PATHS WITHIN A SUPERNET STATION
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Patent #:
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Issue Dt:
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09/10/1991
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Application #:
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07311411
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Filing Dt:
|
02/14/1989
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Title:
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DATA LINK CONTROLER WITH FLEXIBLE MULTIPLEXER
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Patent #:
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Issue Dt:
|
01/30/1990
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Application #:
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07318098
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Filing Dt:
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03/02/1989
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Title:
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ASYNCHRONOUS INTERRUPT STATUS BIT CIRCUIT
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Patent #:
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Issue Dt:
|
11/05/1991
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Application #:
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07339722
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Filing Dt:
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04/17/1989
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Title:
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APPARATUS AND METHOD FOR PROPER BYTE ALIGNMENT IN AN ENCODER/DECODER
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Patent #:
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Issue Dt:
|
12/18/1990
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Application #:
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07343215
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Filing Dt:
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04/26/1989
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Title:
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METHOD AND APPARATUS FOR TESTING A BINARY COUNTER
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Patent #:
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Issue Dt:
|
11/06/1990
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Application #:
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07343622
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Filing Dt:
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04/27/1989
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Title:
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PROGRAMMABLE THRESHOLD DETECTION LOGIC FOR A DIGITAL STORAGE BUFFER
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Patent #:
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Issue Dt:
|
08/11/1992
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Application #:
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07343810
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Filing Dt:
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04/27/1989
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Title:
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BIT RESIDUE CORRECTION IN A DLC RECEIVER
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Patent #:
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Issue Dt:
|
11/26/1991
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Application #:
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07349564
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Filing Dt:
|
05/09/1989
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Title:
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HIGH SPEED STATIC RAM SENSING SYSTEM
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Patent #:
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|
Issue Dt:
|
10/15/1991
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Application #:
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07359022
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Filing Dt:
|
05/30/1989
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|
Title:
|
SYSTEM AND METHOD FOR PROVIDING DIGITAL FILTER COEFFICIENTS
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Patent #:
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Issue Dt:
|
03/06/1990
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Application #:
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07368083
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Filing Dt:
|
06/16/1989
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Title:
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DATA PROTOCOL CONTROLLER
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Patent #:
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|
Issue Dt:
|
05/19/1992
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Application #:
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07376882
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Filing Dt:
|
07/06/1989
|
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Title:
|
HIGH SPEED DIGITAL TO ANALOG TO DIGITAL COMMUNICATION SYSTEM
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Patent #:
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|
Issue Dt:
|
08/21/1990
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Application #:
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07407000
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Filing Dt:
|
09/14/1989
|
|
Title:
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DYNAMIC PLA CIRCUIT WITH NO "VIRTUAL GROUNDS"
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|
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Patent #:
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|
Issue Dt:
|
02/19/1991
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Application #:
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07428614
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Filing Dt:
|
10/30/1989
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Title:
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APPARATUS ADAPTABLE FOR USE IN EFFECTING COMMUNICATIONS BETWEEN AN ANALOG DEVICE AND A DIGITAL DEVICE
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|
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Patent #:
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|
Issue Dt:
|
03/12/1991
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Application #:
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07428628
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Filing Dt:
|
10/30/1989
|
|
Title:
|
APPARATUS HAVING A MODULAR DECIMATION ARCHITECTURE
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|
|
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Patent #:
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|
Issue Dt:
|
02/26/1991
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Application #:
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07434271
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Filing Dt:
|
10/30/1989
|
|
Title:
|
APPARATUS HAVING SHARED MODULAR ARCHITECTURE FOR DECIMATION AND INTERPOLATION
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|
|
|
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Patent #:
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|
Issue Dt:
|
06/04/1991
|
Application #:
|
07434797
|
Filing Dt:
|
11/13/1989
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY APPARATUS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/14/1990
|
Application #:
|
07443088
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Filing Dt:
|
11/27/1989
|
|
Title:
|
ENHANCED UNIVERSAL ASYNCHRONOUS RECEIVER-TRANSMITTER
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|
|
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Patent #:
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Issue Dt:
|
05/28/1991
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Application #:
|
07462625
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Filing Dt:
|
01/09/1990
|
|
Title:
|
CAPACITIVELY COUPLED READ-ONLY MEMORY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/30/1991
|
Application #:
|
07480401
|
Filing Dt:
|
02/15/1990
|
|
Title:
|
CMOS PRECHARGE AND EQUALIZATION CIRCUIT
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/10/1991
|
Application #:
|
07509916
|
Filing Dt:
|
04/16/1990
|
|
Title:
|
ECL OUTPUT BUFFER CIRCUIT WITH IMRPOVED COMPENSATION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/08/1995
|
Application #:
|
07516984
|
Filing Dt:
|
04/30/1990
|
|
Title:
|
AN ADDRESS MODULO ADJUST UNIT FOR A MEMORY MANAGEMENT UNIT FOR MONOLITHIC DIGITAL SIGNAL PROCESSOR
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/10/1992
|
Application #:
|
07528864
|
Filing Dt:
|
05/25/1990
|
|
Title:
|
FIFO INFORMATION STORAGE APPARATUS INCLUDING STATUS AND LOGIC MODULES FOR EACH CELL
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/27/1991
|
Application #:
|
07529366
|
Filing Dt:
|
05/29/1990
|
|
Title:
|
METHOD OF AND SYSTEM FOR TRANSFERRING MULTIPLE PRIORITY QUEUES INTO MULTIPLE LOGICAL FIFOS USING A SINGLE PHYSICAL FIFO
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/21/1992
|
Application #:
|
07566743
|
Filing Dt:
|
08/13/1990
|
|
Title:
|
RAM BUFFER CONTROLLER FOR PROVIDING SIMULATED FIRST-IN-FIRST-OUT (FIFO) BUFFERS IN A RANDOM ACCESS MEMORY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
10/05/1993
|
Application #:
|
07579721
|
Filing Dt:
|
09/10/1990
|
|
Title:
|
ERROR DETECTION AND CORRECTION CIRCUIT
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/15/1993
|
Application #:
|
07589065
|
Filing Dt:
|
09/27/1990
|
|
Title:
|
KEYPAD STATUS REPORTING SYSTEM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/30/1993
|
Application #:
|
07589327
|
Filing Dt:
|
12/03/1990
|
|
Title:
|
FULLY-INTEGRATED TELEPHONE UNIT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/1994
|
Application #:
|
07589380
|
Filing Dt:
|
09/27/1990
|
|
Title:
|
MICROPROCESSOR TO EXTERNAL DEVICE SERIAL BUS COMMUNICATION SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/1991
|
Application #:
|
07589402
|
Filing Dt:
|
09/27/1990
|
|
Title:
|
METHOD FOR OPERATING AN APPARATUS FOR FACILITATING COMMUNICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/1992
|
Application #:
|
07678510
|
Filing Dt:
|
04/01/1991
|
|
Title:
|
COUNTER CELL INCLUDING A LATCH CIRCUIT, CONTROL CIRCUIT AND A PULL-UP CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/1994
|
Application #:
|
07712944
|
Filing Dt:
|
06/10/1991
|
|
Title:
|
PROCESSING SYSTEM INCLUDING MEMORY SELECTION OF MULTIPLE MEMORIES AND METHOD IN AN INTERRUPT ENVIRONMENT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1992
|
Application #:
|
07732383
|
Filing Dt:
|
07/18/1991
|
|
Title:
|
POWER REDUCTION DESIGN FOR ECL OUTPUTS THAT IS INDEPENDENT OF RANDOM TERMINATION VOLTAGE
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|
