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Reel/Frame:024380/0300   Pages: 6
Recorded: 05/13/2010
Attorney Dkt #:043496.00001
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 64
1
Patent #:
Issue Dt:
01/26/1993
Application #:
07773827
Filing Dt:
10/09/1991
Title:
ARRAY LAYOUT STRUCTURE FOR IMPLEMENTING LARGE HIGH-DENSITY ADDRESS DECODERS FOR GATE ARRAY MEMORIES
2
Patent #:
Issue Dt:
10/31/1995
Application #:
08082867
Filing Dt:
06/29/1993
Title:
METHOD AND APPARATUS FOR DETERMINING ERROR LOCATION
3
Patent #:
Issue Dt:
08/08/1995
Application #:
08082869
Filing Dt:
06/29/1993
Title:
METHOD OF AND SYSTEM FOR LAYING OUT BUS CELLS ON AN INTEGRATED CIRCUIT CHIP
4
Patent #:
Issue Dt:
01/17/1995
Application #:
08082870
Filing Dt:
06/29/1993
Title:
PARALLEL ENCODING APPARATUS AND METHOD IMPLEMENTING CYCLIC REDUNDANCY CHECK AND REED-SOLOMON CODES
5
Patent #:
Issue Dt:
08/29/1995
Application #:
08150897
Filing Dt:
11/12/1993
Title:
APPARATUS FOR CORRECTING ERRORS IN OPTICAL DISKS
6
Patent #:
Issue Dt:
08/29/1995
Application #:
08225690
Filing Dt:
04/11/1994
Title:
VERTICAL DETAIL ENHANCEMENT WITH STEPPED RETURN CORING
7
Patent #:
Issue Dt:
10/29/1996
Application #:
08312026
Filing Dt:
09/26/1994
Title:
METHOD AND APPARATUS FOR AVERAGING CLOCK SKEWING IN CLOCK DISTRIBUTION NETWORK
8
Patent #:
Issue Dt:
10/29/1996
Application #:
08312355
Filing Dt:
09/26/1994
Title:
METHOD AND APPARATUS FOR ADAPTIVE CLOCK DESKEWING
9
Patent #:
Issue Dt:
01/23/1996
Application #:
08316462
Filing Dt:
09/30/1994
Title:
CMOS LEVEL SHIFTER WITH FEEDFORWARD CONTROL TO PREVENT LATCHING IN A WRONG LOGIC STATE
10
Patent #:
Issue Dt:
04/30/1996
Application #:
08493016
Filing Dt:
06/21/1995
Title:
HIERARCHICAL FLOORPLANNER FOR GATE ARRAY DESIGN LAYOUT
11
Patent #:
Issue Dt:
02/02/1999
Application #:
08544159
Filing Dt:
10/17/1995
Title:
FAST METHOD OF FLOATING-POINT MULTIPLICATION AND ACCUMULATION
12
Patent #:
Issue Dt:
03/10/1998
Application #:
08561756
Filing Dt:
11/22/1995
Title:
HIGH BIT RATE START CODE SEARCHING AND DETECTING CIRCUIT AND METHOD
13
Patent #:
Issue Dt:
06/16/1998
Application #:
08567592
Filing Dt:
12/05/1995
Title:
LOW POWER HIGH SPEED MPEG VIDEO VARIABLE LENGTH DECODER
14
Patent #:
Issue Dt:
01/04/2000
Application #:
08594750
Filing Dt:
01/31/1996
Title:
MICROPROCESSOR INCLUDING FLOATING POINT UNIT WITH 16-BIT FIXED LENGTH INSTRUCTION SET
15
Patent #:
Issue Dt:
01/12/1999
Application #:
08594763
Filing Dt:
01/31/1996
Title:
FLOATING POINT UNIT PIPELINE SYNCHRONIZED WITH PROCESSOR PIPELINE
16
Patent #:
Issue Dt:
12/01/1998
Application #:
08612512
Filing Dt:
03/07/1996
Title:
MPEG ENCODING AND DECODING SYSTEM FOR MULTIMEDIA APPLICATIONS
17
Patent #:
Issue Dt:
09/08/1998
Application #:
08650415
Filing Dt:
05/20/1996
Title:
PHASE LINKING OF OUTPUT CLOCK WITH MASTER CLOCK IN MEMORY ARCHITECTURE
18
Patent #:
Issue Dt:
06/30/1998
Application #:
08725685
Filing Dt:
10/02/1996
Title:
ADDRESS GENERATOR FOR ERROR CONTROL SYSTEM
19
Patent #:
Issue Dt:
03/28/2000
Application #:
08733869
Filing Dt:
10/17/1996
Title:
METHOD AND APPARATUS FOR FAST CLOCK RECOVERY PHASE-LOCKED LOOP WITH TRAINING CAPABILITY
20
Patent #:
Issue Dt:
09/15/1998
Application #:
08756050
Filing Dt:
11/26/1996
Title:
MULTI-DIRECTIONAL SMALL SIGNAL TRANSCEIVER/REPEATER
21
Patent #:
Issue Dt:
08/11/1998
Application #:
08760007
Filing Dt:
12/03/1996
Title:
MICRO ROM TESTING SYSTEM USING MICRO ROM TIMING CIRCUITS FOR TESTING OPERATIONS
22
Patent #:
Issue Dt:
08/25/1998
Application #:
08767135
Filing Dt:
12/19/1996
Title:
HIGH-SPEED MAIN AMPLIFIER WITH REDUCED ACCESS AND OUTPUT DISABLE TIME PERIODS
23
Patent #:
Issue Dt:
04/25/2000
Application #:
08828780
Filing Dt:
03/27/1997
Title:
DMA CONTROLLER WITH SEMAPHORE COMMUNICATION PROTOCOL
24
Patent #:
Issue Dt:
12/14/1999
Application #:
08842441
Filing Dt:
04/24/1997
Title:
ADAPTABLE OUTPUT PHASE DELAY COMPENSATION CIRCUIT AND METHOD THEREOF
25
Patent #:
Issue Dt:
11/17/1998
Application #:
08845840
Filing Dt:
04/28/1997
Title:
THREE-TRANSISTOR STATIC STORAGE CELL
26
Patent #:
Issue Dt:
11/02/1999
Application #:
08863039
Filing Dt:
05/23/1997
Title:
HYBRID PHASE-LOCKED LOOP EMPLOYING ANALOG AND DIGTAL LOOP FILTERS
27
Patent #:
Issue Dt:
08/03/1999
Application #:
08932384
Filing Dt:
09/17/1997
Title:
MAIN AMPLIFIER WITH FAST OUTPUT DISABLEMENT
28
Patent #:
Issue Dt:
05/01/2001
Application #:
08942854
Filing Dt:
10/02/1997
Title:
MEMORY SYSTEM ARCHITECTURE
29
Patent #:
Issue Dt:
08/31/1999
Application #:
08954628
Filing Dt:
10/20/1997
Title:
RAM HAVING MULTIPLE PORTS SHARING COMMON MEMORY LOCATIONS
30
Patent #:
Issue Dt:
05/16/2000
Application #:
08959280
Filing Dt:
10/24/1997
Title:
INDEPENDENT AND COOPERATIVE MULTICHANNEL MEMORY ARCHITECTURE FOR USE WITH MASTER DEVICE
31
Patent #:
Issue Dt:
10/31/2000
Application #:
08984076
Filing Dt:
12/03/1997
Title:
GROUNDED PACKAGED SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
32
Patent #:
Issue Dt:
08/03/1999
Application #:
08997509
Filing Dt:
12/23/1997
Title:
DRIVING MEMORY BITLINES USING BOOSTED VOLTAGE
33
Patent #:
Issue Dt:
02/08/2000
Application #:
08997541
Filing Dt:
12/23/1997
Title:
VOLTAGE PUMP FOR INTEGRATED CIRCUIT AND OPERATING METHOD THEREOF
34
Patent #:
Issue Dt:
12/26/2000
Application #:
09006190
Filing Dt:
01/13/1998
Title:
MULTI-PORT RAM HAVING FUNCTIONALLY IDENTICAL PORTS
35
Patent #:
Issue Dt:
08/08/2000
Application #:
09006191
Filing Dt:
01/13/1998
Title:
MUTI-PORT MEMORY DEVIVE HAVING MASKING REGISTERS
36
Patent #:
Issue Dt:
12/05/2000
Application #:
09012460
Filing Dt:
01/23/1998
Title:
INDEPENDENT CHIP SELECT FOR SRAM AND DRAM IN A MULTI-PORT RAM
37
Patent #:
Issue Dt:
07/11/2000
Application #:
09018343
Filing Dt:
02/04/1998
Title:
ADDRESSING SYSTEM IN A MULTI-PORT RAM HAVING MAIN AND CACHE MEMORIES
38
Patent #:
Issue Dt:
09/28/1999
Application #:
09024559
Filing Dt:
02/17/1998
Title:
DUAL CLOCKING SCHEME IN A MULTI-PORT RAM
39
Patent #:
Issue Dt:
04/18/2000
Application #:
09064190
Filing Dt:
04/22/1998
Title:
OFFSET-COMPENSATED PEAK DETECTOR WITH OUTPUT BUFFERING
40
Patent #:
Issue Dt:
05/01/2001
Application #:
09071868
Filing Dt:
05/01/1998
Title:
REMOTE COMPUTER INTERFACE
41
Patent #:
Issue Dt:
09/26/2000
Application #:
09073332
Filing Dt:
05/06/1998
Title:
INDEPENDENT MULTICHANNEL MEMORY ARCHITECTURE
42
Patent #:
Issue Dt:
08/21/2001
Application #:
09111277
Filing Dt:
07/07/1998
Title:
SYSTEM AND METHOD FOR COLUMN ACCESS IN RANDOM ACCESS MEMORIES
43
Patent #:
Issue Dt:
01/09/2001
Application #:
09174822
Filing Dt:
10/19/1998
Title:
HIGH SPEED BUS INTERFACE FOR PERIPHERAL DEVICES
44
Patent #:
Issue Dt:
02/04/2003
Application #:
09250161
Filing Dt:
02/16/1999
Title:
SELF-ADJUSTING CLOCK PHASE CONTROLLED ARCHITECTURE
45
Patent #:
Issue Dt:
08/06/2002
Application #:
09291328
Filing Dt:
04/15/1999
Title:
REDUCING BIAS CURRENT SETTLING TIME IN MAGNETO-RESISTIVE HEAD PRE-AMPLIFIERS
46
Patent #:
Issue Dt:
12/03/2002
Application #:
09587980
Filing Dt:
06/06/2000
Title:
SYSTEM AND METHOD FOR TERMINAL SHORT DETECTION
47
Patent #:
Issue Dt:
04/30/2002
Application #:
09589187
Filing Dt:
06/08/2000
Title:
METHOD AND APPARATUS FOR SWITCHING STAGES OF A MULTISTAGE AMPLIFIER QUICKLY BETWEEN OPERATIONAL MODES
48
Patent #:
Issue Dt:
03/07/2006
Application #:
10044616
Filing Dt:
01/11/2002
Publication #:
Pub Dt:
07/18/2002
Title:
METHODS AND APPARATUS FOR FEATURE RECOGNITION TIME SHIFT CORRELATION
49
Patent #:
Issue Dt:
09/21/2004
Application #:
10075437
Filing Dt:
02/14/2002
Publication #:
Pub Dt:
08/14/2003
Title:
METHODS AND APPARATUS FOR DETECTING TERMINAL OPEN CIRCUITS AND SHORT CIRCUITS TO GROUND IN INDUCTIVE HEAD WRITE DRIVER CIRCUITS
50
Patent #:
Issue Dt:
01/25/2005
Application #:
10101387
Filing Dt:
03/18/2002
Publication #:
Pub Dt:
09/18/2003
Title:
STORAGE CARD WITH INTEGRAL FILE SYSTEM, ACCESS CONTROL AND CRYPTOGRAPHIC SUPPORT
51
Patent #:
Issue Dt:
09/21/2004
Application #:
10142318
Filing Dt:
05/09/2002
Publication #:
Pub Dt:
11/20/2003
Title:
METHOD AND APPARATUS FOR PROGRAMMING NON-VOLATILE, PROGRAMMABLE, ELECTRICALLY ERASABLE MEMORY USING A USB INTERFACE
52
Patent #:
Issue Dt:
08/03/2004
Application #:
10143230
Filing Dt:
05/09/2002
Publication #:
Pub Dt:
11/21/2002
Title:
FLOATING POINT UNIT PIPELINE SYNCHRONIZED WITH PROCESSOR PIPELINE
53
Patent #:
Issue Dt:
02/13/2007
Application #:
10160640
Filing Dt:
05/31/2002
Publication #:
Pub Dt:
01/02/2003
Title:
METHODS AND APPARATUS FOR STORING MEMORY TEST INFORMATION
54
Patent #:
Issue Dt:
03/06/2007
Application #:
10172368
Filing Dt:
06/14/2002
Publication #:
Pub Dt:
12/18/2003
Title:
DIFFERENTIAL MAGNETO-RESISTIVE HEAD PRE-AMPLIFIERS FOR SINGLE POLARITY POWER SUPPLY APPLICATIONS
55
Patent #:
Issue Dt:
03/30/2010
Application #:
10253711
Filing Dt:
09/25/2002
Publication #:
Pub Dt:
04/24/2003
Title:
METHODS AND APPARATUS FOR SHARING NETWORK BANDWIDTH
56
Patent #:
Issue Dt:
01/30/2007
Application #:
10385496
Filing Dt:
03/12/2003
Publication #:
Pub Dt:
09/16/2004
Title:
METHOD AND APPARATUS FOR ADAPTIVE EQUALIZATION OF HIGH SPEED DATA COMMUNICATIONS
57
Patent #:
Issue Dt:
06/07/2005
Application #:
10388459
Filing Dt:
03/17/2003
Publication #:
Pub Dt:
09/23/2004
Title:
METHOD AND SYSTEM FOR IMPEDANCE MATCHED SWITCHING
58
Patent #:
Issue Dt:
11/09/2004
Application #:
10395005
Filing Dt:
03/21/2003
Publication #:
Pub Dt:
09/23/2004
Title:
CURRENT-MODE D/A CONVERTER HAVING VARIABLE OUTPUT AND OFFSET CONTROL
59
Patent #:
Issue Dt:
04/04/2006
Application #:
10402530
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
10/14/2004
Title:
METHOD AND APPARATUS FOR DECREASING AUTOMATIC TEST EQUIPMENT SETUP TIME
60
Patent #:
Issue Dt:
09/28/2004
Application #:
10628916
Filing Dt:
07/29/2003
Title:
TECHNIQUES FOR CONTEXT-BASED ANALOG-TO-DIGITAL SIGNAL CONVERSION
61
Patent #:
Issue Dt:
09/21/2004
Application #:
10629390
Filing Dt:
07/29/2003
Title:
TECHNIQUES FOR PAUSING AND RESUMING ANALOG-TO-DIGITAL SIGNAL CONVERSION
62
Patent #:
Issue Dt:
01/09/2007
Application #:
10796552
Filing Dt:
03/08/2004
Publication #:
Pub Dt:
09/02/2004
Title:
FLOATING POINT UNIT PIPELINE SYNCHRONIZED WITH PROCESSOR PIPELINE
63
Patent #:
Issue Dt:
12/16/2008
Application #:
11044950
Filing Dt:
01/26/2005
Publication #:
Pub Dt:
10/13/2005
Title:
CURRENT SENSING CIRCUIT FOR A MULTI-PHASE DC-DC CONVERTER
64
Patent #:
Issue Dt:
11/28/2006
Application #:
11187239
Filing Dt:
07/22/2005
Publication #:
Pub Dt:
01/26/2006
Title:
METHOD AND SYSTEM FOR REDUCING INTERFERENCE BETWEEN ANALOG CIRCUITS OPERATING FROM A COMMON POWER SUPPLY
Assignor
1
Exec Dt:
04/01/2010
Assignee
1
2880 SCOTT BOULEVARD
SANTA CLARA, CALIFORNIA 95050-2554
Correspondence name and address
SQUIRE SANDERS & DEMPSEY LLP
ONE MARITIME PLAZA
SUITE 300
SAN FRANCISCO, CA 94111

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