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05/07/1991
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05/23/1989
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04/21/1992
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09/13/1989
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12/31/1991
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10/23/1989
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06/30/1992
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10/23/1989
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04/16/1991
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04/05/1990
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10/22/1991
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04/05/1990
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05/12/1992
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02/25/1992
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09/12/1990
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03/02/1993
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03/13/1991
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03/01/1994
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10/22/1992
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11/16/1993
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10/22/1992
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12/27/1994
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10/22/1992
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01/25/1994
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10/22/1992
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08/02/1994
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05/06/1993
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11/22/1994
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06/17/1993
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10/18/1994
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06/25/1993
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04/11/1995
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08/23/1993
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11/15/1994
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08/23/1993
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09/20/1994
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08/26/1993
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12/19/1995
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10/13/1993
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04/23/1996
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12/01/1993
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10/27/1998
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12/01/1993
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12/27/1994
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12/10/1993
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05/13/1997
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12/10/1993
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06/25/1996
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04/14/1994
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11/28/1995
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04/25/1994
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09/21/1999
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06/23/1994
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01/24/1995
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06/28/1994
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07/30/1996
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07/01/1994
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11/19/1996
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07/01/1994
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11/21/1995
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09/01/1994
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11/12/1996
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09/01/1994
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01/16/1996
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10/11/1994
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10/10/1995
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10/13/1994
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07/09/1996
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10/28/1994
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08/27/1996
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12/21/1994
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01/02/1996
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12/22/1994
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08/12/1997
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01/12/1995
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09/01/1998
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02/21/1995
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02/13/1996
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02/24/1995
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01/09/1996
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03/14/1995
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04/01/1997
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04/07/1995
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11/26/1996
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04/21/1995
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12/03/1996
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05/02/1995
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07/09/1996
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05/02/1995
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01/21/1997
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05/25/1995
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12/02/1997
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06/02/1995
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05/14/1996
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06/01/1995
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10/21/1997
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06/05/1995
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01/13/1998
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06/05/1995
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10/21/1997
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06/06/1995
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08/26/1997
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06/07/1995
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08/12/1997
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06/07/1995
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11/26/1996
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06/06/1995
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01/28/1997
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06/07/1995
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09/03/1996
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06/07/1995
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07/22/1997
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06/07/1995
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08/13/1996
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06/13/1995
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12/31/1996
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06/21/1995
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09/03/1996
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07/11/1995
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10/01/1996
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07/31/1995
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08/31/1999
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08/01/1995
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03/04/1997
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09/26/1995
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03/10/1998
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09/29/1995
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05/13/1997
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10/16/1995
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06/24/1997
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10/24/1995
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07/22/1997
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11/01/1995
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07/01/1997
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11/01/1995
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08/04/1998
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11/17/1995
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01/13/1998
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11/17/1995
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Title:
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FAST 3-STATE BOOSTER CIRCUIT
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08566204
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Filing Dt:
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12/01/1995
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Title:
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POWER SUPPLY INDEPENDENT CURRENT SOURCE FOR FLASH EPROM ERASURE
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Patent #:
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Issue Dt:
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11/09/1999
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Application #:
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08568195
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Filing Dt:
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12/06/1995
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Title:
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METHOD OF FORMING A SILICON GATE TO PRODUCE SILICON DEVICES WITH IMPROVED PERFORMANCE
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Patent #:
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Issue Dt:
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02/09/1999
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Application #:
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08569704
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Filing Dt:
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12/08/1995
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Title:
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SELECTIVELY OXIDIZED FIELD OXIDE REGION
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Patent #:
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Issue Dt:
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09/22/1998
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Application #:
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08578178
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Filing Dt:
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12/29/1995
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Title:
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WAFER CLEANING PROCEDURE USEFUL IN THE MANUFACTURE OF A NON-VOLATILE MEMORY DEVICE
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Patent #:
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Issue Dt:
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07/07/1998
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Application #:
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08582720
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Filing Dt:
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01/04/1996
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Title:
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SIMPLIFIED PROCESS FOR FABRICATING FLASH EEPROM CELLS
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Patent #:
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Issue Dt:
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09/29/1998
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Application #:
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08589750
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Filing Dt:
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01/22/1996
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Title:
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SOURCELESS FLOATING GATE MEMORY DEVICE AND METHOD OF STORING DATA
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08610688
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Filing Dt:
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03/04/1996
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Title:
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E2PROM DEVICE HAVING ERASE GATE IN OXIDE ISOLATION REGION IN SHALLOW TRENCH AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/10/1997
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Application #:
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08630919
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Filing Dt:
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04/05/1996
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Title:
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PARALLEL PAGE BUFFER VERIFY OR READ OF CELLS ON A WORD LINE USING A SIGNAL FROM A REFERENCE CELL IN A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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05/13/1997
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Application #:
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08634512
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Filing Dt:
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04/18/1996
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Title:
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SYSTEM FOR CONSTANT FIELD ERASURE IN A FLASH EPROM
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Patent #:
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Issue Dt:
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01/27/1998
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Application #:
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08635995
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Filing Dt:
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04/22/1996
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Title:
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MULTIPLE BITS PER-CELL FLASH EEPROM CAPABLE OF CONCURRENTLY PROGRAMMING AND VERIFYING MEMORY CELLS AND REFERENCE CELLS
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Patent #:
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Issue Dt:
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04/20/1999
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Application #:
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08651261
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Filing Dt:
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05/23/1996
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Title:
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SIMPLIFIED FILE MANAGEMENT SCHEME FOR FLASH MEMORY
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Patent #:
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Issue Dt:
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02/09/1999
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Application #:
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08653211
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Filing Dt:
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05/24/1996
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Title:
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METHOD OF SCREENING MEMORY CELLS AT ROOM TEMPERATURE THAT WOULD BE REJECTED DURING HOT TEMPERATURE PROGRAMMING TESTS
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Patent #:
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Issue Dt:
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05/12/1998
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Application #:
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08655357
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Filing Dt:
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05/24/1996
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Title:
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METHOD OF SCREENING HOT TEMPERATURE ERASE REJECTS AT ROOM TEMPERATURE
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Patent #:
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Issue Dt:
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12/29/1998
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Application #:
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08658038
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Filing Dt:
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06/04/1996
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Title:
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METHOD AND SYSTEM FOR PROVIDING A DOUBLE DIFFUSE IMPLANT JUNCTION IN A FLASH DEVICE
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08668632
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Filing Dt:
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06/18/1996
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Title:
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USING FLOATING GATE DEVICES AS SELECT GATE DEVICES FOR NAND FLASH MEMORY AND ITS BIAS SCHEME
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Patent #:
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Issue Dt:
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03/03/1998
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Application #:
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08669116
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Filing Dt:
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06/24/1996
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Title:
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MULTIPLE BITS-PER-CELL FLASH SHIFT REGISTER PAGE BUFFER
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Patent #:
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Issue Dt:
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10/12/1999
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Application #:
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08681141
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Filing Dt:
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07/22/1996
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Title:
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NOVEL PROCESSING TECHNIQUES FOR ACHIEVING PRODUCTION-WORTHY, LOW DIELECTRIC, LOW INTERCONNECT RESISTANCE AND HIGH PERFORMANCE ICS
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Patent #:
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Issue Dt:
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07/29/1997
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Application #:
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08684920
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Filing Dt:
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07/22/1996
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Title:
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A FLASH EEPROM MEMORY WITH REDUCED COLUMN LEAKAGE CURRENT AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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02/03/1998
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Application #:
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08686641
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Filing Dt:
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07/24/1996
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Title:
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BIAS SCHEME OF PROGRAM INHIBIT FOR RANDOM PROGRAMMING IN A NAND FLASH MEMORY
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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08690848
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Filing Dt:
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08/01/1996
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Title:
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SILICON NITRIDE ETCH PROCESS WITH CRITICAL GAIN
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Patent #:
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Issue Dt:
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10/07/1997
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Application #:
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08701288
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Filing Dt:
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08/22/1996
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Title:
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ERASE METHOD FOR PAGE MODE MULTIPLE BITS-PER-CELL FLASH EEPROM
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Patent #:
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Issue Dt:
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08/17/1999
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Application #:
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08708428
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Filing Dt:
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09/05/1996
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Title:
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AN IMPROVED ULTRATHIN OXYNITRIDE STRUCTURE AND PROCESS FOR VLSI APPLICTIONS
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08723558
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Filing Dt:
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09/30/1996
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Title:
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SYSTEM FOR PROVIDING TIGHT PROGRAM/ERASE SPEEDS THAT ARE INSENSITIVE TO PROCESS VARIATIONS
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08744962
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Filing Dt:
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11/07/1996
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Title:
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DEVICE INCLUDING MEANS FOR PREVENTING TUNGSTEN SILICIDE LIFTING, AND METHOD OF FABRICATION THEREOF
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|
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08745278
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Filing Dt:
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11/08/1996
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Title:
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BLOCK SELECT TRANSISTOR AND METHOD OF FABRICATION
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|
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|
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08745596
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Filing Dt:
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11/08/1996
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Title:
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METHOD OF PROGRAMMING A MEMORY CELL TO CONTAIN MULTIPLE VALUES
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|
|
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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08757987
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Filing Dt:
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11/27/1996
|
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Title:
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ELECTRICALLY ERASABLE REFERENCE CELL FOR ACCURATELY DETERMINING THRESHOLD VOLTAGE OF A NON-VOLATILE MEMORY AT A PLURALITY OF THRESHOLD VOLTAGE LEVELS
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Patent #:
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Issue Dt:
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02/10/1998
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Application #:
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08757988
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Filing Dt:
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11/27/1996
|
|
Title:
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APPARATUS AND METHOD FOR MULTIPLE-LEVEL STORAGE IN NON-VOLATILE MEMORIES
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|
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Patent #:
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|
Issue Dt:
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12/02/1997
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Application #:
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08769178
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Filing Dt:
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12/18/1996
|
|
Title:
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SEMICONDUCTOR DEVICE FROM SELF-ALIGNED SOURCE (SAS) ETCH IN A SEMICONDUCTOR DEVICE
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|
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|
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Patent #:
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|
Issue Dt:
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02/02/1999
|
Application #:
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08772131
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Filing Dt:
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12/20/1996
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Title:
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BANK ARCHITECTURE FOR A NON-VOLATILE MEMORY ENABLING SIMULTANEOUS READING AND WRITING
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