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Patent #:
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Issue Dt:
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08/17/2004
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Application #:
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10635974
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Filing Dt:
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08/07/2003
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Title:
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MEMORY CIRCUIT FOR PROVIDING WORD LINE REDUNDANCY IN A MEMORY SECTOR
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10636162
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Filing Dt:
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08/07/2003
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Title:
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TEST STRUCTURE FOR DETERMINING ELECTROMIGRATION AND INTERLAYER DIELECTRIC FAILURE
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10636336
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Filing Dt:
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08/06/2003
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Title:
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STRUCTURE AND METHOD TO REDUCE DRAIN INDUCED BARRIER LOWERING
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10636337
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
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02/10/2005
| | | | |
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Title:
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LOW POWER CHARGE PUMP
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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10643967
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Filing Dt:
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08/20/2003
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Publication #:
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Pub Dt:
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03/04/2004
| | | | |
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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10/12/2004
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Application #:
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10646080
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Filing Dt:
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08/22/2003
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Title:
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USE OF HIGH-K DIELECTRIC MATERIAL IN MODIFIED ONO STRUCTURE FOR SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10649994
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/11/2004
| | | | |
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Title:
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SEMICONDUCTOR MEMORY CAPABLE OF BEING DRIVEN AT LOW VOLTAGE AND ITS MANUFACTURE METHOD
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10650049
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Filing Dt:
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08/26/2003
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Title:
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CAM (CONTENT ADDRESSABLE MEMORY) CELLS AS PART OF CORE ARRAY IN FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10650072
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/11/2004
| | | | |
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Title:
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METHOD OF MANUFACTURING A MEMORY INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10652035
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
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06/10/2004
| | | | |
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Title:
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MEMORY CIRCUIT WITH REDUNDANT CONFIGURATION
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10654739
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Filing Dt:
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09/03/2003
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Title:
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PATTERNING FOR ELONGATED VSS CONTACT ON FLASH MEMORY
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Patent #:
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Issue Dt:
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01/31/2006
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Application #:
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10655179
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Filing Dt:
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09/04/2003
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Title:
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MEMORY CELL STRUCTURE HAVING NITRIDE LAYER WITH REDUCED CHARGE LOSS AND METHOD FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10655936
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Filing Dt:
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09/04/2003
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Title:
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METHOD OF FABRICATING A FLOATING GATE
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10658428
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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SEMICONDUCTOR MEMORY ENABLING CORRECT SUBSTITUTION OF REDUNDANT CELL ARRAY
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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10658506
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Filing Dt:
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09/09/2003
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Publication #:
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Pub Dt:
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07/15/2004
| | | | |
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Title:
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MEMORY DEVICE HAVING HIGH WORK FUNCTION GATE AND METHOD OF ERASING SAME
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Patent #:
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Issue Dt:
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01/29/2008
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10658882
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Filing Dt:
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09/09/2003
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Title:
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METHOD AND APPARATUS FOR COUPLING TO A COMMON LINE IN AN ARRAY
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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10658936
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Filing Dt:
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09/09/2003
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Title:
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FLASH MEMORY WITH HIGH-K DIELECTRIC MATERIAL BETWEEN SUBSTRATE AND GATE
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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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10658937
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Filing Dt:
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09/09/2003
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Title:
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METHOD AND APPARATUS FOR COUPLING TO A SOURCE LINE IN A MEMORY DEVICE
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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10660420
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Filing Dt:
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09/10/2003
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Title:
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HIGH DENSITY FLOATING GATE FLASH MEMORY AND FABRICATION PROCESSES THEREFOR
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10661720
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Filing Dt:
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09/11/2003
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Title:
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A FLASH MEMORY CELL WITH DRAIN AND SOURCE FORMED BY DIFFUSION OF A DOPANT FROM A SILICIDE
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10662011
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Filing Dt:
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09/11/2003
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Title:
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METHOD FOR FABRICATING A MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10662810
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Filing Dt:
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09/16/2003
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Publication #:
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Pub Dt:
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05/13/2004
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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04/26/2005
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Application #:
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10672093
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Filing Dt:
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09/26/2003
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR MEMORY WITH DEUTERATED MATERIALS
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10676612
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Filing Dt:
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10/01/2003
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Title:
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ORGANIC MEMORY CELL FORMATION ON AG SUBSTRATE
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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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10677031
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Filing Dt:
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10/01/2003
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Title:
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MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10677042
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Filing Dt:
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10/01/2003
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Title:
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SELF ASSEMBLY OF CONDUCTING POLYMER FOR FORMATION OF POLYMER MEMORY CELL
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10677073
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Filing Dt:
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10/01/2003
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Title:
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MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10677790
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Filing Dt:
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10/02/2003
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Publication #:
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Pub Dt:
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04/07/2005
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Title:
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MEMORY DEVICE AND METHOD USING POSITIVE GATE STRESS TO RECOVER OVERERASED CELL
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10678446
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Filing Dt:
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10/03/2003
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Title:
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EFFICIENT AND ACCURATE SENSING CIRCUIT AND TECHNIQUE FOR LOW VOLTAGE FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10679179
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Filing Dt:
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10/03/2003
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Title:
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CIRCUIT AND TECHNIQUE FOR ACCURATELY SENSING LOW VOLTAGE FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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10679774
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Filing Dt:
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10/06/2003
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Title:
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FLASH MEMORY DEVICE AND METHOD OF FABRICATION THEREOF INCLUDING A BOTTOM OXIDE LAYER WITH TWO REGIONS WITH DIFFERENT CONCENTRATIONS OF NITROGEN
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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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10682299
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Filing Dt:
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10/10/2003
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Publication #:
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Pub Dt:
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11/11/2004
| | | | |
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Title:
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METHOD AND APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10683631
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Filing Dt:
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10/10/2003
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Title:
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RECESSED CHANNEL
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Patent #:
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Issue Dt:
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11/15/2005
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Application #:
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10683649
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Filing Dt:
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10/10/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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RECESS CHANNEL FLASH ARCHITECTURE FOR REDUCED SHORT CHANNEL EFFECT
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10684890
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Filing Dt:
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10/14/2003
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Title:
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NON VOLATILE CHARGE TRAPPING DIELECTRIC MEMORY CELL STRUCTURE WITH GATE HOLE INJECTION ERASE
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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10685044
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Filing Dt:
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10/14/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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MEMORY CELL ARRAY WITH STAGGERED LOCAL INTER-CONNECT STRUCTURE
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Patent #:
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Issue Dt:
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06/21/2005
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10696234
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Filing Dt:
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10/28/2003
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Title:
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METHOD FOR FORMING A DIELECTRIC SPACER IN A NON-VOLATILE MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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10699903
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Filing Dt:
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11/03/2003
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Publication #:
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Pub Dt:
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05/05/2005
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Title:
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SIDEWALL FORMATION FOR HIGH DENSITY POLYMER MEMORY ELEMENT ARRAY
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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10700021
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Filing Dt:
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11/03/2003
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Title:
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MEMORY ELEMENT FORMATION WITH PHOTOSENSITIVE POLYMER DIELECTRIC
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Patent #:
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Issue Dt:
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02/07/2006
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Application #:
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10700414
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Filing Dt:
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11/04/2003
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Title:
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MINIMIZATION OF FG-FG COUPLING IN FLASH MEMORY
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10701780
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Filing Dt:
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11/05/2003
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Title:
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METHOD AND STRUCTURE FOR PROTECTING NROM DEVICES FROM INDUCED CHARGE DAMAGE DURING DEVICE FABRICATION
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10703860
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Filing Dt:
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11/07/2003
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Title:
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METHOD AND SYSTEM FOR TESTING ARTICLES OF MANUFACTURE
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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10705881
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Filing Dt:
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11/13/2003
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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10714909
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Filing Dt:
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11/18/2003
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Publication #:
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Pub Dt:
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06/10/2004
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10716209
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Filing Dt:
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11/18/2003
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Title:
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TIGHTLY SPACED GATE FORMATION THROUGH DAMASCENE PROCESS
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10716230
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Filing Dt:
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11/18/2003
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Title:
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DUAL CELL MEMORY DEVICE HAVING A TOP DIELECTRIC STACK
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10717622
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Filing Dt:
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11/21/2003
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Publication #:
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Pub Dt:
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05/27/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE STORING TWO-BIT INFORMATION
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Patent #:
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Issue Dt:
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01/24/2006
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Application #:
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10718707
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Filing Dt:
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11/24/2003
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Title:
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METHODS FOR FORMING NITROGEN-RICH REGIONS IN NON-VOLATILE SEMICONDUCTOR MEMORY DEVICES
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10721643
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Filing Dt:
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11/24/2003
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Title:
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READING FLASH MEMORY
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10726508
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Filing Dt:
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12/04/2003
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Publication #:
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Pub Dt:
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06/09/2005
| | | | |
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Title:
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FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/03/2006
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Application #:
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10726829
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Filing Dt:
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12/03/2003
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Title:
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POST CMP PRECURSOR TREATMENT
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10726868
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Filing Dt:
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12/03/2003
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Title:
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DIELECTRIC PATTERN FORMATION FOR ORGANIC ELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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10727481
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Filing Dt:
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12/05/2003
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Publication #:
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Pub Dt:
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07/01/2004
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Title:
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METHOD FOR STORING IN NONVOLATILE MEMORY AND STORAGE UNIT
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10728510
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Filing Dt:
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12/05/2003
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Title:
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NEUTRON DETECTING DEVICE
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10729732
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Filing Dt:
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12/05/2003
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Title:
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HARD MASK SPACER FOR SUBLITHOGRAPHIC BITLINE
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10731494
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Filing Dt:
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12/09/2003
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Title:
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PROCESS FOR FABRICATION OF SPACER LAYER WITH REDUCED HYDROGEN CONTENT IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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10731659
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Filing Dt:
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12/09/2003
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Title:
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PROCESS FOR FABRICATION OF NITRIDE LAYER WITH REDUCED HYDROGEN CONTENT IN ONO STRUCTURE IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10738301
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Filing Dt:
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12/16/2003
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Title:
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METHOD AND DEVICE FOR PROGRAMMING CELLS IN A MEMORY ARRAY IN A NARROW DISTRIBUTION
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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10738322
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Filing Dt:
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12/16/2003
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Title:
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FLASH MEMORY WITH BURIED BIT LINES
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10747692
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Filing Dt:
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12/30/2003
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Publication #:
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Pub Dt:
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09/16/2004
| | | | |
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Title:
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SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10754948
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Filing Dt:
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01/08/2004
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Title:
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INTEGRATED ONO PROCESSING FOR SEMICONDUCTOR DEVICES USING IN-SITU STEAM GENERATION (ISSG) PROCESS
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10755430
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Filing Dt:
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01/12/2004
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Title:
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NARROW BITLINE USING SAFIER FOR MIRRORBIT
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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10755740
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Filing Dt:
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01/12/2004
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Publication #:
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Pub Dt:
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07/14/2005
| | | | |
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Title:
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POCKET IMPLANT FOR COMPLEMENTARY BIT DISTURB IMPROVEMENT AND CHARGING IMPROVEMENT OF SONOS MEMORY CELL
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10755979
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Filing Dt:
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01/12/2004
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Title:
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SUBSTRATE BIAS FOR PROGRAMMING NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10756573
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Filing Dt:
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01/12/2004
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Title:
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HIGH VOLTAGE TRANSISTOR SCALING TILT ION IMPLANT METHOD
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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10756585
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Filing Dt:
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01/12/2004
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Title:
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METHOD AND STRUCTURE FOR CONTROLLING FLOATING BODY EFFECTS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10758148
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Filing Dt:
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01/14/2004
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Publication #:
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Pub Dt:
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07/14/2005
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Title:
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Efficient use of wafer area with device under the pad approach
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10758173
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Filing Dt:
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01/14/2004
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Title:
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ELECTROSTATIC DISCHARGE PERFORMANCE OF A SILICON STRUCTURE AND EFFICIENT USE OF AREA WITH ELECTROSTATIC DISCHARGE PROTECTIVE DEVICE UNDER THE PAD APPROACH AND ADJUSTMENT OF VIA CONFIGURATION THERETO TO CONTROL DRAIN JUNCTION RESISTANCE
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Patent #:
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Issue Dt:
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11/30/2004
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Application #:
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10759809
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Filing Dt:
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01/16/2004
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Title:
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STRUCTURE FOR INCREASING DRIVE CURRENT IN A MEMORY ARRAY AND RELATED METHOD
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10759855
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Filing Dt:
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01/16/2004
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Title:
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FLEXIBLE CASCODE AMPLIFIER CIRCUIT WITH HIGH GAIN FOR FLASH MEMORY CELLS
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10762071
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Filing Dt:
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01/20/2004
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Title:
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METHOD FOR ERASING A MEMORY SECTOR IN VIRTUAL GROUND ARCHITECTURE WITH REDUCED LEAKAGE CURRENT
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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10762445
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Filing Dt:
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01/22/2004
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Publication #:
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Pub Dt:
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07/28/2005
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Title:
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STRUCTURE AND METHOD FOR LOW VSS RESISTANCE AND REDUCED DIBL IN A FLOATING GATE MEMORY CELL
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Patent #:
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Issue Dt:
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01/17/2006
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Application #:
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10768188
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Filing Dt:
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02/02/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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10770010
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Filing Dt:
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02/03/2004
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Title:
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NON -VOLATILE MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10770245
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Filing Dt:
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02/02/2004
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Title:
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DISPOSABLE HARD MASK FOR MEMORY BITLINE SCALING
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Patent #:
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Issue Dt:
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01/24/2006
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Application #:
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10770260
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Filing Dt:
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02/02/2004
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Title:
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FLASH MEMORY CELL WITH UV PROTECTIVE LAYER
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10770673
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Filing Dt:
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02/02/2004
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Title:
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BITLINE HARD MASK SPACER FLOW FOR MEMORY CELL SCALING
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10776850
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Filing Dt:
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02/11/2004
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
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Title:
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MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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10776870
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Filing Dt:
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02/11/2004
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
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Title:
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ACTIVE PROGRAMMING AND OPERATION OF A MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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10791417
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Filing Dt:
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03/02/2004
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Title:
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TESTING FOR OPERATING LIFE OF A MEMORY DEVICE WITH ADDRESS CYCLING USING A GRAY CODE SEQUENCE
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10795890
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Filing Dt:
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03/08/2004
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Title:
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SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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02/14/2006
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Application #:
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10795924
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Filing Dt:
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03/08/2004
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Title:
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SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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10799413
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Filing Dt:
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03/12/2004
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Title:
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AVOIDING FIELD OXIDE GOUGING IN SHALLOW TRENCH ISOLATION (STI) REGIONS
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10812703
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Filing Dt:
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03/30/2004
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Title:
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RECESSED CHANNEL WITH SEPARATED ONO MEMORY DEVICE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10817131
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Filing Dt:
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04/02/2004
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Publication #:
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Pub Dt:
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10/13/2005
| | | | |
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Title:
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In-situ surface treatment for memory cell formation
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Patent #:
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Issue Dt:
|
03/03/2009
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Application #:
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10817186
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Filing Dt:
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04/02/2004
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Title:
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USING ORGANIC SEMICONDUCTOR MEMORY IN CONJUNCTION WITH A MEMS ACTUATOR FOR AN ULTRA HIGH DENSITY MEMORY
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|
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Patent #:
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Issue Dt:
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10/27/2009
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Application #:
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10817467
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Filing Dt:
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04/02/2004
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Publication #:
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Pub Dt:
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10/13/2005
| | | | |
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Title:
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POLYMER DIELECTRICS FOR MEMORY ELEMENT ARRAY INTERCONNECT
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|
|
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Patent #:
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|
Issue Dt:
|
03/28/2006
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Application #:
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10818112
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Filing Dt:
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04/05/2004
|
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Publication #:
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Pub Dt:
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09/30/2004
| | | | |
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Title:
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UV-BLOCKING LAYER FOR REDUCING UV-INDUCED CHARGING OF SONOS DUAL-BIT FLASH MEMORY DEVICES IN BEOL PROCESSING
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|
|
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Patent #:
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|
Issue Dt:
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08/21/2007
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Application #:
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10818261
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Filing Dt:
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04/02/2004
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Publication #:
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Pub Dt:
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01/13/2005
| | | | |
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Title:
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MEMORY DEVICE AND METHODS OF USING AND MAKING THE DEVICE
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|
|
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Patent #:
|
|
Issue Dt:
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06/27/2006
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Application #:
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10819162
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Filing Dt:
|
04/07/2004
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|
Title:
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FLASH MEMORY DEVICE AND METHOD OF FORMING THE SAME WITH IMPROVED GATE BREAKDOWN AND ENDURANCE
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|
|
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Patent #:
|
|
Issue Dt:
|
08/09/2005
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Application #:
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10821312
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Filing Dt:
|
04/08/2004
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Title:
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NARROW WIDE SPACER
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|
|
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Patent #:
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|
Issue Dt:
|
12/15/2009
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Application #:
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10823970
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Filing Dt:
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04/13/2004
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Title:
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SEMICONDUCTOR DEVICE HAVING A PAD METAL LAYER AND A LOWER METAL LAYER THAT ARE ELECTRICALLY COUPLED, WHEREAS APERTURES ARE FORMED IN THE LOWER METAL LAYER BELOW A CENTER AREA OF THE PAD METAL LAYER
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|
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Patent #:
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Issue Dt:
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03/07/2006
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Application #:
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10823972
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Filing Dt:
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04/13/2004
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Title:
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MEMORY DEVICE WITH AN ALTERNATING VSS INTERCONNECTION
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|
|
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Patent #:
|
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Issue Dt:
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09/19/2006
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Application #:
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10835341
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Filing Dt:
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04/28/2004
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Title:
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METHOD FOR PROVIDING SHORT CHANNEL EFFECT CONTROL USING A SILICIDE VSS LINE
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|
|
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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10838215
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Filing Dt:
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05/05/2004
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Title:
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FLASH MEMORY DEVICE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/16/2007
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Application #:
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10838962
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Filing Dt:
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05/04/2004
|
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Title:
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METHOD FOR MINIMIZING FALSE DETECTION OF STATES IN FLASH MEMORY DEVICES
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|
|
|
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Patent #:
|
|
Issue Dt:
|
04/18/2006
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Application #:
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10839561
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Filing Dt:
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05/04/2004
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Title:
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METHOD AND APPARATUS FOR ELIMINATING WORD LINE BENDING BY SOURCE SIDE IMPLANTATION
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|
|
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Patent #:
|
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Issue Dt:
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11/28/2006
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Application #:
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10839562
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Filing Dt:
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05/04/2004
|
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Title:
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POSITIVE GATE STRESS DURING ERASE TO IMPROVE RETENTION IN MULTI-LEVEL, NON-VOLATILE FLASH MEMORY
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Patent #:
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Issue Dt:
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01/09/2007
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Application #:
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10839614
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Filing Dt:
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05/05/2004
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Publication #:
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Pub Dt:
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11/10/2005
| | | | |
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Title:
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METHODS AND APPARATUS FOR WORDLINE PROTECTION IN FLASH MEMORY DEVICES
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|
|
|
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Patent #:
|
|
Issue Dt:
|
11/08/2005
|
Application #:
|
10839626
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Filing Dt:
|
05/04/2004
|
|
Title:
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MEMORY ARRAY WITH MEMORY CELLS HAVING REDUCED SHORT CHANNEL EFFECTS
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