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Reel/Frame:024915/0759   Pages: 18
Recorded: 09/01/2010
Attorney Dkt #:35778
Conveyance: SECURITY AGREEMENT
Total properties: 241
Page 1 of 3
Pages: 1 2 3
1
Patent #:
7684380
Issue Dt:
03/23/2010
Application #:
10347752
Filing Dt:
01/22/2003
Publication #:
US20030152059
Pub Dt:
08/14/2003
Title:
SYSTEM AND METHOD FOR HANDLING ASYNCHRONOUS DATA IN A WIRELESS NETWORK
2
Patent #:
7657757
Issue Dt:
02/02/2010
Application #:
10426560
Filing Dt:
04/30/2003
Publication #:
US20040250095
Pub Dt:
12/09/2004
Title:
SEMICONDUCTOR DEVICE AND METHOD UTILIZING VARIABLE MODE CONTROL WITH BLOCK CIPHERS
3
Patent #:
7672689
Issue Dt:
03/02/2010
Application #:
10433855
Filing Dt:
06/06/2003
Publication #:
US20040038652
Pub Dt:
02/26/2004
Title:
MULTIPATH COMMUNICATIONS RECEIVER
4
Patent #:
7653765
Issue Dt:
01/26/2010
Application #:
10507157
Filing Dt:
10/13/2005
Publication #:
US20060059278
Pub Dt:
03/16/2006
Title:
INFORMATION COMMUNICATION CONTROLLER INTERFACE APPARATUS AND METHOD
5
Patent #:
7652597
Issue Dt:
01/26/2010
Application #:
10596367
Filing Dt:
07/13/2006
Publication #:
US20090015448
Pub Dt:
01/15/2009
Title:
A MULTIMODE DECODER
6
Patent #:
7664027
Issue Dt:
02/16/2010
Application #:
10969498
Filing Dt:
10/20/2004
Publication #:
US20060083164
Pub Dt:
04/20/2006
Title:
INFRARED ADAPTER WITH DATA PACKET THROTTLE
7
Patent #:
7685333
Issue Dt:
03/23/2010
Application #:
11085995
Filing Dt:
03/22/2005
Publication #:
US20060217865
Pub Dt:
09/28/2006
Title:
METHOD AND SYSTEM FOR COMMUNICATING WITH MEMORY DEVICES UTILIZING SELECTED TIMING PARAMETERS FROM A TIMING TABLE
8
Patent #:
7683948
Issue Dt:
03/23/2010
Application #:
11095447
Filing Dt:
03/31/2005
Publication #:
US20060221214
Pub Dt:
10/05/2006
Title:
SYSTEM AND METHOD FOR BAD PIXEL REPLACEMENT IN IMAGE PROCESSING
9
Patent #:
7668274
Issue Dt:
02/23/2010
Application #:
11101258
Filing Dt:
04/06/2005
Publication #:
US20060227911
Pub Dt:
10/12/2006
Title:
EYE CENTER RETRAINING SYSTEM AND METHOD
10
Patent #:
7684518
Issue Dt:
03/23/2010
Application #:
11118230
Filing Dt:
04/28/2005
Publication #:
US20060245520
Pub Dt:
11/02/2006
Title:
LOGIC THRESHOLD ACQUISITION CIRCUITS AND METHODS USING REVERSED PEAK DETECTORS
11
Patent #:
7649961
Issue Dt:
01/19/2010
Application #:
11156396
Filing Dt:
06/20/2005
Publication #:
US20070002943
Pub Dt:
01/04/2007
Title:
SUPPRESSED CARRIER QUADRATURE PULSE MODULATOR
12
Patent #:
7657725
Issue Dt:
02/02/2010
Application #:
11166503
Filing Dt:
06/24/2005
Publication #:
US20060294340
Pub Dt:
12/28/2006
Title:
INTEGRATED CIRCUIT WITH MEMORY-LESS PAGE TABLE
13
Patent #:
7643533
Issue Dt:
01/05/2010
Application #:
11183778
Filing Dt:
07/19/2005
Publication #:
US20050265428
Pub Dt:
12/01/2005
Title:
AGILE CLOCK MECHANISM AND METHOD FOR ULTRAWIDE BANDWIDTH COMMUNICATIONS SYSTEM
14
Patent #:
7642594
Issue Dt:
01/05/2010
Application #:
11188588
Filing Dt:
07/25/2005
Publication #:
US20070018234
Pub Dt:
01/25/2007
Title:
ELECTRONIC DEVICE INCLUDING GATE LINES, BIT LINES, OR A COMBINATION THEREOF
15
Patent #:
7649935
Issue Dt:
01/19/2010
Application #:
11198383
Filing Dt:
08/05/2005
Publication #:
US20060034365
Pub Dt:
02/16/2006
Title:
DIGITAL ADAPTIVE FEEDFORWARD HARMONIC DISTORTION COMPENSATION FOR DIGITALLY CONTROLLED POWER STAGE
16
Patent #:
7653675
Issue Dt:
01/26/2010
Application #:
11199576
Filing Dt:
08/08/2005
Publication #:
US20070033245
Pub Dt:
02/08/2007
Title:
CONVOLUTION OPERATION IN A MULTI-MODE WIRELESS PROCESSING SYSTEM
17
Patent #:
7651935
Issue Dt:
01/26/2010
Application #:
11237346
Filing Dt:
09/27/2005
Publication #:
US20070069311
Pub Dt:
03/29/2007
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING ACTIVE REGIONS AND GATE ELECTRODES OF DIFFERENT COMPOSITIONS OVERLYING THE ACTIVE REGIONS
18
Patent #:
7643602
Issue Dt:
01/05/2010
Application #:
11239350
Filing Dt:
09/30/2005
Publication #:
US20070076822
Pub Dt:
04/05/2007
Title:
METHOD AND SYSTEM FOR ESTIMATING FREQUENCY OFFSETS
19
Patent #:
7653448
Issue Dt:
01/26/2010
Application #:
11240314
Filing Dt:
09/30/2005
Publication #:
US20070076120
Pub Dt:
04/05/2007
Title:
NICAM PROCESSING METHOD
20
Patent #:
7664212
Issue Dt:
02/16/2010
Application #:
11252723
Filing Dt:
10/19/2005
Publication #:
US20070086551
Pub Dt:
04/19/2007
Title:
APPARATUS AND METHOD FOR SWITCHING CLOCKS WHILE PREVENTING GLITCHES AND DATA LOSS
21
Patent #:
7669034
Issue Dt:
02/23/2010
Application #:
11257932
Filing Dt:
10/25/2005
Publication #:
US20070094479
Pub Dt:
04/26/2007
Title:
SYSTEM AND METHOD FOR MEMORY ARRAY ACCESS WITH FAST ADDRESS DECODER
22
Patent #:
7684515
Issue Dt:
03/23/2010
Application #:
11287551
Filing Dt:
11/22/2005
Publication #:
US20070116147
Pub Dt:
05/24/2007
Title:
RADIO RECEIVER, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH
23
Patent #:
7672403
Issue Dt:
03/02/2010
Application #:
11287570
Filing Dt:
11/22/2005
Publication #:
US20070116150
Pub Dt:
05/24/2007
Title:
RADIO RECEIVER, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH
24
Patent #:
7656968
Issue Dt:
02/02/2010
Application #:
11287571
Filing Dt:
11/22/2005
Publication #:
US20070116148
Pub Dt:
05/24/2007
Title:
RADIO RECEIVER, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH
25
Patent #:
7676206
Issue Dt:
03/09/2010
Application #:
11294663
Filing Dt:
12/05/2005
Publication #:
US20070129038
Pub Dt:
06/07/2007
Title:
LOW NOISE, LOW DISTORTION RADIO RECEIVER FRONT-END
26
Patent #:
7679125
Issue Dt:
03/16/2010
Application #:
11300077
Filing Dt:
12/14/2005
Publication #:
US20070134888
Pub Dt:
06/14/2007
Title:
BACK-GATED SEMICONDUCTOR DEVICE WITH A STORAGE LAYER AND METHODS FOR FORMING THEREOF
27
Patent #:
7683486
Issue Dt:
03/23/2010
Application #:
11302007
Filing Dt:
12/09/2005
Publication #:
US20070132062
Pub Dt:
06/14/2007
Title:
ELECTRONIC APPARATUS INTERCONNECT ROUTING AND INTERCONNECT ROUTING METHOD FOR MINIMIZING PARASITIC RESISTANCE
28
Patent #:
7644251
Issue Dt:
01/05/2010
Application #:
11312852
Filing Dt:
12/19/2005
Publication #:
US20070143569
Pub Dt:
06/21/2007
Title:
NON-VOLATILE SOLID-STATE MEMORY CONTROLLER
29
Patent #:
7687370
Issue Dt:
03/30/2010
Application #:
11342102
Filing Dt:
01/27/2006
Publication #:
US20070178661
Pub Dt:
08/02/2007
Title:
METHOD OF FORMING A SEMICONDUCTOR ISOLATION TRENCH
30
Patent #:
7680231
Issue Dt:
03/16/2010
Application #:
11349874
Filing Dt:
02/08/2006
Publication #:
US20070183549
Pub Dt:
08/09/2007
Title:
ADAPTIVE VARIABLE LENGTH PULSE SYNCHRONIZER
31
Patent #:
7689807
Issue Dt:
03/30/2010
Application #:
11350487
Filing Dt:
02/09/2006
Publication #:
US20070186041
Pub Dt:
08/09/2007
Title:
MASS STORAGE DEVICE, MASS STORAGE CONTROLLER AND METHODS FOR USE THEREWITH
32
Patent #:
7656045
Issue Dt:
02/02/2010
Application #:
11360336
Filing Dt:
02/23/2006
Publication #:
US20070194460
Pub Dt:
08/23/2007
Title:
CAP LAYER FOR AN ALUMINUM COPPER BOND PAD
33
Patent #:
7667491
Issue Dt:
02/23/2010
Application #:
11361625
Filing Dt:
02/24/2006
Publication #:
US20070200598
Pub Dt:
08/30/2007
Title:
LOW VOLTAGE OUTPUT BUFFER AND METHOD FOR BUFFERING DIGITAL OUTPUT DATA
34
Patent #:
7675844
Issue Dt:
03/09/2010
Application #:
11362214
Filing Dt:
02/24/2006
Publication #:
US20070201349
Pub Dt:
08/30/2007
Title:
SYNCHRONIZATION FOR OFDM SIGNALS
35
Patent #:
7670760
Issue Dt:
03/02/2010
Application #:
11369513
Filing Dt:
03/06/2006
Publication #:
US20070207404
Pub Dt:
09/06/2007
Title:
TREATMENT FOR REDUCTION OF LINE EDGE ROUGHNESS
36
Patent #:
7653822
Issue Dt:
01/26/2010
Application #:
11377993
Filing Dt:
03/17/2006
Publication #:
US20070220281
Pub Dt:
09/20/2007
Title:
ENTRY INTO A LOW POWER MODE UPON APPLICATION OF POWER AT A PROCESSING DEVICE
37
Patent #:
7666698
Issue Dt:
02/23/2010
Application #:
11386147
Filing Dt:
03/21/2006
Publication #:
US20070224832
Pub Dt:
09/27/2007
Title:
METHOD FOR FORMING AND SEALING A CAVITY FOR AN INTEGRATED MEMS DEVICE
38
Patent #:
7649957
Issue Dt:
01/19/2010
Application #:
11387466
Filing Dt:
03/22/2006
Publication #:
US20070223633
Pub Dt:
09/27/2007
Title:
NON-OVERLAPPING MULTI-STAGE CLOCK GENERATOR SYSTEM
39
Patent #:
7681106
Issue Dt:
03/16/2010
Application #:
11392321
Filing Dt:
03/29/2006
Publication #:
US20070234181
Pub Dt:
10/04/2007
Title:
ERROR CORRECTION DEVICE AND METHODS THEREOF
40
Patent #:
7683480
Issue Dt:
03/23/2010
Application #:
11393582
Filing Dt:
03/29/2006
Publication #:
US20070235855
Pub Dt:
10/11/2007
Title:
METHODS AND APPARATUS FOR A REDUCED INDUCTANCE WIREBOND ARRAY
41
Patent #:
7663470
Issue Dt:
02/16/2010
Application #:
11403395
Filing Dt:
04/13/2006
Publication #:
US20060266646
Pub Dt:
11/30/2006
Title:
TRIMMING CIRCUIT AND ELECTRONIC CIRCUIT
42
Patent #:
7675983
Issue Dt:
03/09/2010
Application #:
11404350
Filing Dt:
04/14/2006
Publication #:
US20070242599
Pub Dt:
10/18/2007
Title:
MITIGATION OF DC DISTORTION IN OFDM RECEIVERS
43
Patent #:
7670895
Issue Dt:
03/02/2010
Application #:
11409633
Filing Dt:
04/24/2006
Publication #:
US20070246793
Pub Dt:
10/25/2007
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR LAYER AND ANOTHER LAYER ADJACENT TO AN OPENING WITHIN THE SEMICONDUCTOR LAYER
44
Patent #:
7655550
Issue Dt:
02/02/2010
Application #:
11427980
Filing Dt:
06/30/2006
Publication #:
US20080001202
Pub Dt:
01/03/2008
Title:
A METHOD OF MAKING METAL GATE TRANSISTORS
45
Patent #:
7675806
Issue Dt:
03/09/2010
Application #:
11435942
Filing Dt:
05/17/2006
Publication #:
US20070280026
Pub Dt:
12/06/2007
Title:
LOW VOLTAGE MEMORY DEVICE AND METHOD THEREOF
46
Patent #:
7649781
Issue Dt:
01/19/2010
Application #:
11435944
Filing Dt:
05/17/2006
Publication #:
US20080043525
Pub Dt:
02/21/2008
Title:
BIT CELL REFERENCE DEVICE AND METHODS THEREOF
47
Patent #:
7650579
Issue Dt:
01/19/2010
Application #:
11441367
Filing Dt:
05/25/2006
Publication #:
US20070277133
Pub Dt:
11/29/2007
Title:
MODEL CORRESPONDENCE METHOD AND DEVICE
48
Patent #:
7647573
Issue Dt:
01/12/2010
Application #:
11442196
Filing Dt:
05/26/2006
Publication #:
US20070277135
Pub Dt:
11/29/2007
Title:
METHOD AND DEVICE FOR TESTING DELAY PATHS OF AN INTEGRATED CIRCUIT
49
Patent #:
7653678
Issue Dt:
01/26/2010
Application #:
11457380
Filing Dt:
07/13/2006
Publication #:
US20080016141
Pub Dt:
01/17/2008
Title:
A DIRECT DIGITAL SYNTHESIS CIRCUIT
50
Patent #:
7668029
Issue Dt:
02/23/2010
Application #:
11464124
Filing Dt:
08/11/2006
Publication #:
US20080037343
Pub Dt:
02/14/2008
Title:
MEMORY HAVING SENSE TIME OF VARIABLE DURATION
51
Patent #:
7651918
Issue Dt:
01/26/2010
Application #:
11510541
Filing Dt:
08/25/2006
Publication #:
US20080048257
Pub Dt:
02/28/2008
Title:
STRAINED SEMICONDUCTOR POWER DEVICE AND METHOD
52
Patent #:
7647472
Issue Dt:
01/12/2010
Application #:
11510545
Filing Dt:
08/25/2006
Publication #:
US20060292292
Pub Dt:
12/28/2006
Title:
High speed and high throughput digital communications processor with efficient cooperation between programmable processing components
53
Patent #:
7681021
Issue Dt:
03/16/2010
Application #:
11536173
Filing Dt:
09/28/2006
Publication #:
US20080082843
Pub Dt:
04/03/2008
Title:
DYNAMIC BRANCH PREDICTION USING A WAKE VALUE TO ENABLE LOW POWER MODE FOR A PREDICTED NUMBER OF INSTRUCTION FETCHES BETWEEN A BRANCH AND A SUBSEQUENT BRANCH
54
Patent #:
7678620
Issue Dt:
03/16/2010
Application #:
11538862
Filing Dt:
10/05/2006
Publication #:
US20080085574
Pub Dt:
04/10/2008
Title:
ANTIFUSE ONE TIME PROGRAMMABLE MEMORY ARRAY AND METHOD OF MANUFACTURE
55
Patent #:
7679373
Issue Dt:
03/16/2010
Application #:
11548853
Filing Dt:
10/12/2006
Publication #:
US20070080739
Pub Dt:
04/12/2007
Title:
TRIMMING CIRCUIT, ELECTRONIC CIRCUIT, AND TRIMMING CONTROL SYSTEM
56
Patent #:
7679974
Issue Dt:
03/16/2010
Application #:
11550900
Filing Dt:
10/19/2006
Publication #:
US20080094924
Pub Dt:
04/24/2008
Title:
MEMORY DEVICE HAVING SELECTIVELY DECOUPLEABLE MEMORY PORTIONS AND METHOD THEREOF
57
Patent #:
7682912
Issue Dt:
03/23/2010
Application #:
11554859
Filing Dt:
10/31/2006
Publication #:
US20080102607
Pub Dt:
05/01/2008
Title:
III-V COMPOUND SEMICONDUCTOR DEVICE WITH A SURFACE LAYER IN ACCESS REGIONS HAVING CHARGE OF POLARITY OPPOSITE TO CHANNEL CHARGE AND METHOD OF MAKING THE SAME
58
Patent #:
7674656
Issue Dt:
03/09/2010
Application #:
11567249
Filing Dt:
12/06/2006
Publication #:
US20080138938
Pub Dt:
06/12/2008
Title:
DIE POSITIONING FOR PACKAGED INTEGRATED CIRCUITS
59
Patent #:
7689951
Issue Dt:
03/30/2010
Application #:
11574496
Filing Dt:
02/28/2007
Publication #:
US20080320422
Pub Dt:
12/25/2008
Title:
A DESIGN RULE CHECKING SYSTEM AND METHOD, FOR CHECKING COMPLIANCE OF AN INTEGREATED CIRCUIT DESIGN WITH A PLURALITY OF DESIGN RULES
60
Patent #:
7667940
Issue Dt:
02/23/2010
Application #:
11576134
Filing Dt:
03/27/2007
Publication #:
US20080259515
Pub Dt:
10/23/2008
Title:
POWER SWITCHING APPARATUS WITH OPEN-LOAD DETECTION
61
Patent #:
7684504
Issue Dt:
03/23/2010
Application #:
11589877
Filing Dt:
10/31/2006
Publication #:
US20080101483
Pub Dt:
05/01/2008
Title:
SYSTEM AND METHOD FOR REDUCING EDGE EFFECT
62
Patent #:
7674646
Issue Dt:
03/09/2010
Application #:
11593896
Filing Dt:
11/07/2006
Publication #:
US20080122560
Pub Dt:
05/29/2008
Title:
THREE DIMENSIONAL INTEGRATED PASSIVE DEVICE AND METHOD OF FABRICATION
63
Patent #:
7649764
Issue Dt:
01/19/2010
Application #:
11619808
Filing Dt:
01/04/2007
Publication #:
US20080168231
Pub Dt:
07/10/2008
Title:
MEMORY WITH SHARED WRITE BIT LINE(S)
64
Patent #:
7651916
Issue Dt:
01/26/2010
Application #:
11626768
Filing Dt:
01/24/2007
Publication #:
US20080173923
Pub Dt:
07/24/2008
Title:
ELECTRONIC DEVICE INCLUDING TRENCHES AND DISCONTINUOUS STORAGE ELEMENTS AND PROCESSES OF FORMING AND USING THE SAME
65
Patent #:
7665361
Issue Dt:
02/23/2010
Application #:
11626924
Filing Dt:
01/25/2007
Publication #:
US20080178671
Pub Dt:
07/31/2008
Title:
METHOD AND APPARATUS FOR CLOSED LOOP OFFSET CANCELLATION
66
Patent #:
7684264
Issue Dt:
03/23/2010
Application #:
11627445
Filing Dt:
01/26/2007
Publication #:
US20080181034
Pub Dt:
07/31/2008
Title:
MEMORY SYSTEM WITH RAM ARRAY AND REDUNDANT RAM MEMORY CELLS HAVING A DIFFERENT DESIGNED CELL CIRCUIT TOPOLOGY THAN CELLS OF NON REDUNDANT RAM ARRAY
67
Patent #:
7683483
Issue Dt:
03/23/2010
Application #:
11671048
Filing Dt:
02/05/2007
Publication #:
US20080185686
Pub Dt:
08/07/2008
Title:
ELECTRONIC DEVICE WITH CONNECTION BUMPS
68
Patent #:
7663196
Issue Dt:
02/16/2010
Application #:
11673015
Filing Dt:
02/09/2007
Publication #:
US20080191293
Pub Dt:
08/14/2008
Title:
INTEGRATED PASSIVE DEVICE AND METHOD OF FABRICATION
69
Patent #:
7676769
Issue Dt:
03/09/2010
Application #:
11678971
Filing Dt:
02/26/2007
Publication #:
US20080206903
Pub Dt:
08/28/2008
Title:
ADAPTIVE THRESHOLD WAFER TESTING DEVICE AND METHOD THEREOF
70
Patent #:
7648884
Issue Dt:
01/19/2010
Application #:
11680199
Filing Dt:
02/28/2007
Publication #:
US20080206939
Pub Dt:
08/28/2008
Title:
SEMICONDUCTOR DEVICE WITH INTEGRATED RESISTIVE ELEMENT AND METHOD OF MAKING
71
Patent #:
7669100
Issue Dt:
02/23/2010
Application #:
11683607
Filing Dt:
03/08/2007
Publication #:
US20080220545
Pub Dt:
09/11/2008
Title:
SYSTEM AND METHOD FOR TESTING AND PROVIDING AN INTEGRATED CIRCUIT HAVING MULTIPLE MODULES OR SUBMODULES
72
Patent #:
7683439
Issue Dt:
03/23/2010
Application #:
11685027
Filing Dt:
03/12/2007
Publication #:
US20080224185
Pub Dt:
09/18/2008
Title:
SEMICONDUCTOR DEVICE HAVING A METAL CARBIDE GATE WITH AN ELECTROPOSITIVE ELEMENT AND A METHOD OF MAKING THE SAME
73
Patent #:
7680229
Issue Dt:
03/16/2010
Application #:
11693705
Filing Dt:
03/29/2007
Publication #:
US20070230633
Pub Dt:
10/04/2007
Title:
METHOD OF DETERMINING A SYNCHRONOUS PHASE
74
Patent #:
7642163
Issue Dt:
01/05/2010
Application #:
11693829
Filing Dt:
03/30/2007
Publication #:
US20080242022
Pub Dt:
10/02/2008
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS WITHIN A DIELECTRIC LAYER
75
Patent #:
7668018
Issue Dt:
02/23/2010
Application #:
11695722
Filing Dt:
04/03/2007
Publication #:
US20080247255
Pub Dt:
10/09/2008
Title:
ELECTRONIC DEVICE INCLUDING A NONVOLATILE MEMORY ARRAY AND METHODS OF USING THE SAME
76
Patent #:
7680090
Issue Dt:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
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Assignor
1
FREESCALE SEMICONDUCTOR, INC.
Exec Dt:
05/06/2010
Assignee
1
CITIBANK, N.A., AS COLLATERAL AGENT
390 GREENWICH STREET
NEW YORK, NEW YORK 10013
Correspondence name and address
IP RESEARCH PLUS, INC.
21 TADCASTER CIRCLE
ATTN: PENELOPE J.A. AGODOA
WALDORF, MD 20602

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