Patent Assignment Details
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| Reel/Frame: | 024934/0593 | |
| Pages: | 6 |
| | Recorded: | 09/02/2010 | | |
| Attorney Dkt #: | 1009006-3 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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09/18/2012
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Application #:
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12849700
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Filing Dt:
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08/03/2010
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Publication #:
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Pub Dt:
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12/02/2010
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Title:
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HIGH IMPEDANCE, HIGH PARALLELISM, HIGH TEMPERATURE MEMORY TEST SYSTEM ARCHITECTURE
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Assignee
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| NO. 1 YISHUN AVE. 7 |
| LOT 1937C, 1935X, 1975P |
| SINGAPORE, SINGAPORE 768923 |
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Correspondence name and address
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GREGORY W. OSTERLOTH
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P.O. BOX 8749
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DENVER, CO 80201
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