|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
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Application #:
|
10261418
|
Filing Dt:
|
10/02/2002
|
|
Publication #:
|
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Pub Dt:
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06/12/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND DATA ACCESS METHOD FOR SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10261491
|
Filing Dt:
|
10/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR LAYING OUT POWER SUPPLY WIRING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
10261674
|
Filing Dt:
|
10/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/02/2003
| | | | |
|
Title:
|
A/D CONVERTER CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
10263646
|
Filing Dt:
|
10/04/2002
|
|
Publication #:
|
|
Pub Dt:
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04/24/2003
| | | | |
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE OF DUAL-OPERATION TYPE WITH DATA PROTECTION FUNCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
10265101
|
Filing Dt:
|
10/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
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|
Title:
|
OSCILLATOR CIRCUIT, SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH THE OSCILLATOR CIRCUIT, AND CONTROL METHOD OF THE OSCILLATOR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10265254
|
Filing Dt:
|
10/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND REDUNDANCY JUDGING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10267873
|
Filing Dt:
|
10/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
DRAM OPERATING LIKE SRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2005
|
Application #:
|
10268942
|
Filing Dt:
|
10/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
|
Title:
|
MULTI-THRESHOLD MIS INTEGRATED CIRCUIT DEVICE AND CIRCUIT DESIGN METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
|
Application #:
|
10269858
|
Filing Dt:
|
10/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/03/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
10270135
|
Filing Dt:
|
10/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
LEVEL SHIFTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2004
|
Application #:
|
10270196
|
Filing Dt:
|
10/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
MEMORY CIRCUIT HAVING COMPRESSED TESTING FUNCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10270649
|
Filing Dt:
|
10/16/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
LEVEL CONVERSION CIRCUIT FOR WHICH AN OPERATION AT POWER VOLTAGE RISE TIME IS STABILIZED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
|
Application #:
|
10271533
|
Filing Dt:
|
10/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
MEMORY CIRCUIT HAVING PARITY CELL ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2003
|
Application #:
|
10272997
|
Filing Dt:
|
10/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
DATA READ-OUT CIRCUIT, DATA READ-OUT METHOD, AND DATA STORAGE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
10272998
|
Filing Dt:
|
10/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10274602
|
Filing Dt:
|
10/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT AND A TESTING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
10277151
|
Filing Dt:
|
10/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
READ DISTURB ALLEVIATED FLASH MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2004
|
Application #:
|
10277707
|
Filing Dt:
|
10/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT WITH INPUT/OUTPUT INTERFACE ADAPTED FOR SMALL-AMPLITUDE OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
10277986
|
Filing Dt:
|
10/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT WITH INPUT/OUTPUT INTERFACE ADAPTED FOR SMALL-AMPLITUDE OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
|
Application #:
|
10278076
|
Filing Dt:
|
10/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT WITH INPUT/OUTPUT INTERFACE ADAPTED FOR SMALL-AMPLITUDE OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
10278080
|
Filing Dt:
|
10/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT WITH INPUT/OUTPUT INTERFACE ADAPTED FOR SMALL-AMPLITUDE OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
10278812
|
Filing Dt:
|
10/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
SEMICONDUCTOR NONVOLATILE MEMORY FOR PERFORMING READ OPERATIONS WHILE PERFORMING WRITE OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2005
|
Application #:
|
10278883
|
Filing Dt:
|
10/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE EQUIPPED WITH TRANSFER CIRCUIT FOR CASCADE CONNECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
10278902
|
Filing Dt:
|
10/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
RECEIVING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2006
|
Application #:
|
10279008
|
Filing Dt:
|
10/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/25/2003
| | | | |
|
Title:
|
CAPACITANCE DETECTION TYPE SENSOR AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2004
|
Application #:
|
10279920
|
Filing Dt:
|
10/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/25/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2006
|
Application #:
|
10279963
|
Filing Dt:
|
10/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
MEMORY DEVICE AND INTERNAL CONTROL METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
10284092
|
Filing Dt:
|
10/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
MULTI-PORT MEMORY BASED ON DRAM CORE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10284174
|
Filing Dt:
|
10/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10285425
|
Filing Dt:
|
11/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/13/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2004
|
Application #:
|
10287495
|
Filing Dt:
|
11/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2003
| | | | |
|
Title:
|
SEMICONDUCTOR STORAGE DEVICE CONDUCTING A LATE-WRITE OPERATION AND CONTROLLING A TEST READ-OPERATION TO READ DATA NOT FROM A DATA LATCH CIRCUIT BUT FROM A MEMORY CORE CIRCUIT REGARDLESS OF WHETHER A PRECEDING ADDRESS AND A PRESENT ADDRESS MATCH EACH OTHER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
10288461
|
Filing Dt:
|
11/06/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
WORD-LINE DEFICIENCY DETECTION METHOD FOR SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
10289314
|
Filing Dt:
|
11/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/27/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY HAVING DUMMY REGIONS IN MEMORY CELL ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10294581
|
Filing Dt:
|
11/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/11/2003
| | | | |
|
Title:
|
DEVICE AND METHOD FOR INHIBITING POWER FLUCTUATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
|
10295855
|
Filing Dt:
|
11/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
MEMORY CONTROLLER AND A CACHE FOR ACCESSING A MAIN MEMORY, AND A SYSTEM AND A METHOD FOR CONTROLLING THE MAIN MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10299713
|
Filing Dt:
|
11/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/09/2003
| | | | |
|
Title:
|
CONTROL METHOD OF SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
10299756
|
Filing Dt:
|
11/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/11/2003
| | | | |
|
Title:
|
NONVOLATILE MULTILEVEL CELL MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2005
|
Application #:
|
10299775
|
Filing Dt:
|
11/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
10300592
|
Filing Dt:
|
11/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND PORTABLE TERMINAL EQUIPMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2005
|
Application #:
|
10300800
|
Filing Dt:
|
11/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY HAVING BURST TRANSFER FUNCTION AND INTERNAL REFRESH FUNCITON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2005
|
Application #:
|
10301649
|
Filing Dt:
|
11/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
OFFSET CANCEL CIRCUIT OF VOLTAGE FOLLOWER EQUIPPED WITH OPERATIONAL AMPLIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2005
|
Application #:
|
10302999
|
Filing Dt:
|
11/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2003
| | | | |
|
Title:
|
VARIABLE DIGITAL DELAY LINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
10307521
|
Filing Dt:
|
12/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
ELECTRONIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
10308073
|
Filing Dt:
|
12/03/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
VOLTAGE GENERATION CIRCUIT FOR SELECTIVELY GENERATING HIGH AND NEGATIVE VOLTAGES ON ONE NODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2009
|
Application #:
|
10315088
|
Filing Dt:
|
12/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
CLOCK RECOVERY CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
10316121
|
Filing Dt:
|
12/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2008
|
Application #:
|
10316901
|
Filing Dt:
|
12/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
BIPOLAR SUPPLY VOLTAGE GENERATOR AND SEMICONDUCTOR DEVICE FOR SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
10318052
|
Filing Dt:
|
12/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
CMOS IMAGE SENSOR WITH VOLTAGE CONTROL CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10321460
|
Filing Dt:
|
12/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING TEST MODE ENTRY CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
10327094
|
Filing Dt:
|
12/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
| | | | |
|
Title:
|
PULSE WIDTH DETECTION CIRCUIT FILTERING THE INPUT SIGNAL AND GENERATING A BINARY SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2005
|
Application #:
|
10327096
|
Filing Dt:
|
12/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH FAST MASKING PROCESS IN BURST WRITE MODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
10327653
|
Filing Dt:
|
12/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/03/2003
| | | | |
|
Title:
|
PROGRAMMABLE LOGIC DEVICE WITH FERROELECTRIC CONFIGURATION MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
10329669
|
Filing Dt:
|
12/27/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
10330063
|
Filing Dt:
|
12/30/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/02/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT, RADIO FREQUENCY IDENTIFICATION TRANSPONDER, AND NON-COTACT IC CARD
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Patent #:
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Issue Dt:
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03/16/2004
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Application #:
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10335921
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Filing Dt:
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01/03/2003
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Publication #:
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Pub Dt:
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07/10/2003
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Title:
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NEGATIVE VOLTAGE GENERATING CIRCUIT
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Patent #:
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Issue Dt:
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02/20/2007
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Application #:
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10335925
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Filing Dt:
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01/03/2003
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Publication #:
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Pub Dt:
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07/31/2003
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Title:
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INTEGRATED CIRCUIT FREE FROM ACCUMULATION OF DUTY RATIO ERRORS
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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10335948
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Filing Dt:
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01/03/2003
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Publication #:
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Pub Dt:
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01/08/2004
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Title:
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SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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10335949
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Filing Dt:
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01/03/2003
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Publication #:
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Pub Dt:
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01/15/2004
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Title:
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SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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12/20/2005
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Application #:
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10337436
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Filing Dt:
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01/02/2003
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Publication #:
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Pub Dt:
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08/07/2003
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Title:
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CORRELATED DOUBLE SAMPLING CIRCUIT AND CMOS IMAGE SENSOR INCLUDING THE SAME
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Patent #:
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Issue Dt:
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06/22/2004
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Application #:
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10342094
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Filing Dt:
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01/15/2003
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Publication #:
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Pub Dt:
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08/07/2003
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Title:
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CODE GENERATION DEVICE, SEMICONDUCTOR DEVICE, AND RECEIVER DEVICE
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10342172
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Filing Dt:
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01/15/2003
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Publication #:
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Pub Dt:
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09/18/2003
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Title:
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LEVEL-SHIFTER CIRCUIT PROPERLY OPERABLE WITH LOW VOLTAGE INPUT
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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10345187
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Filing Dt:
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01/16/2003
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Publication #:
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Pub Dt:
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06/05/2003
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Title:
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SEMICONDUCTOR DEVICE HAVING A HIGH-SPEED DATA READ OPERATION
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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10345340
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Filing Dt:
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01/16/2003
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Publication #:
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Pub Dt:
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06/05/2003
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Title:
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SUBSTRATE VOLTAGE SELECTION CIRCUIT
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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10345352
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Filing Dt:
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01/16/2003
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Publication #:
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Pub Dt:
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08/14/2003
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Title:
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DC-DC CONVERTER, DUTY-RATIO SETTING CIRCUIT AND ELECTRIC APPLIANCE USING THEM
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10345353
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Filing Dt:
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01/16/2003
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Publication #:
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Pub Dt:
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09/18/2003
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Title:
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ASYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10345373
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Filing Dt:
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01/16/2003
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Publication #:
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Pub Dt:
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10/16/2003
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Title:
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SEMICONDUCTOR MEMORY APPARATUS SIMULTANEOUSLY ACCESSIBLE VIA MULTI-PORTS
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10346103
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Filing Dt:
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01/17/2003
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Publication #:
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Pub Dt:
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08/07/2003
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Title:
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MEMORY DEVICE INCLUDING BACKUP MEMORY FOR SAVING DATA IN STANDBY MODE
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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10346123
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Filing Dt:
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01/17/2003
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Publication #:
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Pub Dt:
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09/25/2003
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Title:
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NON-VOLATILE MEMORY CIRCUIT COMPRISING AUTOMATIC ERASE FUNCTION
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10347868
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Filing Dt:
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01/22/2003
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Publication #:
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Pub Dt:
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01/01/2004
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Title:
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SEMICONDUCTOR DEVICE WITH CONDUCTION TEST TERMINALS
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10349106
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Filing Dt:
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01/23/2003
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Publication #:
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Pub Dt:
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08/07/2003
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Title:
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DC OFFSET CANCEL CIRCUIT
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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10349107
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Filing Dt:
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01/23/2003
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Publication #:
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Pub Dt:
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08/14/2003
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Title:
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DC OFFSET CANCEL CIRCUIT
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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10350191
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Filing Dt:
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01/24/2003
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Publication #:
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Pub Dt:
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01/29/2004
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Title:
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SEMICONDUCTOR MEMORY HAVING MEMORY CELLS REQUIRING REFRESH OPERATION
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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10352985
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Filing Dt:
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01/29/2003
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Publication #:
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Pub Dt:
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06/19/2003
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC APPARATUS
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10354023
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Filing Dt:
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01/30/2003
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Publication #:
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Pub Dt:
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09/25/2003
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Title:
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DIRECT MEMORY ACCESS DEVICE
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Patent #:
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Issue Dt:
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04/26/2005
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Application #:
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10356489
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Filing Dt:
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02/03/2003
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Publication #:
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Pub Dt:
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12/25/2003
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Title:
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SEMICONDUCTOR DEVICE AND TEST METHOD FOR THE SAME
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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10357372
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Filing Dt:
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02/04/2003
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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ELECTRONICALLY REWRITABLE NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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10358212
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Filing Dt:
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02/05/2003
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Publication #:
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Pub Dt:
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08/14/2003
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Title:
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CIRCUIT FOR CORRECTION OF WHITE PIXEL DEFECTS AND AN IMAGE SENSOR USING THE CIRCUIT FOR CORRECTION OF WHITE PIXEL DEFECTS
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10358224
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Filing Dt:
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02/05/2003
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Publication #:
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Pub Dt:
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12/04/2003
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Title:
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SCAN FLIP-FLOP CIRCUIT, SCAN FLIP-FLOP CIRCUIT ARRAY, AND INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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12/13/2005
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Application #:
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10360635
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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04/07/2005
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Title:
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CMOS IMAGE SENSOR PERMITTING INCREASED LIGHT SENSITIVITY FROM AMPLIFICATION OF PIXEL DETECTION SIGNALS
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Patent #:
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Issue Dt:
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08/17/2004
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Application #:
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10360731
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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SEMICONDUCTOR MEMORY AND OUTPUT SIGNAL CONTROL METHOD AND CIRCUIT IN SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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10360862
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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09/18/2003
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Title:
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SELF-TESTING CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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10361620
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Filing Dt:
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02/11/2003
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Publication #:
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Pub Dt:
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10/23/2003
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Title:
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SYNCHRONIZATION CIRCUIT FOR TRANSFERRING DATA USING A BUS OF A DIFFERENT WIDTH
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Patent #:
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Issue Dt:
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10/28/2003
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Application #:
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10361625
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Filing Dt:
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02/11/2003
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Publication #:
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Pub Dt:
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08/14/2003
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Title:
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DIGITAL-ANALOG CONVERTER
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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10364468
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Filing Dt:
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02/12/2003
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Publication #:
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Pub Dt:
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09/25/2003
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Title:
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SIGNAL PROCESSING APPARATUS AND SIGNAL PROCESSING METHOD
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10365452
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Filing Dt:
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02/13/2003
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Publication #:
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Pub Dt:
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09/18/2003
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Title:
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MEMORY DEVICE WHICH CAN CHANGE CONTROL BY CHIP SELECT SIGNAL
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10365456
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Filing Dt:
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02/13/2003
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Publication #:
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Pub Dt:
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12/11/2003
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Title:
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SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF CONTROLLING THE SAME
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10365504
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Filing Dt:
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02/13/2003
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR SELECTING MULTIPLE WORD LINES IN A SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10367966
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Filing Dt:
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02/19/2003
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Publication #:
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Pub Dt:
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09/25/2003
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Title:
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DIGITAL-ANALOG-CONVERSION CIRCUIT HAVING FUNCTION OF AUTOMATIC OFFSET ADJUSTMENT
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Patent #:
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Issue Dt:
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08/02/2005
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Application #:
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10368409
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Filing Dt:
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02/20/2003
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Publication #:
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Pub Dt:
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12/04/2003
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Title:
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INPUT/OUTPUT BUFFER FOR PROTECTING A CIRCUIT FROM SIGNALS RECEIVED FROM EXTERNAL DEVICES AND METHOD OF USE
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10369496
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Filing Dt:
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02/21/2003
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Publication #:
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Pub Dt:
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01/15/2004
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Title:
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THRESHOLD VOLTAGE ADJUSTMENT METHOD OF NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10369562
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Filing Dt:
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02/21/2003
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH EFFICIENT BUFFER CONTROL FOR DATA BUSES
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10370487
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Filing Dt:
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02/24/2003
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Publication #:
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Pub Dt:
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12/25/2003
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH BUILT-IN SELF-DIAGNOSTIC FUNCTION AND SEMICONDUCTOR DEVICE HAVING THE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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10372100
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Filing Dt:
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02/25/2003
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Publication #:
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Pub Dt:
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07/03/2003
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Title:
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METHOD OF MANAGING A DEFECT IN A FLASH MEMORY
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Patent #:
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Issue Dt:
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01/31/2006
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Application #:
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10372102
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Filing Dt:
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02/25/2003
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Publication #:
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Pub Dt:
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09/04/2003
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Title:
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OUTPUT BUFFER CIRCUIT
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10373858
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Filing Dt:
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02/27/2003
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Publication #:
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Pub Dt:
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02/12/2004
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10373869
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Filing Dt:
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02/27/2003
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Publication #:
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Pub Dt:
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07/24/2003
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Title:
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SYNCHRONOUS SEMICONDUCTOR DEVICE, AND INSPECTION SYSTEM AND METHOD FOR THE SAME
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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10376617
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Filing Dt:
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03/03/2003
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Publication #:
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Pub Dt:
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11/13/2003
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Title:
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MICROPROCESSOR AND OPERATION MODE SWITCHING METHOD FOR THE MICROPROCESSOR
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Patent #:
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Issue Dt:
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05/25/2004
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Application #:
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10379563
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Filing Dt:
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03/06/2003
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Publication #:
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Pub Dt:
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03/04/2004
| | | | |
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Title:
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SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10387398
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Filing Dt:
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03/14/2003
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Publication #:
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Pub Dt:
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03/04/2004
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Title:
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SEMICONDUCTOR MEMORY HAVING A PULSE GENERATOR FOR GENERATING COLUMN PULSES
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10390020
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Filing Dt:
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03/18/2003
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Publication #:
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Pub Dt:
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10/02/2003
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Title:
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SWITCHING REGULATOR HAVING TWO OR MORE OUTPUTS
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