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Reel/Frame:025078/0413   Pages: 4
Recorded: 09/29/2010
Attorney Dkt #:2557SI-001454/US
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT ERROR IN NAME OF THIRD INVENTOR(ERROR AT REEL 024901, FRAME 0572)
Total properties: 1
1
Patent #:
NONE
Issue Dt:
Application #:
12801501
Filing Dt:
06/11/2010
Publication #:
Pub Dt:
06/30/2011
Title:
TRANSISTOR INCLUDING SEMICONDUCTOR INSERTION LAYER
Assignors
1
Exec Dt:
08/05/2010
2
Exec Dt:
08/05/2010
3
Exec Dt:
08/05/2010
4
Exec Dt:
08/05/2010
Assignee
1
416, MAETAN-DONG, YEONGTONG-GU
SUWON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF
Correspondence name and address
HARNESS, DICKEY & PIERCE, P.L.C.
P.O. BOX 8910
RESTON, VA 20195 USA

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