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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:025783/0613   Pages: 42
Recorded: 02/11/2011
Conveyance: PATENT SECURITY AGREEMENT
Total properties: 594
Page 2 of 6
Pages: 1 2 3 4 5 6
1
Patent #:
Issue Dt:
03/11/1997
Application #:
08505830
Filing Dt:
05/18/1995
Title:
LOGIC MODULE FOR A PROGRAMMABLE LOGIC DEVICE
2
Patent #:
Issue Dt:
06/17/1997
Application #:
08506828
Filing Dt:
07/25/1995
Title:
PROGRAMMABLE NON-VOLATILE BIDIRECTIONAL SWITCH FOR PROGRAMMABLE LOGIC
3
Patent #:
Issue Dt:
05/27/1997
Application #:
08508914
Filing Dt:
07/28/1995
Title:
NONVOLATILE REPROGRAMMABLE INTERCONNECT CELL WITH FN TUNNELING AND PROGRAMMING METHOD THEREOF
4
Patent #:
Issue Dt:
08/29/2000
Application #:
08521252
Filing Dt:
08/30/1995
Title:
AN IMPROVED ANTIFUSE STRUCTURE SUITABLE FOR VLSI APPLICATION
5
Patent #:
Issue Dt:
11/21/2000
Application #:
08571615
Filing Dt:
12/13/1995
Title:
DIELECTRIC-POLYSILICON-DIELECTRIC-POLYSILICON-DIELECTRIC ANTIFUSE FOR FIELD PROGRAMMABLE LOGIC APPLICATIONS
6
Patent #:
Issue Dt:
10/20/1998
Application #:
08599959
Filing Dt:
02/14/1996
Title:
CIRCUITS FOR ESD PROTECTION OF METAL-TO-METAL ANTIFUSES DURING PROCESSING
7
Patent #:
Issue Dt:
04/28/1998
Application #:
08603597
Filing Dt:
02/16/1996
Title:
FLEXIBLE, HIGH-PERFORMANCE STATIC RAM ARCHITECTURE FOR FIELD-PROGRAMMABLE GATE ARRAYS
8
Patent #:
Issue Dt:
08/12/1997
Application #:
08607375
Filing Dt:
02/27/1996
Title:
METHOD FOR FORMING AN ESD PROTECTION DEVICE FOR ANTIFUSES WITH TOP POLYSILICON ELECTRODE
9
Patent #:
Issue Dt:
07/27/1999
Application #:
08612216
Filing Dt:
03/07/1996
Title:
OS RECTIFYING SCHOTTKY AND OHMIC JUNCTION AND W/WC/TIC OHMIC CONTACTS ON SIC
10
Patent #:
Issue Dt:
09/02/1997
Application #:
08644335
Filing Dt:
05/09/1996
Title:
METHOD FOR FABRICATING AN ELECTRICALLY PROGRAMMABLE ANTIFUSE
11
Patent #:
Issue Dt:
09/08/1998
Application #:
08657971
Filing Dt:
06/04/1996
Title:
FABRICATION PROCESS FOR RAISED TUNGSTEN PLUG ANTIFUSE
12
Patent #:
Issue Dt:
06/02/1998
Application #:
08703683
Filing Dt:
08/27/1996
Title:
FLOATING GATE FPGA CELL WITH SELECT DEVICE ON DRAIN
13
Patent #:
Issue Dt:
06/30/1998
Application #:
08704853
Filing Dt:
08/27/1996
Title:
FLOATING GATE FGPA CELL WITH SEPARATED SELECT DEVICE
14
Patent #:
Issue Dt:
04/13/1999
Application #:
08708074
Filing Dt:
08/09/1996
Title:
FLOATING GATE FPGA CELL WITH COUNTER-DOPED SELECT DEVICE
15
Patent #:
Issue Dt:
09/08/1998
Application #:
08722355
Filing Dt:
09/27/1996
Title:
CIRCUITS FOR TESTING THE FUNCTION CIRCUIT MODULES IN AN INTEGRATED CIRCUIT
16
Patent #:
Issue Dt:
06/15/1999
Application #:
08725333
Filing Dt:
10/01/1996
Title:
PROCESS ESD PROTECTION DEVICES FOR USE WITH ANTIFUSES
17
Patent #:
Issue Dt:
07/20/1999
Application #:
08739372
Filing Dt:
10/29/1996
Title:
HIGH SPEED DIGITAL BUS TERMINATION Y
18
Patent #:
Issue Dt:
05/26/1998
Application #:
08742094
Filing Dt:
10/31/1996
Title:
SEMI-SOFT SWITCHING AND PRECEDENT SWITCHING IN SYNCHRONOUS POWER SUPPLY CONTROLLERS
19
Patent #:
Issue Dt:
08/04/1998
Application #:
08745096
Filing Dt:
11/07/1996
Title:
ANTIFUSE WITH IMPROVED ANTIFUSE MATERIAL
20
Patent #:
Issue Dt:
06/09/1998
Application #:
08754116
Filing Dt:
11/21/1996
Title:
GENERAL PURPOSE, NON-VOLATILE REPROGRAMMABLE SWITCH
21
Patent #:
Issue Dt:
07/06/1999
Application #:
08772241
Filing Dt:
12/23/1996
Title:
RAISED TUNGSTEN PLUG ANTIFUSE AND FABRICATION PROCESSES
22
Patent #:
Issue Dt:
01/12/1999
Application #:
08772813
Filing Dt:
12/24/1996
Title:
PROGRAMMING CIRCUIT FOR ANTIFUSES USING BIPOLAR AND SCR DEVICES
23
Patent #:
Issue Dt:
09/28/1999
Application #:
08792482
Filing Dt:
01/31/1997
Title:
FIELD PROGRAMMABLE GATE ARRAY WITH MASK PROGRAMMED INPUT AND OUTPUT BUFFERS
24
Patent #:
Issue Dt:
10/13/1998
Application #:
08792902
Filing Dt:
01/31/1997
Title:
FIELD PROGRAMMABLE GATE ARRAY WITH MASK PROGRAMMED ANALOG FUNCTION CIRCUITS
25
Patent #:
Issue Dt:
08/10/1999
Application #:
08794096
Filing Dt:
02/03/1997
Title:
LOGIC FUNCTION MODULE FOR FIELD PROGRAMMABLE ARRAY
26
Patent #:
Issue Dt:
06/01/1999
Application #:
08797202
Filing Dt:
02/11/1997
Title:
ANTIFUSE PROGRAMMED PROM CELL
27
Patent #:
Issue Dt:
11/21/2000
Application #:
08807455
Filing Dt:
02/28/1997
Title:
ENHANCED FIELD PROGRAMMABLE GATE ARRAY
28
Patent #:
Issue Dt:
11/17/1998
Application #:
08829374
Filing Dt:
03/31/1997
Title:
NONVOLATILE REPROGRAMMABLE INTERCONNECT CELL WITH FN TUNNELING IN SENSE
29
Patent #:
Issue Dt:
10/05/1999
Application #:
08895723
Filing Dt:
07/17/1997
Title:
IMPROVED METAL-TO-METAL VIA-TYPE ANTIFUSE
30
Patent #:
Issue Dt:
11/09/1999
Application #:
08899445
Filing Dt:
07/23/1997
Title:
MULTIPLE CHANNEL CLASS D AUDIO AMPLIFIER
31
Patent #:
Issue Dt:
08/24/1999
Application #:
08928269
Filing Dt:
09/12/1997
Title:
ELECTRONIC CIRCUIT BREAKER
32
Patent #:
Issue Dt:
02/06/2001
Application #:
08946928
Filing Dt:
10/08/1997
Title:
FIELD PROGRAMMABLE DIGITAL SIGNAL PROCESSING ARRAY INTEGRATED CIRCUIT
33
Patent #:
Issue Dt:
06/08/1999
Application #:
08984001
Filing Dt:
12/03/1997
Title:
ELECTRONIC STACK MODULE
34
Patent #:
Issue Dt:
12/14/1999
Application #:
08999970
Filing Dt:
09/01/1995
Title:
METHOD OF MAKING A METAL TO METAL ANTIFUSE
35
Patent #:
Issue Dt:
08/13/2002
Application #:
09034769
Filing Dt:
03/02/1998
Title:
ARCHITECTURE AND INTERCONNECT SCHEME FOR PROGRAMMABLE LOGIC CIRCUITS
36
Patent #:
Issue Dt:
04/11/2000
Application #:
09039891
Filing Dt:
03/16/1998
Title:
EMBEDDED STATIC RANDOM ACCESS MEMORY FOR FIELD PROGRAMMABLE GATE ARRAY
37
Patent #:
Issue Dt:
03/14/2000
Application #:
09039923
Filing Dt:
03/16/1998
Title:
SRAM BUS ARCHITECTURE AND INTERCONNECT TO AN FPGA
38
Patent #:
Issue Dt:
05/22/2001
Application #:
09039924
Filing Dt:
03/16/1998
Title:
CYCLIC REDUNDANCY CHECKING OF A FIELD PROGRAMMABLE GATE ARRAY HAVING AN SRAM MEMORY ARCHITECTURE
39
Patent #:
Issue Dt:
07/27/1999
Application #:
09042125
Filing Dt:
03/13/1998
Title:
DIRECT DRIVE BACKLIGHT SYSTEM
40
Patent #:
Issue Dt:
07/13/1999
Application #:
09042144
Filing Dt:
03/13/1998
Title:
APPARATUS AND METHOD FOR STARTING A FLUORESCENT LAMP
41
Patent #:
Issue Dt:
09/26/2000
Application #:
09062298
Filing Dt:
04/17/1998
Title:
RAISED TUNGSTEN PLUG ANTIFUSE AND FABRICATION PROCESSES
42
Patent #:
Issue Dt:
06/17/2008
Application #:
09069054
Filing Dt:
04/28/1998
Title:
DEDICATED INTERFACE ARCHITECTURE FOR A HYBRID INTEGRATED CIRCUIT
43
Patent #:
Issue Dt:
07/09/2002
Application #:
09089298
Filing Dt:
06/01/1998
Title:
FLOOR PLAN FOR SCALABLE MULTIPLE LEVEL TAB ORIENTED INTERCONNECT ARCHITECTURE
44
Patent #:
Issue Dt:
08/07/2001
Application #:
09096142
Filing Dt:
06/11/1998
Title:
METHOD OF REDUCING TEST TIME FOR NVM CELL-BASED FPGA
45
Patent #:
Issue Dt:
02/13/2001
Application #:
09114631
Filing Dt:
07/13/1998
Title:
FAIL SAFE BIAS SYSTEM FOR A TRI-STATE BUS
46
Patent #:
Issue Dt:
06/26/2001
Application #:
09138838
Filing Dt:
08/24/1998
Title:
NONVOLATILE REPROGRAMMABLE INTERCONNECT CELL WITH FN TUNNELING DEVICE FOR PROGRAMMING AND ERASE
47
Patent #:
Issue Dt:
04/15/2003
Application #:
09153828
Filing Dt:
09/15/1998
Title:
HIGH DENSITY ANTIFUSE BASED PARTITIONED FPGA ARCHITECTURE
48
Patent #:
Issue Dt:
10/24/2000
Application #:
09205678
Filing Dt:
12/04/1998
Title:
NONVOLATILE REPROGRAMMABLE INTERCONNECT CELL WITH PROGRAMMABLE BURIED SOURCE/DRAIN IN SENSE TRANSISTOR
49
Patent #:
Issue Dt:
06/06/2000
Application #:
09205876
Filing Dt:
12/04/1998
Title:
NONVOLATILE REPROGRAMMABLE INTERCONNECT CELL WITH PROGRAMMABLE BURIED BITLINE
50
Patent #:
Issue Dt:
06/05/2001
Application #:
09224929
Filing Dt:
12/31/1998
Title:
PROGRAMMABLE MULTI-STANDARD I/O ARCHITECTURE FOR FPGAS
51
Patent #:
Issue Dt:
01/30/2001
Application #:
09235584
Filing Dt:
01/22/1999
Title:
SUPER BRIGHT LOW REFLECTION LIQUID CRYSTAL DISPLAY
52
Patent #:
Issue Dt:
12/11/2001
Application #:
09243998
Filing Dt:
02/04/1999
Title:
METHOD AND APPARATUS FOR UNIVERSAL PROGRAM CONTROLLED BUS ARCHITECTURE
53
Patent #:
Issue Dt:
11/21/2000
Application #:
09251897
Filing Dt:
02/19/1999
Title:
METHOD OF MAKING OS AND W/WC/TIC OHMIC AND RECTIFYING CONTACTS ON SIC
54
Patent #:
Issue Dt:
10/09/2001
Application #:
09281008
Filing Dt:
03/30/1999
Title:
A FINAL DESIGN METHOD OF A PROGRAMMABLE LOGIC DEVICE THAT IS BASED ON AN INITIAL DESIGN THAT CONSISTS OF PARTIAL UNDERLYING PHYSICAL TEMPLATE
55
Patent #:
Issue Dt:
09/03/2002
Application #:
09285563
Filing Dt:
04/02/1999
Title:
METHOD AND APPARATUS FOR STORING A VALIDATION NUMBER IN A FIELD-PROGRAMMABLE GATE ARRAY
56
Patent #:
Issue Dt:
03/26/2002
Application #:
09286128
Filing Dt:
04/02/1999
Title:
FIELD PROGRAMMABLE GATE ARRAY WITH MASK PROGRAMMED INPUT AND OUTPUT BUFFERS
57
Patent #:
Issue Dt:
09/26/2000
Application #:
09311975
Filing Dt:
05/14/1999
Title:
METHOD FOR ERASING NONVOLATILE MEMORY CELLS IN A FIELD PROGRAMMABLE GATE ARRAY
58
Patent #:
Issue Dt:
04/03/2001
Application #:
09318198
Filing Dt:
05/25/1999
Title:
INTEGRATED CIRCUIT THAT INCLUDES A FIELD-PROGRAMMABLE GATE ARRAY AND A HARD GATE ARRAY HAVING THE SAME UNDERLYING STRUCTURE
59
Patent #:
Issue Dt:
03/06/2001
Application #:
09328536
Filing Dt:
06/09/1999
Title:
DIMMABLE BACKLIGHT SYSTEM
60
Patent #:
Issue Dt:
03/13/2001
Application #:
09360807
Filing Dt:
07/24/1999
Title:
FERROMAGNETIC TUNING RING FOR YIG OSCILLATORS
61
Patent #:
Issue Dt:
10/09/2001
Application #:
09377304
Filing Dt:
08/18/1999
Title:
SCALABLE MULTIPLE LEVEL TAB ORIENTED INTERCONNECT ARCHITECTURE
62
Patent #:
Issue Dt:
03/12/2002
Application #:
09388178
Filing Dt:
09/01/1999
Title:
MULTIPLE CHANNEL CLASS D AUDIO AMPLIFIER
63
Patent #:
Issue Dt:
07/13/2004
Application #:
09388269
Filing Dt:
09/01/1999
Title:
MULTIPLE CHANNEL CLASS D AUDIO AMPLIFIER
64
Patent #:
Issue Dt:
05/08/2001
Application #:
09388412
Filing Dt:
09/01/1999
Title:
MULTIPLE CHANNEL CLASS D AUDIO AMPLIFIER
65
Patent #:
Issue Dt:
11/20/2001
Application #:
09467736
Filing Dt:
12/20/1999
Title:
ARCHITECTURE AND INTERCONNECT FOR PROGRAMMABLE LOGIC CIRCUITS
66
Patent #:
Issue Dt:
10/08/2002
Application #:
09482149
Filing Dt:
01/12/2000
Publication #:
Pub Dt:
08/01/2002
Title:
ARCHITECTURE AND INTERCONNECT SCHEME FOR PROGRAMMABLE LOGIC CIRCUITS
67
Patent #:
Issue Dt:
12/17/2002
Application #:
09512133
Filing Dt:
02/23/2000
Title:
SRAM BUS ARCHITECTURE AND INTERCONNECT TO AN FPGA
68
Patent #:
Issue Dt:
08/06/2002
Application #:
09513248
Filing Dt:
02/23/2000
Title:
EMBEDDED STATIC RANDOM ACCESS MEMORY FOR FIELD PROGRAMMABLE GATE ARRAY
69
Patent #:
Issue Dt:
08/05/2003
Application #:
09513249
Filing Dt:
02/23/2000
Title:
ANTIFUSE STRUCTURE SUITABLE FOR VLSI APPLICATION
70
Patent #:
Issue Dt:
09/04/2001
Application #:
09518973
Filing Dt:
03/06/2000
Title:
Block connector splitting in logic block of a field programmable gate array
71
Patent #:
Issue Dt:
07/31/2001
Application #:
09518974
Filing Dt:
03/06/2000
Title:
Block symmetrization in a field programmable gate array
72
Patent #:
Issue Dt:
05/20/2003
Application #:
09519081
Filing Dt:
03/06/2000
Title:
BLOCK LEVEL ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY
73
Patent #:
Issue Dt:
04/06/2004
Application #:
09519311
Filing Dt:
03/06/2000
Title:
DELAY LOCKED LOOP FOR AN FPGA ARCHITECTURE
74
Patent #:
Issue Dt:
10/21/2003
Application #:
09519312
Filing Dt:
03/06/2000
Title:
TURN ARCHITECTURE FOR ROUTING RESOURCES IN A FIELD PROGRAMMABLE GATE ARRAY
75
Patent #:
Issue Dt:
09/18/2001
Application #:
09544769
Filing Dt:
04/07/2000
Title:
Method and apparatus for programmable current sharing
76
Patent #:
Issue Dt:
09/04/2001
Application #:
09544770
Filing Dt:
04/07/2000
Title:
Method and apparatus for an efficient multiphase switching regulator
77
Patent #:
Issue Dt:
10/23/2001
Application #:
09599625
Filing Dt:
06/22/2000
Title:
Method and apparatus for controlling minimum brightness of a fluorescent lamp
78
Patent #:
Issue Dt:
05/14/2002
Application #:
09628978
Filing Dt:
07/27/2000
Title:
W/WC/TAC OHMIC AND RECTIFYING CONTACTS ON SIC
79
Patent #:
Issue Dt:
06/15/2004
Application #:
09654237
Filing Dt:
09/02/2000
Title:
FIELD PROGRAMMABLE GATE ARRAY AND MICROCONTROLLER SYSTEM-ON-A-CHIP
80
Patent #:
Issue Dt:
11/05/2002
Application #:
09654240
Filing Dt:
09/02/2000
Title:
TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
81
Patent #:
Issue Dt:
08/20/2002
Application #:
09669035
Filing Dt:
09/25/2000
Title:
RAISED TUNGSTEN PLUG ANTIFUSE AND FABRICATION PROCESSES
82
Patent #:
Issue Dt:
01/07/2003
Application #:
09688454
Filing Dt:
10/16/2000
Title:
INTEGRATED CIRCUIT THAT INCLUDES A FIELD-PROGRAMMABLE GATE ARRAY AND A HARD GATE ARRAY HAVING THE SAME UNDERLYING STRUCTURE
83
Patent #:
Issue Dt:
03/12/2002
Application #:
09708268
Filing Dt:
11/07/2000
Title:
SWITCHING REGULATOR WITH TRANSIENT RECOVERY CIRCUIT
84
Patent #:
Issue Dt:
05/06/2003
Application #:
09734784
Filing Dt:
12/11/2000
Publication #:
Pub Dt:
11/01/2001
Title:
CYCLIC REDUNDANCY CHECKING OF A FIELD PROGRAMMABLE GATE ARRAY HAVING AN SRAM MEMORY ARCHITECTURE
85
Patent #:
Issue Dt:
12/10/2002
Application #:
09736897
Filing Dt:
12/12/2000
Publication #:
Pub Dt:
06/13/2002
Title:
ANTIFUSE WITH IMPROVED RADIATION SEDR
86
Patent #:
Issue Dt:
03/04/2003
Application #:
09736898
Filing Dt:
12/13/2000
Publication #:
Pub Dt:
06/13/2002
Title:
ANTIFUSE PROGRAMMING METHOD
87
Patent #:
Issue Dt:
10/26/2004
Application #:
09737642
Filing Dt:
12/14/2000
Publication #:
Pub Dt:
08/01/2002
Title:
METAL-TO-METAL ANTIFUSE STRUCTURE AND FABRICATION METHOD
88
Patent #:
Issue Dt:
11/27/2001
Application #:
09737643
Filing Dt:
12/14/2000
Title:
Radiation tolerant flash FPGA
89
Patent #:
Issue Dt:
05/21/2002
Application #:
09738508
Filing Dt:
12/18/2000
Publication #:
Pub Dt:
06/07/2001
Title:
Programmable multi-standard I/O architecture for FPGAs
90
Patent #:
Issue Dt:
08/05/2003
Application #:
09741374
Filing Dt:
12/18/2000
Title:
ANTIFUSE INCORPORATING TANTALUM NITRIDE BARRIER LAYER
91
Patent #:
Issue Dt:
05/27/2003
Application #:
09742550
Filing Dt:
12/20/2000
Publication #:
Pub Dt:
06/20/2002
Title:
ANTIFUSE MEMORY CELL AND ANTIFUSE MEMORY CELL ARRAY
92
Patent #:
Issue Dt:
03/12/2002
Application #:
09748648
Filing Dt:
12/21/2000
Title:
Flash based control for field programmable gate array
93
Patent #:
Issue Dt:
01/13/2004
Application #:
09748745
Filing Dt:
12/21/2000
Title:
PROGRAMMING CIRCUITRY FOR CONFIGURABLE FPGA I/O
94
Patent #:
Issue Dt:
01/11/2005
Application #:
09808676
Filing Dt:
03/15/2001
Publication #:
Pub Dt:
09/19/2002
Title:
LOW LEAKAGE INPUT PROTECTION DEVICE AND SCHEME FOR ELECTROSTATIC DISCHARGE
95
Patent #:
Issue Dt:
09/14/2004
Application #:
09819084
Filing Dt:
09/25/2000
Title:
ENHANCED FIELD PROGRAMMABLE GATE ARRAY
96
Patent #:
Issue Dt:
09/07/2004
Application #:
09847908
Filing Dt:
05/03/2001
Publication #:
Pub Dt:
11/07/2002
Title:
APPARATUS AND METHODS FOR GENERATING AN ELECTRONIC SIGNAL RESPONSIVE TO SELECTED LIGHT
97
Patent #:
Issue Dt:
10/21/2003
Application #:
09880528
Filing Dt:
06/12/2001
Publication #:
Pub Dt:
01/24/2002
Title:
MULTIPLE OUTPUT CHARGE PUMP
98
Patent #:
Issue Dt:
04/29/2003
Application #:
09880545
Filing Dt:
06/12/2001
Publication #:
Pub Dt:
01/24/2002
Title:
CHARGE PUMP REGULATOR WITH LOAD CURRENT CONTROL
99
Patent #:
Issue Dt:
02/18/2003
Application #:
09880626
Filing Dt:
06/12/2001
Publication #:
Pub Dt:
03/07/2002
Title:
SINGLE MODE BUCK/BOOST REGULATING CHARGE PUMP
100
Patent #:
Issue Dt:
01/20/2004
Application #:
09880629
Filing Dt:
06/12/2001
Publication #:
Pub Dt:
10/11/2001
Title:
BLOCK SYMMETRIZATION IN A FIELD PROGRAMMABLE GATE ARRAY
Assignors
1
Exec Dt:
01/11/2011
2
Exec Dt:
01/11/2011
3
Exec Dt:
01/11/2011
Assignee
1
1585 BROADWAY
NEW YORK, NEW YORK 10036
Correspondence name and address
TRACY GARDNER
4 TIMES SQUARE
SKADDEN ARPS SLATE MEAGHER & FLOM LLP
NEW YORK, NY 10036

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