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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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11233290
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Filing Dt:
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09/21/2005
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Publication #:
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Pub Dt:
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04/13/2006
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Title:
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ARCHITECTURE AND INTERCONNECT SCHEME FOR PROGRAMMABLE LOGIC CIRCUITS
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Patent #:
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Issue Dt:
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07/17/2007
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Application #:
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11233396
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Filing Dt:
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09/21/2005
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Publication #:
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Pub Dt:
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03/22/2007
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Title:
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NON-VOLATILE PROGRAMMABLE MEMORY CELL FOR PROGRAMMABLE LOGIC ARRAY
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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11238311
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Filing Dt:
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09/29/2005
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Publication #:
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Pub Dt:
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02/09/2006
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Title:
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SYSTEMS FOR AUTO-INTERLEAVING SYNCHRONIZATION IN A MULTIPHASE SWITCHING POWER CONVERTER
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Patent #:
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Issue Dt:
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01/22/2008
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Application #:
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11240115
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Filing Dt:
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09/30/2005
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Publication #:
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Pub Dt:
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02/02/2006
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Title:
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SQUARE WAVE DRIVE SYSTEM
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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11251074
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Filing Dt:
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10/13/2005
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Title:
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VOLATILE DATA STORAGE IN A NON-VOLATILE MEMORY CELL ARRAY
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Patent #:
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Issue Dt:
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04/22/2008
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Application #:
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11279046
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Filing Dt:
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04/07/2006
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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INTEGRATED CIRCUIT INCLUDING PROGRAMMABLE LOGIC AND EXTERNAL-DEVICE CHIP-ENABLE OVERRIDE CONTROL
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Patent #:
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Issue Dt:
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03/11/2008
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Application #:
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11281253
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Filing Dt:
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11/16/2005
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Publication #:
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Pub Dt:
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05/17/2007
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Title:
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BIT LINE PRE-SETTLEMENT CIRCUIT AND METHOD FOR FLASH MEMORY SENSING SCHEME
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Patent #:
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Issue Dt:
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03/03/2009
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Application #:
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11286144
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Filing Dt:
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11/23/2005
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Publication #:
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Pub Dt:
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06/08/2006
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Title:
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JUNCTION TERMINATION STRUCTURES FOR WIDE-BANDGAP POWER DEVICES
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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11295889
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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04/27/2006
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Title:
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DEDICATED INPUT/OUTPUT FIRST IN/FIRST OUT MODULE FOR A FIELD PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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06/05/2007
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Application #:
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11297088
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Filing Dt:
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12/07/2005
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Publication #:
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Pub Dt:
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04/20/2006
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Title:
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SYNCHRONOUS FIRST-IN/FIRST-OUT BLOCK MEMORY FOR A FIELD PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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08/05/2008
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Application #:
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11299248
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Filing Dt:
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12/09/2005
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Publication #:
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Pub Dt:
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05/04/2006
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Title:
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ARCHITECTURE AND INTERCONNECT SCHEME FOR PROGRAMMABLE LOGIC CIRCUITS
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Patent #:
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Issue Dt:
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09/11/2007
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Application #:
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11303863
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Filing Dt:
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12/16/2005
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Publication #:
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Pub Dt:
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06/21/2007
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Title:
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ADDRESS TRANSITION DETECTOR FOR FAST FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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05/26/2009
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Application #:
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11303865
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Filing Dt:
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12/16/2005
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Title:
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NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
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Patent #:
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Issue Dt:
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04/22/2008
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Application #:
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11319751
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Filing Dt:
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12/27/2005
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Title:
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PROGRAMMING METHOD FOR NON-VOLATILE MEMORY AND NON-VOLATILE MEMORY-BASED PROGRAMMABLE LOGIC DEVICE
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Patent #:
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Issue Dt:
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10/24/2006
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Application #:
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11323417
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Filing Dt:
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12/30/2005
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Publication #:
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Pub Dt:
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06/15/2006
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Title:
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DEGLITCHING CIRCUITS FOR A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY BASED PROGRAMMABLE ARCHITECTURE
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Patent #:
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Issue Dt:
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10/24/2006
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Application #:
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11326543
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Filing Dt:
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01/04/2006
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Publication #:
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Pub Dt:
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06/01/2006
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Title:
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FLOOR PLAN FOR SCALABLE MULTIPLE LEVEL TAB ORIENTED INTERCONNECT ARCHITECTURE
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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11335396
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Filing Dt:
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01/18/2006
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Publication #:
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Pub Dt:
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06/01/2006
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Title:
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TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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11345549
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Filing Dt:
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01/31/2006
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Publication #:
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Pub Dt:
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06/08/2006
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Title:
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PROGRAMMABLE SYSTEM ON A CHIP FOR POWER-SUPPLY VOLTAGE AND CURRENT MONITORING AND CONTROL
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Patent #:
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Issue Dt:
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02/06/2007
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Application #:
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11367081
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Filing Dt:
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03/02/2006
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Publication #:
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Pub Dt:
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07/06/2006
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Title:
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APPARATUS AND METHOD OF ERROR DETECTION AND CORRECTION IN A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY FIELD-PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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05/20/2008
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Application #:
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11387636
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Filing Dt:
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03/22/2006
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Title:
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CLOCK TREE NETWORK IN A FIELD PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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11410413
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Filing Dt:
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04/24/2006
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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INTER-TILE BUFFER SYSTEM FOR A FIELD PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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11410415
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Filing Dt:
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04/24/2006
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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SRAM BUS ARCHITECTURE AND INTERCONNECT TO AN FPGA
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Patent #:
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Issue Dt:
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01/20/2009
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Application #:
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11414128
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Filing Dt:
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04/28/2006
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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FRONT SIDE ILLUMINATED PHOTODIODE WITH BACKSIDE BUMP
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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11426158
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Filing Dt:
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06/23/2006
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Publication #:
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Pub Dt:
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11/02/2006
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Title:
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THREE INPUT FIELD PROGRAMMABLE GATE ARRAY LOGIC CIRCUIT CONFIGURABLE AS A THREE INPUT LOOK UP TABLE, A D-LATCH OR A D FLIP-FLOP
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Patent #:
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Issue Dt:
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06/10/2008
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Application #:
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11426541
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Filing Dt:
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06/26/2006
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Title:
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REPEATABLE BLOCK PRODUCING A NON-UNIFORM ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY HAVING SEGMENTED TRACKS
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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11427456
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Filing Dt:
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06/29/2006
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Title:
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SRAM CELL CONTROLLED BY FLASH MEMORY CELL
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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11427717
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Filing Dt:
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06/29/2006
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Title:
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CLOCK-GENERATOR ARCHITECTURE FOR A PROGRAMMABLE-LOGIC-BASED SYSTEM ON A CHIP
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Patent #:
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Issue Dt:
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04/03/2007
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Application #:
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11428944
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Filing Dt:
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07/06/2006
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Title:
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DEDICATED INPUT/OUTPUT FIRST IN/FIRST OUT MODULE FOR A FIELD PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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11432425
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Filing Dt:
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05/10/2006
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Publication #:
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Pub Dt:
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09/14/2006
| | | | |
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Title:
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ARCHITECTURE AND INTERCONNECT SCHEME FOR PROGRAMMABLE LOGIC CIRCUITS
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Patent #:
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Issue Dt:
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06/10/2008
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Application #:
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11460055
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Filing Dt:
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07/26/2006
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Publication #:
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Pub Dt:
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11/16/2006
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Title:
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NON-VOLATILE MEMORY ARCHITECTURE FOR PROGRAMMABLE-LOGIC-BASED SYSTEM ON A CHIP
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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11463846
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Filing Dt:
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08/10/2006
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Title:
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FLASH-BASED FPGA WITH SECURE REPROGRAMMING
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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11465530
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Filing Dt:
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08/18/2006
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Title:
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MIXED-SIGNAL SYSTEM-ON-A-CHIP ANALOG SIGNAL DIRECT INTERCONNECTION THROUGH PROGRAMMABLE LOGIC CONTROL
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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11465899
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Filing Dt:
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08/21/2006
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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NON-VOLATILE MEMORY CONFIGURATION SCHEME FOR VOLATILE-MEMORY-BASED PROGRAMMABLE CIRCUITS IN AN FPGA
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Patent #:
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Issue Dt:
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10/21/2008
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Application #:
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11467475
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Filing Dt:
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08/25/2006
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Publication #:
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Pub Dt:
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12/21/2006
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Title:
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VOLTAGE-AND TEMPERATURE-COMPENSATED RC OSCILLATOR CIRCUIT
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Patent #:
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Issue Dt:
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07/22/2008
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Application #:
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11484243
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Filing Dt:
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07/10/2006
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Title:
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DEGLITCHING CIRCUITS FOR A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY BASED PROGRAMMABLE ARCHITECTURE
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Patent #:
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Issue Dt:
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03/06/2007
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Application #:
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11484244
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Filing Dt:
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07/10/2006
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Title:
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FLASH/DYNAMIC RANDOM ACCESS MEMORY FIELD PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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01/12/2010
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Application #:
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11526324
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Filing Dt:
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09/25/2006
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Publication #:
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Pub Dt:
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01/18/2007
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Title:
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FULL-BRIDGE AND HALF-BRIDGE COMPATIBLE DRIVER TIMING SCHEDULE FOR DIRECT DRIVE BACKLIGHT SYSTEM
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Patent #:
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Issue Dt:
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10/07/2008
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Application #:
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11531375
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Filing Dt:
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09/13/2006
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Title:
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MULTI-LEVEL ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY HAVING TRANSMITTERS AND RECEIVERS
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Patent #:
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Issue Dt:
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09/11/2007
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Application #:
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11532757
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Filing Dt:
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09/18/2006
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Title:
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PARALLEL PROGRAMMABLE ANTIFUSE FIELD PROGRAMMABLE GATE ARRAY DEVICE (FPGA) AND A METHOD FOR PROGRAMMING AND TESTING AN ANTIFUSE FPGA
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Patent #:
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Issue Dt:
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08/25/2009
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Application #:
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11536581
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Filing Dt:
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09/28/2006
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Publication #:
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Pub Dt:
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04/05/2007
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Title:
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SELF ALIGNED PROCESS FOR BJT FABRICATION
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Patent #:
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Issue Dt:
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06/22/2010
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Application #:
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11542090
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Filing Dt:
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09/29/2006
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Publication #:
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Pub Dt:
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04/03/2008
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Title:
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PLASTIC SURFACE MOUNT LARGE AREA POWER DEVICE
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Patent #:
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Issue Dt:
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05/27/2008
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Application #:
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11548199
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Filing Dt:
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10/10/2006
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Title:
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FIELD-PROGRAMMABLE GATE ARRAY LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER UTILIZING TWO COMPLIMENTARY OUTPUT BUFFERS
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Patent #:
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Issue Dt:
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06/02/2009
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Application #:
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11550336
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Filing Dt:
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10/17/2006
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Title:
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CYCLIC REDUNDANCY CHECKING OF A FIELD PROGRAMMABLE GATE ARRAY HAVING AN SRAM MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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09/09/2008
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Application #:
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11551857
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Filing Dt:
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10/23/2006
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Publication #:
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Pub Dt:
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03/01/2007
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Title:
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SYSTEM-ON-A-CHIP INTEGRATED CIRCUIT INCLUDING DUAL-FUNCTION ANALOG AND DIGITAL INPUTS
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Patent #:
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Issue Dt:
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01/22/2008
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Application #:
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11551973
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Filing Dt:
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10/23/2006
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Publication #:
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Pub Dt:
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03/01/2007
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Title:
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NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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11552482
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Filing Dt:
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10/24/2006
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Title:
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METHOD AND APPARATUS OF MEMORY CLEARING WITH MONITORING RAM MEMORY CELLS IN A FIELD PROGRAMMABLE GATED ARRAY
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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11561695
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Filing Dt:
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11/20/2006
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Title:
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DELAY LOCKED LOOP FOR AN FPGA ARCHITECTURE
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Patent #:
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Issue Dt:
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03/11/2008
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Application #:
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11561705
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Filing Dt:
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11/20/2006
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Publication #:
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Pub Dt:
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04/05/2007
| | | | |
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Title:
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TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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11562049
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Filing Dt:
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11/21/2006
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Title:
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INTEGRATED MULTI-FUNCTION ANALOG CIRCUIT INCLUDING VOLTAGE, CURRENT, AND TEMPERATURE MONITOR AND GATE-DRIVER CIRCUIT BLOCKS
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Patent #:
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Issue Dt:
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09/22/2009
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Application #:
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11567625
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Filing Dt:
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12/06/2006
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Publication #:
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Pub Dt:
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04/26/2007
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Title:
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METHOD FOR ERASING PROGRAMMABLE INTERCONNECT CELLS FOR FIELD PROGRAMMABLE GATE ARRAYS USING REVERSE BIAS VOLTAGE
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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11600002
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Filing Dt:
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11/15/2006
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Title:
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VOLTAGE REGULATION LOOP WITH VARIABLE GAIN CONTROL FOR INVERTER CIRCUIT
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Patent #:
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Issue Dt:
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07/15/2008
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Application #:
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11612771
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Filing Dt:
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12/19/2006
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Title:
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MIXED SIGNAL SYSTEM-ON-A-CHIP INTEGRATED SIMULTANEOUS MULTIPLE SAMPLE/HOLD CIRCUITS AND EMBEDDED ANALOG COMPARATORS
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Patent #:
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Issue Dt:
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03/02/2010
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Application #:
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11614897
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Filing Dt:
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12/21/2006
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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DESIGN AND FABRICATION OF RUGGED FRED, POWER MOSFET OR IGBT
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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11617559
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Filing Dt:
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12/28/2006
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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APPARATUS AND METHOD OF ERROR DETECTION AND CORRECTION IN A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY FIELD-PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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03/03/2009
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Application #:
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11619547
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Filing Dt:
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01/03/2007
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Publication #:
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Pub Dt:
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05/10/2007
| | | | |
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Title:
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FLASH/DYNAMIC RANDOM ACCESS MEMORY FIELD PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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11676188
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Filing Dt:
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02/16/2007
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Publication #:
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Pub Dt:
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06/21/2007
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Title:
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RADIATION TOLERANT SRAM BIT
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Patent #:
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Issue Dt:
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06/10/2008
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Application #:
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11677432
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Filing Dt:
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02/21/2007
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Title:
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DEDICATED INPUT/OUTPUT FIRST IN/FIRST OUT MODULE FOR A FIELD PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
|
01/27/2009
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Application #:
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11677441
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Filing Dt:
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02/21/2007
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Title:
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LOW-CAPACITANCE INPUT/OUTPUT AND ELECTROSTATIC DISCHARGE CIRCUIT FOR PROTECTING AN INTEGRATED CIRCUIT FROM ELECTROSTATIC DISCHARGE
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Patent #:
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Issue Dt:
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06/24/2008
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Application #:
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11679046
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Filing Dt:
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02/26/2007
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Publication #:
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Pub Dt:
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06/14/2007
| | | | |
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Title:
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OPTICAL AND TEMPERATURE FEEDBACKS TO CONTROL DISPLAY BRIGHTNESS
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Patent #:
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Issue Dt:
|
04/28/2009
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Application #:
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11682242
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Filing Dt:
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03/05/2007
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Publication #:
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Pub Dt:
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06/28/2007
| | | | |
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Title:
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SPLIT PHASE INVERTERS FOR CCFL BACKLIGHT SYSTEM
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Patent #:
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Issue Dt:
|
10/28/2008
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Application #:
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11688688
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Filing Dt:
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03/20/2007
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Publication #:
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Pub Dt:
|
08/09/2007
| | | | |
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Title:
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SRAM BUS ARCHITECTURE AND INTERCONNECT TO AN FPGA
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Patent #:
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|
Issue Dt:
|
07/01/2008
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Application #:
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11692717
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Filing Dt:
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03/28/2007
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Publication #:
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Pub Dt:
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07/19/2007
| | | | |
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Title:
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FIELD PROGRAMMABLE GATE ARRAY LONG LINE ROUTING NETWORK
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|
|
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Patent #:
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Issue Dt:
|
05/18/2010
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Application #:
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11695992
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Filing Dt:
|
04/03/2007
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Publication #:
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Pub Dt:
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08/09/2007
| | | | |
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Title:
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INTEGRATED CIRCUIT WAFER WITH INTER-DIE METAL INTERCONNECT LINES TRAVERSING SCRIBE-LINE BOUNDARIES
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|
|
|
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Patent #:
|
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Issue Dt:
|
11/15/2011
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Application #:
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11728624
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Filing Dt:
|
03/27/2007
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Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
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Title:
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INTEGRATED CIRCUIT WITH FLEXIBLE PLANER LEADS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/01/2008
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Application #:
|
11737030
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Filing Dt:
|
04/18/2007
|
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Publication #:
|
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Pub Dt:
|
08/09/2007
| | | | |
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Title:
|
SYNCHRONOUS FIRST-IN/FIRST-OUT BLOCK MEMORY FOR A FIELD PROGRAMMABLE GATE ARRAY
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|
|
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Patent #:
|
|
Issue Dt:
|
11/11/2008
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Application #:
|
11737172
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Filing Dt:
|
04/19/2007
|
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Publication #:
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Pub Dt:
|
10/25/2007
| | | | |
|
Title:
|
CHARGE LIMITED HIGH VOLTAGE SWITCH CIRCUITS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/05/2008
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Application #:
|
11740458
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Filing Dt:
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04/26/2007
|
|
Publication #:
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|
Pub Dt:
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08/16/2007
| | | | |
|
Title:
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SRAM CELL CONTROLLED BY FLASH MEMORY CELL
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|
|
|
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Patent #:
|
|
Issue Dt:
|
12/15/2009
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Application #:
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11745134
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Filing Dt:
|
05/07/2007
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|
Publication #:
|
|
Pub Dt:
|
09/06/2007
| | | | |
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Title:
|
SYSTEM FOR SIGNAL ROUTING LINE AGGREGATION IN A FIELD-PROGRAMMABLE GATE ARRAY
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/10/2008
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Application #:
|
11748865
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Filing Dt:
|
05/15/2007
|
|
Publication #:
|
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Pub Dt:
|
09/13/2007
| | | | |
|
Title:
|
BLOCK SYMMETRIZATION IN A FIELD PROGRAMMABLE GATE ARRAY
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/11/2008
|
Application #:
|
11750650
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Filing Dt:
|
05/18/2007
|
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
|
Title:
|
NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2009
|
Application #:
|
11762451
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Filing Dt:
|
06/13/2007
|
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
|
Title:
|
NON-VOLATILE PROGRAMMABLE MEMORY CELL FOR PROGRAMMABLE LOGIC ARRAY
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11764295
|
Filing Dt:
|
06/18/2007
|
|
Publication #:
|
|
Pub Dt:
|
12/18/2008
| | | | |
|
Title:
|
DETERMINATION OF WIRE METRIC FOR DELIVERY OF POWER TO A POWERED DEVICE OVER COMMUNICATION CABLING
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11769169
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Filing Dt:
|
06/27/2007
|
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
|
Title:
|
CIRCUIT AND METHOD FOR SUPPLYING PROGRAMMING POTENTIAL AT VOLTAGES LARGER THAN BVDSS OF PROGRAMMING TRANSISTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2015
|
Application #:
|
11773611
|
Filing Dt:
|
07/05/2007
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2008
| | | | |
|
Title:
|
STRIKING AND OPEN LAMP REGULATION FOR CCFL CONTROLLER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
11774676
|
Filing Dt:
|
07/09/2007
|
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
|
Title:
|
PROGRAMMABLE SYSTEM ON A CHIP FOR TEMPERATURE MONITORING AND CONTROL
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11789455
|
Filing Dt:
|
04/23/2007
|
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
|
Title:
|
Spray coating apparatus and fixtures
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2011
|
Application #:
|
11829335
|
Filing Dt:
|
07/27/2007
|
|
Publication #:
|
|
Pub Dt:
|
01/29/2009
| | | | |
|
Title:
|
ERROR-DETECTING AND CORRECTING FPGA ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
11830685
|
Filing Dt:
|
07/30/2007
|
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
|
Title:
|
PRIMARY SIDE CURRENT BALANCING SCHEME FOR MULTIPLE CCF LAMP OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/2009
|
Application #:
|
11833833
|
Filing Dt:
|
08/03/2007
|
|
Publication #:
|
|
Pub Dt:
|
02/14/2008
| | | | |
|
Title:
|
ADDRESS TRANSITION DETECTOR FOR FAST FLASH MEMORY DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2009
|
Application #:
|
11837700
|
Filing Dt:
|
08/13/2007
|
|
Publication #:
|
|
Pub Dt:
|
01/31/2008
| | | | |
|
Title:
|
PARALLEL PROGRAMMABLE ANTIFUSE FIELD PROGRAMMABLE GATE ARRAY DEVICE (FPGA) AND A METHOD FOR PROGRAMMING AND TESTING AN ANTIFUSE FPGA
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2009
|
Application #:
|
11843575
|
Filing Dt:
|
08/22/2007
|
|
Publication #:
|
|
Pub Dt:
|
12/13/2007
| | | | |
|
Title:
|
ARCHITECTURE FOR ROUTING RESOURCES IN A FIELD PROGRAMMABLE GATE ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11844569
|
Filing Dt:
|
08/24/2007
|
|
Title:
|
APPARATUS AND METHOD FOR INITIALIZING AN INTEGRATED CIRCUIT DEVICE AND ACTIVATING A FUNCTION OF THE DEVICE ONCE AN INPUT POWER SUPPLY HAS REACHED A THRESHOLD VOLTAGE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2008
|
Application #:
|
11844581
|
Filing Dt:
|
08/24/2007
|
|
Title:
|
APPARATUS AND METHOD FOR INITIALIZING AN INTEGRATED CIRCUIT DEVICE AND ACTIVATING A FUNCTION OF THE DEVICE ONCE AN INPUT POWER SUPPLY HAS REACHED A THRESHOLD VOLTAGE
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|
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|
Patent #:
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|
Issue Dt:
|
08/05/2008
|
Application #:
|
11855974
|
Filing Dt:
|
09/14/2007
|
|
Title:
|
FPGA ARCHITECTURE HAVING TWO-LEVEL CLUSTER INPUT INTERCONNECT SCHEME WITHOUT BANDWIDTH LIMITATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11858322
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Filing Dt:
|
09/20/2007
|
|
Publication #:
|
|
Pub Dt:
|
01/10/2008
| | | | |
|
Title:
|
NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
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|
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|
Patent #:
|
|
Issue Dt:
|
02/24/2009
|
Application #:
|
11858330
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Filing Dt:
|
09/20/2007
|
|
Publication #:
|
|
Pub Dt:
|
01/10/2008
| | | | |
|
Title:
|
NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
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|
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|
Patent #:
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Issue Dt:
|
05/26/2009
|
Application #:
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11858341
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Filing Dt:
|
09/20/2007
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Publication #:
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Pub Dt:
|
01/10/2008
| | | | |
|
Title:
|
NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
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Patent #:
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|
Issue Dt:
|
06/30/2009
|
Application #:
|
11859073
|
Filing Dt:
|
09/21/2007
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|
Title:
|
NONVOLATILE MEMORY INTEGRATED CIRCUIT HAVING ASSEMBLY BUFFER AND BIT-LINE DRIVER, AND METHOD OF OPERATION THEREOF
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|
|
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|
Patent #:
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|
Issue Dt:
|
10/28/2008
|
Application #:
|
11859497
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Filing Dt:
|
09/21/2007
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|
Publication #:
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|
Pub Dt:
|
01/10/2008
| | | | |
|
Title:
|
APPARATUS AND METHOD OF ERROR DETECTION AND CORRECTION IN A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY FIELD-PROGRAMMABLE GATE ARRAY
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Patent #:
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|
Issue Dt:
|
08/11/2009
|
Application #:
|
11861504
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Filing Dt:
|
09/26/2007
|
|
Title:
|
VOLATILE DATA STORAGE IN A NON-VOLATILE MEMORY CELL ARRAY
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Patent #:
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|
Issue Dt:
|
01/11/2011
|
Application #:
|
11866262
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Filing Dt:
|
10/02/2007
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Publication #:
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|
Pub Dt:
|
04/10/2008
| | | | |
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Title:
|
METHOD AND APPARATUS TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS IN A PWM-BASED VOLTAGE REGULATOR
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|
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|
Patent #:
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Issue Dt:
|
09/30/2008
|
Application #:
|
11868694
|
Filing Dt:
|
10/08/2007
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|
Publication #:
|
|
Pub Dt:
|
01/31/2008
| | | | |
|
Title:
|
NON-VOLATILE MEMORY CELLS IN A FIELD PROGRAMMABLE GATE ARRAY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2009
|
Application #:
|
11871741
|
Filing Dt:
|
10/12/2007
|
|
Publication #:
|
|
Pub Dt:
|
02/07/2008
| | | | |
|
Title:
|
CLOCK-GENERATOR ARCHITECTURE FOR A PROGRAMMABLE-LOGIC-BASED SYSTEM ON A CHIP
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2009
|
Application #:
|
11927237
|
Filing Dt:
|
10/29/2007
|
|
Title:
|
NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
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|
|
|
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Patent #:
|
|
Issue Dt:
|
01/06/2009
|
Application #:
|
11927265
|
Filing Dt:
|
10/29/2007
|
|
Title:
|
NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
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|
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|
|
Patent #:
|
|
Issue Dt:
|
08/11/2009
|
Application #:
|
11927282
|
Filing Dt:
|
10/29/2007
|
|
Title:
|
NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2009
|
Application #:
|
11928428
|
Filing Dt:
|
10/30/2007
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE ADAPTED TO ENTER A LOW-POWER MODE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2011
|
Application #:
|
11928445
|
Filing Dt:
|
10/30/2007
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE ADAPTED TO ENTER A LOW-POWER MODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
11929287
|
Filing Dt:
|
10/30/2007
|
|
Title:
|
NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11931772
|
Filing Dt:
|
10/31/2007
|
|
Publication #:
|
|
Pub Dt:
|
02/28/2008
| | | | |
|
Title:
|
PROGRAMMABLE SYSTEM ON A CHIP
|
|
