Patent Assignment Details
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| Reel/Frame: | 026160/0456 | |
| Pages: | 3 |
| | Recorded: | 04/21/2011 | | |
| Attorney Dkt #: | P36108 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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04/09/2013
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Application #:
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12982083
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Filing Dt:
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12/30/2010
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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METHOD TO REDUCE CONTACT RESISTANCE OF N-CHANNEL TRANSISTORS BY USING A III-V SEMICONDUCTOR INTERLAYER IN SOURCE AND DRAIN
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Assignee
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| 2200 MISSION COLLEGE BLVD. |
| SANTA CLARA, CALIFORNIA 95052 |
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Correspondence name and address
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INTEL CORPORATION
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C/O CPA GLOBAL
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PO BOX 52050
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MINNEAPOLIS, MN 55402
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