skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:026329/0516   Pages: 11
Recorded: 05/24/2011
Attorney Dkt #:088245-VARIOUS
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 43
1
Patent #:
Issue Dt:
07/22/1997
Application #:
08562125
Filing Dt:
11/22/1995
Title:
METHOD AND APPARATUS FOR PREVENTING CRACKS IN SEMICONDUCTOR DIE
2
Patent #:
Issue Dt:
06/09/1998
Application #:
08620812
Filing Dt:
03/29/1996
Title:
MULTIPLE FREQUENCY MEMORY ARRAY CLOCKING SCHEME FOR READING AND WRITING MULTIPLE WIDTH DIGITAL WORDS
3
Patent #:
Issue Dt:
01/21/2003
Application #:
08621487
Filing Dt:
03/25/1996
Title:
CLOCKING SCHEME FOR INDEPENDENTLY READING AND WRITING MULTIPLE WIDTH WORDS FROM A MEMORY ARRAY
4
Patent #:
Issue Dt:
10/13/1998
Application #:
08622531
Filing Dt:
03/25/1996
Title:
APPARATUS FOR FAST PHASE-LOCKED LOOP (PLL) FREQUENCY SLEWING DURING POWER ON
5
Patent #:
Issue Dt:
02/23/1999
Application #:
08664061
Filing Dt:
06/13/1996
Title:
HIGH VOLTAGE-TOLERANT LOW VOLTAGE INPUT/OUTPUT CELL
6
Patent #:
Issue Dt:
09/15/1998
Application #:
08672757
Filing Dt:
06/28/1996
Title:
BLOCK ARCHITECTURE SEMICONDUCTOR MEMORY ARRAY UTILIZING NON-INVERTING PASS GATE LOCAL WORDLINE DRIVER
7
Patent #:
Issue Dt:
02/16/1999
Application #:
08696008
Filing Dt:
08/12/1996
Title:
INPUT BUFFER WITH STABILIZED TRIP POINTS
8
Patent #:
Issue Dt:
09/08/1998
Application #:
08697316
Filing Dt:
08/22/1996
Title:
SLOW TRANSITION TIME PHASE FREQUENCY DETECTOR AND METHOD
9
Patent #:
Issue Dt:
01/12/1999
Application #:
08705807
Filing Dt:
08/30/1996
Title:
DUAL ROM MICROPROGRAMMABLE MICROCONTROLLER AND UNIVERSAL SERIAL BUS MICROCONTROLLER DEVELOPMENT SYSTEM
10
Patent #:
Issue Dt:
10/27/1998
Application #:
08723077
Filing Dt:
09/30/1996
Title:
ULTRA LOW POWER PUMPED N-CHANNEL OUTPUT BUFFER WITH SELF-BOOTSTRAP
11
Patent #:
Issue Dt:
08/11/1998
Application #:
08743005
Filing Dt:
11/01/1996
Title:
RC DELAY WITH FEEDBACK
12
Patent #:
Issue Dt:
01/12/1999
Application #:
08756270
Filing Dt:
11/25/1996
Title:
SRAM WRITE PARTITIONING
13
Patent #:
Issue Dt:
10/27/1998
Application #:
08772497
Filing Dt:
12/23/1996
Title:
DECODER CIRCUIT AND METHOD FOR DISABLING A NUMBER OF COLUMNS OR ROWS IN A MEMORY
14
Patent #:
Issue Dt:
11/24/1998
Application #:
08800622
Filing Dt:
02/14/1997
Title:
INTERDIGITATED MEMORY ARRAY
15
Patent #:
Issue Dt:
12/08/1998
Application #:
08810494
Filing Dt:
02/28/1997
Title:
METHOD AND APPARATUS FOR PREVENTING CRACKS IN SEMICONDUCTOR DIE
16
Patent #:
Issue Dt:
02/16/1999
Application #:
08881485
Filing Dt:
06/24/1997
Title:
CIRCUIT AND ARCHITECTURE FOR PROVIDING AN INTERFACE BETWEEN COMPONENTS
17
Patent #:
Issue Dt:
12/29/1998
Application #:
08902574
Filing Dt:
07/29/1997
Title:
REDUCED-PARTICLE METHOD OF PROCESSING A SEMICONDUCTOR AND/OR INTEGRATED CIRCUIT
18
Patent #:
Issue Dt:
08/22/2000
Application #:
08957547
Filing Dt:
10/24/1997
Title:
CIRCUIT AND APPARATUS FOR VERIFYING A CHAMBER SEAL, AND METHOD OF DEPOSITING A MATERIAL ONTO A SUBSTRATE USING THE SAME
19
Patent #:
Issue Dt:
03/30/1999
Application #:
08958500
Filing Dt:
10/27/1997
Title:
SYMMETRICAL NAND GATES
20
Patent #:
Issue Dt:
10/13/1998
Application #:
08960585
Filing Dt:
10/29/1997
Title:
METHOD AND APPARATUS FOR ELIMINATING ELECTROMAGNETIC INTERFERECE AND NOISE CAUSED BY ALL UNNECESSARY SWITCHING/ TOGGLING OF BUS SIGNALS
21
Patent #:
Issue Dt:
02/02/1999
Application #:
08974436
Filing Dt:
11/20/1997
Title:
STARTUP CIRCUIT FOR BAND-GAP REFERENCE CIRCUIT
22
Patent #:
Issue Dt:
04/18/2000
Application #:
08984722
Filing Dt:
12/04/1997
Title:
APPARATUS AND METHOD FOR CONTROLLING EXPERIMENTAL INVENTORY
23
Patent #:
Issue Dt:
03/30/1999
Application #:
09021681
Filing Dt:
02/10/1998
Title:
WRITE CONTROL METHOD FOR MEMORY DEVICES
24
Patent #:
Issue Dt:
09/19/2000
Application #:
09204215
Filing Dt:
12/02/1998
Title:
CONTACT MONITOR, METHOD OF FORMING SAME AND METHOD OF ANALYZING CONTACT-, VIA-AND/OR TRENCH-FORMING PROCESSES IN AN INTEGRATED CIRCUIT
25
Patent #:
Issue Dt:
09/24/2002
Application #:
09474865
Filing Dt:
12/30/1999
Title:
METHOD FOR FORMING VOID-FREE METALLIZATION IN AN INTEGRATED CIRCUIT
26
Patent #:
Issue Dt:
04/09/2002
Application #:
09481038
Filing Dt:
01/11/2000
Title:
Dual rom microprogrammable microcontroller and universal serial bus microcontroller development system
27
Patent #:
Issue Dt:
07/16/2002
Application #:
09506673
Filing Dt:
05/09/2000
Title:
Method for controlling experimental inventory
28
Patent #:
Issue Dt:
02/11/2003
Application #:
09561293
Filing Dt:
04/28/2000
Title:
CONTACT MONITOR, METHOD OF FORMING SAME AND METHOD OF ANALIZING CONTACT-, VIA-AND/OR TRENCH-FORMING PROCESSES IN AN INTEGRATED CIRCUIT
29
Patent #:
Issue Dt:
11/12/2002
Application #:
09563233
Filing Dt:
05/02/2000
Title:
METHOD AND SYSTEM FOR PROACTIVELY DEBUGGING FITTING PROBLEMS IN PROGRAMMABLE LOGIC DEVICES
30
Patent #:
Issue Dt:
11/05/2002
Application #:
09604992
Filing Dt:
06/28/2000
Title:
PROGRAMMABLE NUMBER OF METAL LINES AND EFFECTIVE METAL WIDTH ALONG CRITICAL PATHS IN A PROGRAMMABLE LOGIC DEVICE
31
Patent #:
Issue Dt:
12/31/2002
Application #:
09607697
Filing Dt:
06/30/2000
Title:
LOADABLE DIVIDE-BY-N WITH FIXED DUTY CYCLE
32
Patent #:
Issue Dt:
12/17/2002
Application #:
09611714
Filing Dt:
07/06/2000
Title:
CIRCUIT AND APPARATUS FOR VERIFYING A CHAMBER SEAL, AND METHOD OF DEPOSITING A MATERIAL ONTO A SUBSTRATE USING THE SAME
33
Patent #:
Issue Dt:
12/03/2002
Application #:
09684159
Filing Dt:
10/04/2000
Title:
METHOD AND SYSTEM FOR IDENTIFYING CONFIGURATION CIRCUIT ADDRESSES IN A SCHEMATIC HIERARCHY
34
Patent #:
Issue Dt:
08/27/2002
Application #:
09736907
Filing Dt:
12/14/2000
Title:
LOW NOISE SWITCHING REGULATOR
35
Patent #:
Issue Dt:
03/04/2003
Application #:
09742758
Filing Dt:
12/20/2000
Title:
LOW NOISE, REDUCED SWING DIFFERENTIAL OUTPUT BUFFER DESIGN
36
Patent #:
Issue Dt:
10/10/2006
Application #:
09751429
Filing Dt:
12/29/2000
Publication #:
Pub Dt:
07/04/2002
Title:
MASK REVISION ID CODE CIRCUIT
37
Patent #:
Issue Dt:
03/18/2003
Application #:
09753695
Filing Dt:
01/03/2001
Title:
METHOD OF CONTROLLING A MEMORY CELL REFRESH CIRCUIT USING CHARGE SHARING
38
Patent #:
Issue Dt:
12/31/2002
Application #:
09764693
Filing Dt:
01/18/2001
Title:
LOW VOLTAGE SUPPLY HIGHER EFFICIENCY CROSS-COUPLED HIGH VOLTAGE CHARGE PUMPS
39
Patent #:
Issue Dt:
10/15/2002
Application #:
09792021
Filing Dt:
02/23/2001
Title:
LASER FORMATION OF A METAL CAPACITOR AND INTEGRATED COAXIAL LINE
40
Patent #:
Issue Dt:
01/07/2003
Application #:
09813572
Filing Dt:
03/21/2001
Title:
BUFFER IMPROVEMENT
41
Patent #:
Issue Dt:
04/01/2003
Application #:
09836994
Filing Dt:
04/17/2001
Publication #:
Pub Dt:
10/17/2002
Title:
ACTIVE TERMINATION CIRCUIT WITH AN ENABLE/DISABLE
42
Patent #:
Issue Dt:
01/14/2003
Application #:
09850806
Filing Dt:
05/08/2001
Title:
TESTER ACCURACY USING MULTIPLE PASSES
43
Patent #:
Issue Dt:
12/17/2002
Application #:
09852185
Filing Dt:
05/09/2001
Title:
CONTROL SIGNAL GENERATOR FOR AN OVERVOLTAGE-TOLERANT INTERFACE CIRCUIT ON A LOW VOLTAGE PROCESS
Assignor
1
Exec Dt:
04/06/2011
Assignee
1
160 GREENTREE DRIVE
SUITE 101
DOVER, DELAWARE 19904
Correspondence name and address
PAUL S. HUNTER
FOLEY & LARDNER LLP
150 E. GILMAN STREET
MADISON, WI 53701-1497

Search Results as of: 05/08/2024 05:42 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT