Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 026365/0731 | |
| Pages: | 4 |
| | Recorded: | 05/31/2011 | | |
| Conveyance: | CONFIRMATORY ASSIGNMENT |
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Total properties:
6
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Patent #:
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Issue Dt:
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09/12/1995
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Application #:
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08142648
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Filing Dt:
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10/25/1993
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Title:
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VLIW PROCESSOR WHICH USES PATH INFORMATION GENERATED BY A BRANCH CONTROL UNIT TO INHIBIT OPERATIONS WHICH ARE NOT ON A CORRECT PATH
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08358127
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Filing Dt:
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12/16/1994
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Title:
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EXCEPTION RECOVERY IN A DATA PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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08366958
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Filing Dt:
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12/30/1994
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Title:
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MULTIPORT REGISTER FILE TO ACCOMMODATE DATA OF DIFFERING LENGTHS
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Patent #:
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Issue Dt:
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11/25/1997
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Application #:
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08425697
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Filing Dt:
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04/19/1995
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Title:
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VLIW PROCESSING DEVICE INCLUDING IMPROVED MEMORY FOR AVOIDING COLLISIONS WITHOUT AN EXCESSIVE NUMBER OF PORTS
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Patent #:
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Issue Dt:
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10/10/2000
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Application #:
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08648333
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Filing Dt:
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05/15/1996
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Title:
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PLANAR CACHE LAYOUT AND INSTRUCTION STREAM THEREFOR
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Patent #:
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Issue Dt:
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01/19/1999
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Application #:
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08649732
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Filing Dt:
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05/15/1996
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Title:
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COMPILER GENERATING SWIZZLED INSTRUCTIONS USABLE IN A SIMPLIFIED CACHE LAYOUT
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Assignee
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| HIGH TECH CAMPUS 60 |
| EINDHOVEN, NETHERLANDS 5656 AG |
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Correspondence name and address
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DAVID L. SCHAEFFER
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1109 MCKAY DRIVE, M/S 41 SJ
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NXP SEMICONDUCTORS, IP&L
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SAN JOSE, CA 95131
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