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Total properties:
20
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Patent #:
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Issue Dt:
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06/06/2000
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Application #:
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09036951
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Filing Dt:
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03/09/1998
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Title:
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CYCLE TIME REDUCTION USING AN EARLY PRECHARGE
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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09045633
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Filing Dt:
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03/19/1998
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Title:
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FORMATION OF NOVEL DRAM CELL CAPACITORS BY INTEGRATION OF CAPACITORS WITH ISOLATION TRENCH SIDEWALLS
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09078746
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Filing Dt:
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05/14/1998
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Title:
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CIRCUIT AND METHOD FOR ENCODING AND RETRIEVING A BIT OF INFORMATION
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Patent #:
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Issue Dt:
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01/23/2001
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Application #:
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09083373
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Filing Dt:
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05/21/1998
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Title:
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DRAM CELL HAVING A VERTICAL TRANSISTOR AND A CAPACITOR FORMED ON THE SIDEWALLS OF A TRENCH ISOLATION
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09112687
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Filing Dt:
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07/09/1998
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Title:
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FORMATION OF A NOVEL DRAM CELL
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09407412
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Filing Dt:
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09/29/1999
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Title:
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PROGRAMMABLE MOVING INVERSION SEQUENCER FOR MEMORY BIST ADDRESS GENERATION
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09426919
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Filing Dt:
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10/26/1999
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Title:
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DIFFERENTIAL SENSE AMPLIFIER WITH VOLTAGE MARGIN ENHANCEMENT
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09549265
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Filing Dt:
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04/14/2000
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Title:
|
FORMATION OF NOVEL DRAM CELL CAPACITORS BY INTEGRATION OF CAPACITORS WITH ISOLATIION TRENCH SIDEWALLS
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09619858
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Filing Dt:
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07/20/2000
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Title:
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MEMORY CONTROLLER ARBITRATING RAS CAS AND BANK PRECHARGE SIGNALS
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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09665749
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Filing Dt:
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09/20/2000
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Title:
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MEMORY TESTING FOR BUILT-IN SELF-REPAIR SYSTEM
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09724608
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Filing Dt:
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11/28/2000
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Title:
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Dram cell having a vertical transistor and a capacitor formed on the sidewalls of a trench isolation
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09750214
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Filing Dt:
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12/27/2000
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Title:
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Asynchronous memory self time scheme
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09859268
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Filing Dt:
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05/16/2001
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Title:
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SELF-TIME SCHEME TO REDUCE CYCLE TIME FOR MEMORIES
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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10209483
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Filing Dt:
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07/31/2002
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Title:
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SELF-TIME SCHEME TO REDUCE CYCLE TIME FOR MEMORIES
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Patent #:
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Issue Dt:
|
07/08/2003
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Application #:
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10217769
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Filing Dt:
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08/13/2002
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Publication #:
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Pub Dt:
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12/19/2002
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Title:
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MEMORY CONTROLLER WITH ARBITRATION AMONG SEVERAL STROBE REQUESTS
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10247594
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Filing Dt:
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09/19/2002
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Publication #:
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Pub Dt:
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03/25/2004
| | | | |
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Title:
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MEMORY I/O BUFFER USING SHARED READ/WRITE CIRCUITRY
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10414516
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Filing Dt:
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04/15/2003
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Publication #:
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Pub Dt:
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10/21/2004
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Title:
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ROW REDUNDANCY MEMORY REPAIR SCHEME WITH SHIFT OT ELIMINATE TIMING PENALTY
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10444891
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Filing Dt:
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05/23/2003
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Publication #:
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Pub Dt:
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11/25/2004
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Title:
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MEMORY IMPLEMENTATION FOR HANDLING INTEGRATED CIRCUIT FABRICATION FAULTS
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|
|
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Patent #:
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Issue Dt:
|
10/03/2006
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Application #:
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10614642
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Filing Dt:
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07/07/2003
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Publication #:
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Pub Dt:
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08/26/2004
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Title:
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METHOD AND SYSTEM OF TESTING DATA RETENTION OF MEMORY
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|
|
|
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Patent #:
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|
Issue Dt:
|
10/10/2006
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Application #:
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11021361
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Filing Dt:
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12/22/2004
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Publication #:
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Pub Dt:
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06/22/2006
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Title:
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WIDE-RANGE PROGRAMMABLE DELAY LINE
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