Total properties:
34
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Patent #:
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Issue Dt:
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02/28/1995
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Application #:
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07991769
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Filing Dt:
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12/17/1992
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Title:
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CIRCUIT FOR ELIMINATING OFF-CHIP TO ON-CHIP CLOCK SKEW
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Patent #:
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Issue Dt:
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09/17/1996
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Application #:
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08042306
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Filing Dt:
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04/02/1993
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Title:
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CACHING FIFO AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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06/13/1995
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Application #:
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08142839
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Filing Dt:
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10/25/1993
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Title:
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METHOD OF MAKING AN INTEGRATED CIRCUIT WITH VARIABLE PAD PITCH
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Patent #:
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Issue Dt:
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07/09/1996
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Application #:
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08298989
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Filing Dt:
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08/31/1994
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Title:
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DIGITAL COMPUTER SYSTEM HAVING AN IMPROVED DIRECT-MAPPED CACHE CONTROLLER (WITH FLAG MODIFICATION) FOR A CPU WITH ADDRES PIPELINING AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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12/17/1996
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Application #:
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08315465
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Filing Dt:
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09/30/1994
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Title:
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ARITHMETIC LOGIC UNIT WITH ZERO SUM PREDICTION
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Patent #:
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Issue Dt:
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01/28/1997
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Application #:
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08328939
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Filing Dt:
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10/25/1994
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Title:
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ELECTRICALLY AND THERMALLY ENHANCED PACKAGE USING A SEPARATE SILICON SUBSTRATE
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Patent #:
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Issue Dt:
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03/11/1997
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Application #:
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08415183
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Filing Dt:
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04/03/1995
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Title:
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INTEGRATED CIRCUIT WITH VARIABLE PAD PITCH
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Patent #:
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Issue Dt:
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02/18/1997
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Application #:
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08653010
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Filing Dt:
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05/24/1996
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Title:
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ARITHMETIC LOGIC UNIT WITH ZERO-RESULT PREDICTION
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08705356
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Filing Dt:
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08/29/1996
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Title:
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SYSTEM AND METHOD FOR ALTERING THE CLOCK FREQUENCY TO A LOGIC CONTROLLER CONTROLLING A LOGIC DEVICE RUNNING AT A FIXED FREQUENCY SLOWER THAN A COMPUTER SYSTEM RUNNING THE LOGIC DEVICE
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Patent #:
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Issue Dt:
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08/17/1999
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Application #:
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08719149
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Filing Dt:
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09/24/1996
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Title:
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SCAN FLIP-FLOP AND METHODS FOR CONTROLLING THE ENTRY OF DATA THEREIN
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Patent #:
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Issue Dt:
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04/21/1998
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Application #:
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08773099
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Filing Dt:
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12/24/1996
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Title:
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INTEGRATED CIRCUIT WITH VARIABLE PAD PITCH
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Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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09116768
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Filing Dt:
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07/16/1998
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Title:
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SEMICONDUCTOR DEVICE ASSEMBLIES AND CIRCUITS
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Patent #:
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Issue Dt:
|
03/06/2001
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Application #:
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09121957
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Filing Dt:
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07/24/1998
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Title:
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CMOS WAVESHAPING BUFFER
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Patent #:
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Issue Dt:
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10/30/2001
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Application #:
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09215019
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Filing Dt:
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12/17/1998
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Title:
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HIGH PERFORMANCE CHIP/PACKAGE INDUCTOR INTEGRATION
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|
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Patent #:
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Issue Dt:
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11/27/2001
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Application #:
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09275370
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Filing Dt:
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03/24/1999
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Title:
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DATA CARRIER HAVING AN IMPLANTED MODULE BASED ON A METAL LEAD FRAME
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|
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Patent #:
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|
Issue Dt:
|
03/16/2004
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Application #:
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09351053
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Filing Dt:
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07/12/1999
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Publication #:
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|
Pub Dt:
|
12/13/2001
| | | | |
Title:
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BUFFERING SYSTEM BUS FOR EXTERNAL-MEMORY ACCESS
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Patent #:
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|
Issue Dt:
|
03/01/2005
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Application #:
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09505985
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Filing Dt:
|
02/16/2000
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Title:
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SYSTEM AND METHOD FOR ELIMINATING WRITE BACK TO REGISTER USING DEAD FIELD INDICATOR
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|
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Patent #:
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|
Issue Dt:
|
02/01/2005
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Application #:
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09505986
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Filing Dt:
|
02/16/2000
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Title:
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SYSTEM AND METHOD FOR ELIMINATING WRITE BACKS WITH BUFFER FOR EXCEPTION PROCESSING
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Patent #:
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|
Issue Dt:
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07/23/2002
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Application #:
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09671889
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Filing Dt:
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09/28/2000
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Title:
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SEMICONDUCTOR DEVICES CONFIGURED TO TOLERATE CONNETION MISALIGNMENT
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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09891449
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Filing Dt:
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06/26/2001
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Publication #:
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Pub Dt:
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01/31/2002
| | | | |
Title:
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INTEGRATED CIRCUIT WITH FLASH MEMORY INCLUDING DEDICATED FLASH BUS AND FLASH BRIDGE
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Patent #:
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|
Issue Dt:
|
03/30/2004
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Application #:
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09947430
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Filing Dt:
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09/05/2001
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Publication #:
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|
Pub Dt:
|
02/14/2002
| | | | |
Title:
|
HIGH PERFORMANCE CHIP/PACKAGE INDUCTOR INTEGRATION
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|
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Patent #:
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|
Issue Dt:
|
05/04/2004
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Application #:
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10294011
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Filing Dt:
|
11/12/2002
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Publication #:
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|
Pub Dt:
|
05/13/2004
| | | | |
Title:
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FOLDED-FLEX BONDWIRE-LESS MULTICHIP POWER PACKAGE
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|
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Patent #:
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|
Issue Dt:
|
01/12/2010
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Application #:
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10381216
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Filing Dt:
|
09/02/2003
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Publication #:
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Pub Dt:
|
09/29/2005
| | | | |
Title:
|
PROCESSOR BUS ARRANGEMENT
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|
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Patent #:
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|
Issue Dt:
|
07/17/2007
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Application #:
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10478269
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Filing Dt:
|
11/17/2003
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Publication #:
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Pub Dt:
|
09/09/2004
| | | | |
Title:
|
LEAD-FRAME CONFIGURATION FOR CHIPS
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|
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Patent #:
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|
Issue Dt:
|
11/18/2008
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Application #:
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10525804
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Filing Dt:
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02/25/2005
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Publication #:
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Pub Dt:
|
10/20/2005
| | | | |
Title:
|
VERSION-PROGRAMMABLE CIRCUIT MODULE
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Patent #:
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|
Issue Dt:
|
04/22/2008
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Application #:
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10534165
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Filing Dt:
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05/05/2005
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Publication #:
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|
Pub Dt:
|
07/20/2006
| | | | |
Title:
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DATA CARRIER WITH A MODULE WITH A REINFORCEMENT STRIP
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|
|
Patent #:
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|
Issue Dt:
|
08/25/2009
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Application #:
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10538281
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Filing Dt:
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06/10/2005
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Publication #:
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|
Pub Dt:
|
01/26/2006
| | | | |
Title:
|
WIREBONDING METHOD AND APPARATUS
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|
|
Patent #:
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|
Issue Dt:
|
07/24/2007
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Application #:
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10538378
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Filing Dt:
|
06/13/2005
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Publication #:
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|
Pub Dt:
|
05/25/2006
| | | | |
Title:
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COARSE DELAY TUNER CIRCUITS WITH EDGE SUPPRESSORS IN DELAY LOCKED LOOPS
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|
|
Patent #:
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|
Issue Dt:
|
03/18/2008
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Application #:
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10566552
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Filing Dt:
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01/27/2006
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Publication #:
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|
Pub Dt:
|
08/24/2006
| | | | |
Title:
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INTERGRATED CIRCUIT WITH DYNAMIC COMMUNICATION SERVICE SELECTION
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|
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Patent #:
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|
Issue Dt:
|
11/04/2008
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Application #:
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10576570
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Filing Dt:
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04/19/2006
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Publication #:
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|
Pub Dt:
|
06/28/2007
| | | | |
Title:
|
METHOD AND SYSTEM FOR POWERING AN INTEGRATED CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
04/01/2008
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Application #:
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11165859
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Filing Dt:
|
06/24/2005
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Publication #:
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|
Pub Dt:
|
01/11/2007
| | | | |
Title:
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HIERARCHICAL MEMORY ACCESS VIA PIPELINING WITH DEFERRED ARBITRATION
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|
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Patent #:
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|
Issue Dt:
|
09/29/2009
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Application #:
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11575068
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Filing Dt:
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03/09/2007
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Publication #:
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|
Pub Dt:
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12/25/2008
| | | | |
Title:
|
INTERCONNECTIONS IN SIMD PROCESSOR ARCHITECTURES
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|
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Patent #:
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|
Issue Dt:
|
03/02/2010
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Application #:
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11817019
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Filing Dt:
|
04/22/2008
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Publication #:
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Pub Dt:
|
10/30/2008
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE DEVICE WITH IMPROVED BOND PAD CONNECTIONS, A LEAD-FRAME AND AN ELECTRONIC DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
07/02/2013
|
Application #:
|
12506065
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Filing Dt:
|
07/20/2009
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Publication #:
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Pub Dt:
|
11/12/2009
| | | | |
Title:
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WIREBONDING METHOD AND APPARATUS
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