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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:027126/0176   Pages: 28
Recorded: 10/26/2011
Attorney Dkt #:113.G000
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 233
Page 1 of 3
Pages: 1 2 3
1
Patent #:
7515921
Issue Dt:
04/07/2009
Application #:
10434800
Filing Dt:
05/09/2003
Publication #:
US20040037305
Pub Dt:
02/26/2004
Title:
PEAK REDUCTION FOR SIMULCAST BROADCAST SIGNALS
2
Patent #:
NONE
Issue Dt:
Application #:
12271077
Filing Dt:
11/14/2008
Publication #:
US20100123258
Pub Dt:
05/20/2010
Title:
Low Temperature Board Level Assembly Using Anisotropically Conductive Materials
3
Patent #:
8844023
Issue Dt:
09/23/2014
Application #:
12326165
Filing Dt:
12/02/2008
Publication #:
US20100138915
Pub Dt:
06/03/2010
Title:
PASSWORD PROTECTED BUILT-IN TEST MODE FOR MEMORIES
4
Patent #:
8791418
Issue Dt:
07/29/2014
Application #:
12329740
Filing Dt:
12/08/2008
Publication #:
US20100140488
Pub Dt:
06/10/2010
Title:
Increasing the Spatial Resolution of Dosimetry Sensors
5
Patent #:
9092387
Issue Dt:
07/28/2015
Application #:
12331772
Filing Dt:
12/10/2008
Publication #:
US20100146233
Pub Dt:
06/10/2010
Title:
Non-Volatile Memory Device Capable of Initiating Transactions
6
Patent #:
8321764
Issue Dt:
11/27/2012
Application #:
12333100
Filing Dt:
12/11/2008
Publication #:
US20100153818
Pub Dt:
06/17/2010
Title:
MULTILEVEL ENCODING WITH ERROR CORRECTION
7
Patent #:
7876607
Issue Dt:
01/25/2011
Application #:
12333530
Filing Dt:
12/12/2008
Publication #:
US20100149857
Pub Dt:
06/17/2010
Title:
READING THRESHOLD SWITCHING MEMORY CELLS
8
Patent #:
NONE
Issue Dt:
Application #:
12334517
Filing Dt:
12/14/2008
Publication #:
US20100148359
Pub Dt:
06/17/2010
Title:
Package on Package Assembly using Electrically Conductive Adhesive Material
9
Patent #:
7948821
Issue Dt:
05/24/2011
Application #:
12334523
Filing Dt:
12/15/2008
Publication #:
US20100149888
Pub Dt:
06/17/2010
Title:
REDUCED SIGNAL INTERFACE MEMORY DEVICE, SYSTEM, AND METHOD
10
Patent #:
8064250
Issue Dt:
11/22/2011
Application #:
12335587
Filing Dt:
12/16/2008
Publication #:
US20100149858
Pub Dt:
06/17/2010
Title:
PROVIDING A READY-BUSY SIGNAL FROM A NON-VOLATILE MEMORY DEVICE TO A MEMORY CONTROLLER
11
Patent #:
8645792
Issue Dt:
02/04/2014
Application #:
12336476
Filing Dt:
12/16/2008
Publication #:
US20100153820
Pub Dt:
06/17/2010
Title:
MEMORY WITH GUARD VALUE DEPENDENT ERROR CORRECTION
12
Patent #:
8725928
Issue Dt:
05/13/2014
Application #:
12337573
Filing Dt:
12/17/2008
Title:
METHOD AND APPARATUS FOR CONFIGURING WRITE PERFORMANCE FOR ELECTRICALLY WRITABLE MEMORY DEVICES
13
Patent #:
7974146
Issue Dt:
07/05/2011
Application #:
12339935
Filing Dt:
12/19/2008
Publication #:
US20100157672
Pub Dt:
06/24/2010
Title:
WORDLINE TEMPERATURE COMPENSATION
14
Patent #:
8097506
Issue Dt:
01/17/2012
Application #:
12341002
Filing Dt:
12/22/2008
Publication #:
US20100155804
Pub Dt:
06/24/2010
Title:
SHALLOW TRENCH ISOLATION FOR A MEMORY
15
Patent #:
8450199
Issue Dt:
05/28/2013
Application #:
12341014
Filing Dt:
12/22/2008
Publication #:
US20100155852
Pub Dt:
06/24/2010
Title:
INTEGRATING DIVERSE TRANSISTORS ON THE SAME WAFER
16
Patent #:
7847373
Issue Dt:
12/07/2010
Application #:
12341027
Filing Dt:
12/22/2008
Publication #:
US20100155894
Pub Dt:
06/24/2010
Title:
FABRICATING BIPOLAR JUNCTION SELECT TRANSISTORS FOR SEMICONDUCTOR MEMORIES
17
Patent #:
8211778
Issue Dt:
07/03/2012
Application #:
12342312
Filing Dt:
12/23/2008
Publication #:
US20100155881
Pub Dt:
06/24/2010
Title:
FORMING ISOLATION REGIONS FOR INTEGRATED CIRCUITS
18
Patent #:
7916575
Issue Dt:
03/29/2011
Application #:
12342342
Filing Dt:
12/23/2008
Publication #:
US20100157718
Pub Dt:
06/24/2010
Title:
CONFIGURABLE LATCHING FOR ASYNCHRONOUS MEMORIES
19
Patent #:
9041228
Issue Dt:
05/26/2015
Application #:
12343398
Filing Dt:
12/23/2008
Publication #:
US20100155934
Pub Dt:
06/24/2010
Title:
MOLDING COMPOUND INCLUDING A CARBON NANO-TUBE DISPERSION
20
Patent #:
NONE
Issue Dt:
Application #:
12343485
Filing Dt:
12/24/2008
Publication #:
US20100162038
Pub Dt:
06/24/2010
Title:
Nonvolatile/Volatile Memory Write System and Method
21
Patent #:
7978529
Issue Dt:
07/12/2011
Application #:
12344157
Filing Dt:
12/24/2008
Title:
REWRITABLE SINGLE-BIT-PER-CELL FLASH MEMORY
22
Patent #:
8154006
Issue Dt:
04/10/2012
Application #:
12345102
Filing Dt:
12/29/2008
Publication #:
US20100163835
Pub Dt:
07/01/2010
Title:
CONTROLLING THE CIRCUITRY AND MEMORY ARRAY RELATIVE HEIGHT IN A PHASE CHANGE MEMORY FEOL PROCESS FLOW
23
Patent #:
NONE
Issue Dt:
Application #:
12345306
Filing Dt:
12/29/2008
Publication #:
US20100169708
Pub Dt:
07/01/2010
Title:
METHOD AND APPARATUS TO PROFILE RAM MEMORY OBJECTS FOR DISPLACMENT WITH NONVOLATILE MEMORY
24
Patent #:
7885101
Issue Dt:
02/08/2011
Application #:
12345398
Filing Dt:
12/29/2008
Publication #:
US20100165712
Pub Dt:
07/01/2010
Title:
METHOD FOR LOW-STRESS MULTILEVEL READING OF PHASE CHANGE MEMORY CELLS AND MULTILEVEL PHASE CHANGE MEMORY
25
Patent #:
7869267
Issue Dt:
01/11/2011
Application #:
12345411
Filing Dt:
12/29/2008
Publication #:
US20100165713
Pub Dt:
07/01/2010
Title:
METHOD FOR LOW POWER ACCESSING A PHASE CHANGE MEMORY DEVICE
26
Patent #:
7902882
Issue Dt:
03/08/2011
Application #:
12345436
Filing Dt:
12/29/2008
Publication #:
US20100164558
Pub Dt:
07/01/2010
Title:
AN APPARATUS INCLUDING A FOLLOWER OUTPUT BUFFER HAVING AN OUTPUT IMPEDANCE THAT ADAPTS TO A TRANSMISSION LINE IMPEDANCE
27
Patent #:
7986549
Issue Dt:
07/26/2011
Application #:
12345462
Filing Dt:
12/29/2008
Title:
APPARATUS AND METHOD FOR REFRESHING OR TOGGLING A PHASE-CHANGE MEMORY CELL
28
Patent #:
8023336
Issue Dt:
09/20/2011
Application #:
12345511
Filing Dt:
12/29/2008
Publication #:
US20100165748
Pub Dt:
07/01/2010
Title:
ERASE COMPLETION RECOGNITION
29
Patent #:
7803715
Issue Dt:
09/28/2010
Application #:
12345568
Filing Dt:
12/29/2008
Title:
LITHOGRAPHIC PATTERNING FOR SUB-90NM WITH A MULTI-LAYERED CARBON-BASED HARDMASK
30
Patent #:
NONE
Issue Dt:
Application #:
12345572
Filing Dt:
12/29/2008
Publication #:
US20100164083
Pub Dt:
07/01/2010
Title:
PROTECTIVE THIN FILM COATING IN CHIP PACKAGING
31
Patent #:
8458562
Issue Dt:
06/04/2013
Application #:
12346015
Filing Dt:
12/30/2008
Title:
SECONDARY MEMORY ELEMENT FOR NON-VOLATILE MEMORY
32
Patent #:
8329545
Issue Dt:
12/11/2012
Application #:
12346363
Filing Dt:
12/30/2008
Title:
METHOD OF FABRICATING A CHARGE TRAP NAND FLASH MEMORY DEVICE
33
Patent #:
7940568
Issue Dt:
05/10/2011
Application #:
12346472
Filing Dt:
12/30/2008
Title:
DYNAMIC POLARIZATION FOR REDUCING STRESS INDUCED LEAKAGE CURRENT
34
Patent #:
8250287
Issue Dt:
08/21/2012
Application #:
12347510
Filing Dt:
12/31/2008
Title:
ENHANCED THROUGHPUT FOR SERIAL FLASH MEMORY, INCLUDING STREAMING MODE OPERATIONS
35
Patent #:
8380914
Issue Dt:
02/19/2013
Application #:
12347623
Filing Dt:
12/31/2008
Title:
EXTENDED ADDRESS MODE FOR SERIAL FLASH MEMORY
36
Patent #:
8236691
Issue Dt:
08/07/2012
Application #:
12347721
Filing Dt:
12/31/2008
Publication #:
US20100167532
Pub Dt:
07/01/2010
Title:
METHOD OF HIGH ASPECT RATIO PLUG FILL
37
Patent #:
8344491
Issue Dt:
01/01/2013
Application #:
12347738
Filing Dt:
12/31/2008
Publication #:
US20100164085
Pub Dt:
07/01/2010
Title:
MULTI-DIE BUILDING BLOCK FOR STACKED-DIE PACKAGE
38
Patent #:
7704674
Issue Dt:
04/27/2010
Application #:
12347786
Filing Dt:
12/31/2008
Title:
METHOD FOR PATTERNING A PHOTO-RESIST IN AN IMMERSION LITHOGRAPHY PROCESS
39
Patent #:
NONE
Issue Dt:
Application #:
12347800
Filing Dt:
12/31/2008
Publication #:
US20100167466
Pub Dt:
07/01/2010
Title:
SEMICONDUCTOR PACKAGE SUBSTRATE WITH METAL BUMPS
40
Patent #:
7944764
Issue Dt:
05/17/2011
Application #:
12347900
Filing Dt:
12/31/2008
Title:
WRITING TO NON-VOLATILE MEMORY DURING A VOLATILE MEMORY REFRESH CYCLE
41
Patent #:
9612954
Issue Dt:
04/04/2017
Application #:
12347935
Filing Dt:
12/31/2008
Publication #:
US20100169543
Pub Dt:
07/01/2010
Title:
RECOVERY FOR NON-VOLATILE MEMORY AFTER POWER LOSS
42
Patent #:
8327087
Issue Dt:
12/04/2012
Application #:
12347962
Filing Dt:
12/31/2008
Title:
METHOD AND APPARATUS FOR AN ALWAYS OPEN WRITE-ONLY REGISTER BASED MEMORY MAPPED OVERLAY INTERFACE FOR A NONVOLATILE MEMORY
43
Patent #:
7903478
Issue Dt:
03/08/2011
Application #:
12355466
Filing Dt:
01/16/2009
Title:
HIGH IMPEDANCE REFERENCE VOLTAGE DISTRIBUTION
44
Patent #:
8014208
Issue Dt:
09/06/2011
Application #:
12357940
Filing Dt:
01/22/2009
Title:
ERASE VERIFICATION FOR FLASH MEMORY
45
Patent #:
NONE
Issue Dt:
Application #:
12387655
Filing Dt:
05/05/2009
Publication #:
US20100283533
Pub Dt:
11/11/2010
Title:
Charge pump circuit and method
46
Patent #:
7935627
Issue Dt:
05/03/2011
Application #:
12398298
Filing Dt:
03/05/2009
Title:
FORMING LOW DIELECTRIC CONSTANT DIELECTRIC MATERIALS
47
Patent #:
NONE
Issue Dt:
Application #:
12411450
Filing Dt:
03/26/2009
Publication #:
US20100244181
Pub Dt:
09/30/2010
Title:
Filling Gaps in Integrated Circuit Fabrication
48
Patent #:
9037824
Issue Dt:
05/19/2015
Application #:
12411453
Filing Dt:
03/26/2009
Publication #:
US20100250887
Pub Dt:
09/30/2010
Title:
Password Accessible Microelectronic Memory
49
Patent #:
9058491
Issue Dt:
06/16/2015
Application #:
12411784
Filing Dt:
03/26/2009
Title:
Enabling A Secure Boot From Non-Volatile Memory
50
Patent #:
NONE
Issue Dt:
Application #:
12412829
Filing Dt:
03/27/2009
Publication #:
US20100250828
Pub Dt:
09/30/2010
Title:
CONTROL SIGNAL OUTPUT PIN TO INDICATE MEMORY INTERFACE CONTROL FLOW
51
Patent #:
8516181
Issue Dt:
08/20/2013
Application #:
12415973
Filing Dt:
03/31/2009
Title:
MEMORY DEVICES HAVING DATA FLOW PIPELINING
52
Patent #:
8239629
Issue Dt:
08/07/2012
Application #:
12415991
Filing Dt:
03/31/2009
Publication #:
US20100250849
Pub Dt:
09/30/2010
Title:
HIERARCHICAL MEMORY ARCHITECTURE TO CONNECT MASS STORAGE DEVICES
53
Patent #:
8578095
Issue Dt:
11/05/2013
Application #:
12416000
Filing Dt:
03/31/2009
Publication #:
US20100250819
Pub Dt:
09/30/2010
Title:
HIERARCHICAL MEMORY ARCHITECTURE USING A CONCENTRATOR DEVICE
54
Patent #:
NONE
Issue Dt:
Application #:
12416008
Filing Dt:
03/31/2009
Publication #:
US20100250798
Pub Dt:
09/30/2010
Title:
HIERARCHICAL MEMORY ARCHITECTURE WITH AN INTERFACE TO DIFFERING MEMORY FORMATS
55
Patent #:
8521952
Issue Dt:
08/27/2013
Application #:
12416022
Filing Dt:
03/31/2009
Publication #:
US20100250843
Pub Dt:
09/30/2010
Title:
HIERARCHICAL MEMORY ARCHITECTURE WITH A PHASE-CHANGE MEMORY (PCM) CONTENT ADDRESSABLE MEMORY (CAM)
56
Patent #:
8183085
Issue Dt:
05/22/2012
Application #:
12416094
Filing Dt:
03/31/2009
Publication #:
US20100243306
Pub Dt:
09/30/2010
Title:
HIGH RATE SELECTIVE POLYMER GROWTH ON A SUBSTRATE
57
Patent #:
8078796
Issue Dt:
12/13/2011
Application #:
12423226
Filing Dt:
04/14/2009
Publication #:
US20100262756
Pub Dt:
10/14/2010
Title:
METHOD FOR WRITING TO AND ERASING A NON-VOLATILE MEMORY
58
Patent #:
8321775
Issue Dt:
11/27/2012
Application #:
12427706
Filing Dt:
04/21/2009
Publication #:
US20100269017
Pub Dt:
10/21/2010
Title:
NON-VOLATILE MEMORY WITH EXTENDED ERROR CORRECTION PROTECTION
59
Patent #:
NONE
Issue Dt:
Application #:
12433763
Filing Dt:
04/30/2009
Publication #:
US20100169602
Pub Dt:
07/01/2010
Title:
Method and Apparatus for Efficient Memory Placement
60
Patent #:
7995365
Issue Dt:
08/09/2011
Application #:
12434600
Filing Dt:
05/01/2009
Title:
METHOD AND APPARATUSES FOR MANAGING DOUBLE DATA RATE IN NON-VOLATILE MEMORY
61
Patent #:
8225042
Issue Dt:
07/17/2012
Application #:
12435986
Filing Dt:
05/05/2009
Title:
METHOD AND APPARATUS FOR PREVENTING FOREGROUND ERASE OPERATIONS IN ELECTRICALLY WRITABLE MEMORY DEVICES
62
Patent #:
8198717
Issue Dt:
06/12/2012
Application #:
12463329
Filing Dt:
05/08/2009
Title:
SIGNAL SHIFTING TO ALLOW INDEPENDENT CONTROL OF IDENTICAL STACKED MEMORY MODULES
63
Patent #:
8259488
Issue Dt:
09/04/2012
Application #:
12464011
Filing Dt:
05/11/2009
Title:
PHASE-CHANGE MEMORY TEMPERATURE SENSITIVE DETECTOR
64
Patent #:
8176232
Issue Dt:
05/08/2012
Application #:
12464036
Filing Dt:
05/11/2009
Publication #:
US20100287435
Pub Dt:
11/11/2010
Title:
DEDICATED INTERFACE TO FACTORY PROGRAM PHASE-CHANGE MEMORIES
65
Patent #:
8331857
Issue Dt:
12/11/2012
Application #:
12465506
Filing Dt:
05/13/2009
Publication #:
US20100291867
Pub Dt:
11/18/2010
Title:
WIRELESS INTERFACE TO PROGRAM PHASE-CHANGE MEMORIES
66
Patent #:
8250282
Issue Dt:
08/21/2012
Application #:
12466366
Filing Dt:
05/14/2009
Publication #:
US20100293317
Pub Dt:
11/18/2010
Title:
PCM MEMORIES FOR STORAGE BUS INTERFACES
67
Patent #:
8286066
Issue Dt:
10/09/2012
Application #:
12467965
Filing Dt:
05/18/2009
Publication #:
US20100293434
Pub Dt:
11/18/2010
Title:
NON-VOLATILE MEMORY WITH BI-DIRECTIONAL ERROR CORRECTION PROTECTION
68
Patent #:
8504759
Issue Dt:
08/06/2013
Application #:
12472153
Filing Dt:
05/26/2009
Publication #:
US20100306446
Pub Dt:
12/02/2010
Title:
METHOD AND DEVICES FOR CONTROLLING POWER LOSS
69
Patent #:
8230196
Issue Dt:
07/24/2012
Application #:
12473629
Filing Dt:
05/28/2009
Title:
CONFIGURABLE PARTITIONS FOR NON-VOLATILE MEMORY
70
Patent #:
NONE
Issue Dt:
Application #:
12477017
Filing Dt:
06/02/2009
Publication #:
US20100306453
Pub Dt:
12/02/2010
Title:
METHOD FOR OPERATING A PORTION OF AN EXECUTABLE PROGRAM IN AN EXECUTABLE NON-VOLATILE MEMORY
71
Patent #:
NONE
Issue Dt:
Application #:
12481496
Filing Dt:
06/09/2009
Publication #:
US20100308296
Pub Dt:
12/09/2010
Title:
PHASE CHANGE MEMORY CELL WITH SELF-ALIGNED VERTICAL HEATER
72
Patent #:
8370702
Issue Dt:
02/05/2013
Application #:
12482400
Filing Dt:
06/10/2009
Publication #:
US20100318877
Pub Dt:
12/16/2010
Title:
ERROR CORRECTING CODES FOR INCREASED STORAGE CAPACITY IN MULTILEVEL MEMORY DEVICES
73
Patent #:
9123409
Issue Dt:
09/01/2015
Application #:
12483198
Filing Dt:
06/11/2009
Publication #:
US20100318718
Pub Dt:
12/16/2010
Title:
MEMORY DEVICE FOR A HIERARCHICAL MEMORY ARCHITECTURE
74
Patent #:
8755229
Issue Dt:
06/17/2014
Application #:
12490002
Filing Dt:
06/23/2009
Title:
LIMITING FLASH MEMORY OVER PROGRAMMING
75
Patent #:
8719486
Issue Dt:
05/06/2014
Application #:
12490501
Filing Dt:
06/24/2009
Publication #:
US20100332725
Pub Dt:
12/30/2010
Title:
PINNING CONTENT IN NONVOLATILE MEMORY
76
Patent #:
8130550
Issue Dt:
03/06/2012
Application #:
12491160
Filing Dt:
06/24/2009
Title:
MEMORY WITH SUB-BLOCKS
77
Patent #:
8412985
Issue Dt:
04/02/2013
Application #:
12494830
Filing Dt:
06/30/2009
Title:
HARDWIRED REMAPPED MEMORY
78
Patent #:
NONE
Issue Dt:
Application #:
12494904
Filing Dt:
06/30/2009
Publication #:
US20100332894
Pub Dt:
12/30/2010
Title:
BIT ERROR THRESHOLD AND REMAPPING A MEMORY DEVICE
79
Patent #:
NONE
Issue Dt:
Application #:
12494950
Filing Dt:
06/30/2009
Publication #:
US20100332950
Pub Dt:
12/30/2010
Title:
BIT ERROR THRESHOLD AND CONTENT ADDRESSABLE MEMORY TO ADDRESS A REMAPPED MEMORY DEVICE
80
Patent #:
8412987
Issue Dt:
04/02/2013
Application #:
12494994
Filing Dt:
06/30/2009
Publication #:
US20100332895
Pub Dt:
12/30/2010
Title:
NON-VOLATILE MEMORY TO STORE MEMORY REMAP INFORMATION
81
Patent #:
8161334
Issue Dt:
04/17/2012
Application #:
12495032
Filing Dt:
06/30/2009
Title:
EXTERNALLY MAINTAINED REMAP INFORMATION
82
Patent #:
8495467
Issue Dt:
07/23/2013
Application #:
12495081
Filing Dt:
06/30/2009
Title:
SWITCHABLE ON-DIE MEMORY ERROR CORRECTING ENGINE
83
Patent #:
9246093
Issue Dt:
01/26/2016
Application #:
12496503
Filing Dt:
07/01/2009
Publication #:
US20110001114
Pub Dt:
01/06/2011
Title:
PHASE CHANGE MEMORY CELL WITH SELF-ALIGNED VERTICAL HEATER AND LOW RESISTIVITY INTERFACE
84
Patent #:
8626997
Issue Dt:
01/07/2014
Application #:
12504029
Filing Dt:
07/16/2009
Publication #:
US20110016268
Pub Dt:
01/20/2011
Title:
PHASE CHANGE MEMORY IN A DUAL INLINE MEMORY MODULE
85
Patent #:
8211762
Issue Dt:
07/03/2012
Application #:
12512907
Filing Dt:
07/30/2009
Title:
NON-VOLATILE MEMORY
86
Patent #:
8572333
Issue Dt:
10/29/2013
Application #:
12532828
Filing Dt:
04/26/2011
Publication #:
US20110302353
Pub Dt:
12/08/2011
Title:
NON-VOLATILE MEMORY WITH EXTENDED OPERATING TEMPERATURE RANGE
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8572333
Issue Dt:
10/29/2013
Application #:
12532828
Filing Dt:
04/26/2011
PCT #:
IT0800816
Title:
NON-VOLATILE MEMORY WITH EXTENDED OPERATING TEMPERATURE RANGE
88
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7936610
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05/03/2011
Application #:
12534792
Filing Dt:
08/03/2009
Title:
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89
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8700845
Issue Dt:
04/15/2014
Application #:
12539771
Filing Dt:
08/12/2009
Title:
DAISY CHAINING NONVOLATILE MEMORIES
90
Patent #:
9305606
Issue Dt:
04/05/2016
Application #:
12542528
Filing Dt:
08/17/2009
Publication #:
US20110040909
Pub Dt:
02/17/2011
Title:
HIGH-SPEED WIRELESS SERIAL COMMUNICATION LINK FOR A STACKED DEVICE CONFIGURATION USING NEAR FIELD COUPLING
91
Patent #:
8601202
Issue Dt:
12/03/2013
Application #:
12548375
Filing Dt:
08/26/2009
Title:
FULL CHIP WEAR LEVELING IN MEMORY DEVICE
92
Patent #:
8036016
Issue Dt:
10/11/2011
Application #:
12552246
Filing Dt:
09/01/2009
Publication #:
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Pub Dt:
03/03/2011
Title:
MAINTENANCE PROCESS TO ENHANCE MEMORY ENDURANCE
93
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8804411
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08/12/2014
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12557723
Filing Dt:
09/11/2009
Title:
DUAL MODE CLOCK AND DATA SCHEME FOR MEMORY PROGRAMMING
94
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9779057
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10/03/2017
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09/11/2009
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03/17/2011
Title:
AUTONOMOUS MEMORY ARCHITECTURE
95
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9015440
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04/21/2015
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09/11/2009
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03/17/2011
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AUTONOMOUS MEMORY SUBSYSTEM ARCHITECTURE
96
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04/07/2011
Title:
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8093090
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01/10/2012
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12577602
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10/12/2009
Title:
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8605490
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12/10/2013
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10/12/2009
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Pub Dt:
04/14/2011
Title:
NON-VOLATILE SRAM CELL THAT INCORPORATES PHASE-CHANGE MEMORY INTO A CMOS PROCESS
99
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8898417
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11/25/2014
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12582643
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10/20/2009
Title:
Block-Based Storage Device with a Memory-Mapped Interface
100
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8332731
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12/11/2012
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12612935
Filing Dt:
11/05/2009
Title:
ERROR-CORRECTING CODE AND PROCESS FOR FAST READ-ERROR CORRECTION
Assignor
1
NUMONYX B.V.
Exec Dt:
09/30/2011
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
BERKELEY LAW & TECHNOLOGY GROUP LLP
17933 NW EVERGREEN PARKWAY
SUITE 250
BEAVERTON, OR 97006

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