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Total properties:
18
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Patent #:
|
|
Issue Dt:
|
08/27/2002
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Application #:
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08954426
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Filing Dt:
|
10/20/1997
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|
Publication #:
|
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Pub Dt:
|
08/09/2001
| | | | |
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Title:
|
CHIP SCALE PACKAGE USING LARGE DUCTILE SOLDER BALLS
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|
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Patent #:
|
|
Issue Dt:
|
09/11/2001
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Application #:
|
09114204
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Filing Dt:
|
07/13/1998
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|
Title:
|
METHOD FOR FORMING CHIP SCALE PACKAGE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/06/2006
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Application #:
|
09575298
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Filing Dt:
|
05/19/2000
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|
Title:
|
SOLDER BAR FOR HIGH POWER FLIP CHIPS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/17/2003
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Application #:
|
09668450
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Filing Dt:
|
09/22/2000
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Title:
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POLYMER COLLAR FOR SOLDER BUMPS
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|
|
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Patent #:
|
|
Issue Dt:
|
09/03/2002
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Application #:
|
09766798
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Filing Dt:
|
01/22/2001
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|
Publication #:
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|
Pub Dt:
|
07/25/2002
| | | | |
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Title:
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ELECTROLESS NI/PD/AU METALLIZATION STRUCTURE FOR COPPER INTERCONNECT SUBSTRATE AND METHOD THEREFOR
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|
|
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Patent #:
|
|
Issue Dt:
|
06/15/2004
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Application #:
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09885846
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Filing Dt:
|
06/20/2001
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|
Publication #:
|
|
Pub Dt:
|
10/18/2001
| | | | |
|
Title:
|
METHOD FOR FORMING CHIP SCALE PACKAGE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
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Application #:
|
10672165
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Filing Dt:
|
09/26/2003
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|
Publication #:
|
|
Pub Dt:
|
03/31/2005
| | | | |
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Title:
|
WAFER-LEVEL MOAT STRUCTURES
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/10/2006
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Application #:
|
10672201
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Filing Dt:
|
09/26/2003
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|
Publication #:
|
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Pub Dt:
|
03/31/2005
| | | | |
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Title:
|
FORMING PARTIAL-DEPTH FEATURES IN POLYMER FILM
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/19/2005
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Application #:
|
10704131
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Filing Dt:
|
11/10/2003
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|
Publication #:
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Pub Dt:
|
04/28/2005
| | | | |
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Title:
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BUILD-UP STRUCTURES WITH MULTI-ANGLE VIAS FOR CHIP TO CHIP INTERCONNECTS AND OPTICAL BUSSING
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/14/2006
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Application #:
|
11145948
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Filing Dt:
|
06/07/2005
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|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
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Title:
|
BUILD-UP STRUCTURES WITH MULTI-ANGLE VIAS FOR CHIP TO CHIP INTERCONNECTS AND OPTICAL BUSSING
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
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11609036
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Filing Dt:
|
12/11/2006
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|
Publication #:
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|
Pub Dt:
|
06/12/2008
| | | | |
|
Title:
|
Solder Bump/Under Bump Metallurgy Structure for High Temperature Applications
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|
|
|
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Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11718192
|
Filing Dt:
|
12/05/2007
|
|
Publication #:
|
|
Pub Dt:
|
01/15/2009
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE PACKAGE WITH BUMP OVERLYING A POLYMER LAYER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
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Application #:
|
11867646
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Filing Dt:
|
10/04/2007
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|
Publication #:
|
|
Pub Dt:
|
04/10/2008
| | | | |
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Title:
|
WAFER-LEVEL INTERCONNECT FOR HIGH MECHANICAL RELIABILITY APPLICATIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2011
|
Application #:
|
12107009
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Filing Dt:
|
04/21/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/18/2008
| | | | |
|
Title:
|
SOLDER BUMP INTERCONNECT FOR IMPROVED MECHANICAL AND THERMO-MECHANICAL PERFORMANCE
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
12142415
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Filing Dt:
|
06/19/2008
|
|
Publication #:
|
|
Pub Dt:
|
03/05/2009
| | | | |
|
Title:
|
UNDER BUMP METALLIZATION STRUCTURE HAVING A SEED LAYER FOR ELECTROLESS NICKEL DEPOSITION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2011
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Application #:
|
12537236
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Filing Dt:
|
08/06/2009
|
|
Publication #:
|
|
Pub Dt:
|
02/11/2010
| | | | |
|
Title:
|
ENHANCED RELIABILITY FOR SEMICONDUCTOR DEVICES USING DIELECTRIC ENCASEMENT
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12828003
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Filing Dt:
|
06/30/2010
|
|
Publication #:
|
|
Pub Dt:
|
01/06/2011
| | | | |
|
Title:
|
METHODS AND STRUCTURES FOR A VERTICAL PILLAR INTERCONNECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2012
|
Application #:
|
13085759
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Filing Dt:
|
04/13/2011
|
|
Publication #:
|
|
Pub Dt:
|
08/04/2011
| | | | |
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Title:
|
SOLDER BUMP INTERCONNECT
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|
