Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 027342/0990 | |
| Pages: | 4 |
| | Recorded: | 12/07/2011 | | |
| Attorney Dkt #: | KOYO/CASIO/TERAMIKROSLHSP |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12720760
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Filing Dt:
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03/10/2010
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Publication #:
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Pub Dt:
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09/16/2010
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Title:
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METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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10/02/2012
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Application #:
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12729558
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Filing Dt:
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03/23/2010
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12828424
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Filing Dt:
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07/01/2010
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Publication #:
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Pub Dt:
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01/06/2011
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Title:
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SEMICONDUCTOR DEVICE INCLUDING SEALING FILM FOR ENCAPSULATING SEMICONDUCTOR CHIP AND PROJECTION ELECTRODES AND MANUFACTURING METHOD THEREOF
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Patent #:
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Issue Dt:
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07/16/2013
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Application #:
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13074233
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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09/29/2011
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Title:
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SEMICONDUCTOR STRUCTURE, MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/27/2012
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Application #:
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13074279
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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09/29/2011
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Title:
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SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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13235782
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Filing Dt:
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09/19/2011
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Publication #:
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Pub Dt:
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04/05/2012
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Title:
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SEMICONDUCTOR DEVICE HAVING MULTILAYER WIRING STRUCTURE AND MANUFACTURING METHOD OF THE SAME
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Assignee
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| 10-6, IMAI 3-CHOME, OME-SHI, |
| TOKYO,, JAPAN 198-8555 |
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Correspondence name and address
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LEONARD HOLTZ
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220 FIFTH AVENUE
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16TH FLOOR
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NEW YORK, NY 10001
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