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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10318304
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Filing Dt:
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12/13/2002
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Publication #:
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Pub Dt:
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06/17/2004
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Title:
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METHOD FOR TREATING SUBSTRATES FOR MICROELECTRONICS AND SUBSTRATES OBTAINED BY SAID METHOD
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10458471
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Filing Dt:
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06/09/2003
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Publication #:
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Pub Dt:
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12/18/2003
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Title:
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Fabrication of substrates with a useful layer of monocrystalline semiconductor material
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Patent #:
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Issue Dt:
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11/22/2011
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Application #:
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10574120
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Filing Dt:
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05/31/2007
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Publication #:
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Pub Dt:
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02/14/2008
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Title:
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METHOD OF PRODUCING A PLATE-SHAPED STRUCTURE, IN PARTICULAR, FROM SILICON, USE OF SAID METHOD AND PLATE-SHAPED STRUCTURE THUS PRODUCED, IN PARTICULAR FROM SILICON
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10691403
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Filing Dt:
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10/21/2003
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Publication #:
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Pub Dt:
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02/03/2005
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Title:
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METHOD FOR PRODUCING A HIGH QUALITY USEFUL LAYER ON A SUBSTRATE
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10733431
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Filing Dt:
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12/10/2003
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Publication #:
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Pub Dt:
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08/19/2004
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Title:
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TWO-STAGE ANNEALING METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10784017
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Filing Dt:
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02/20/2004
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Publication #:
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Pub Dt:
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09/30/2004
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Title:
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Method for forming a relaxed or pseudo-relaxed useful layer on a substrate
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10875233
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Filing Dt:
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06/25/2004
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Publication #:
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Pub Dt:
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10/06/2005
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Title:
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Methods for preparing a bonding surface of a semiconductor wafer
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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10883435
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Filing Dt:
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07/01/2004
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Publication #:
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Pub Dt:
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01/06/2005
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Title:
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SUBSTRATE CUTTING DEVICE AND METHOD
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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10883437
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Filing Dt:
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07/01/2004
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Publication #:
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Pub Dt:
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11/25/2004
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Title:
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FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SEMICONDUCTOR MATERIAL
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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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11004408
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Filing Dt:
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12/03/2004
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Publication #:
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Pub Dt:
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12/15/2005
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Title:
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METHOD OF MANUFACTURING A MATERIAL COMPOUND WAFER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11004411
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Filing Dt:
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12/03/2004
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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High electron mobility transistor piezoelectric structures
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11020057
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Filing Dt:
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12/21/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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Methods for minimizing defects when transferring a semiconductor useful layer
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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11063867
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Filing Dt:
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02/24/2005
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Publication #:
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Pub Dt:
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09/22/2005
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Title:
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METHOD FOR TREATING SUBSTRATES FOR MICROELECTRONICS AND SUBSTRATES OBTAINED BY SAID METHOD
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Patent #:
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Issue Dt:
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05/26/2009
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Application #:
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11084747
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Filing Dt:
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03/21/2005
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Publication #:
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Pub Dt:
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07/27/2006
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Title:
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OPTOELECTRONIC SUBSTRATE AND METHODS OF MAKING SAME
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11233318
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Filing Dt:
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09/21/2005
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Publication #:
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Pub Dt:
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01/19/2006
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Title:
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Thermal treatment of a semiconductor layer
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Patent #:
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Issue Dt:
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10/13/2009
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Application #:
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11283706
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Filing Dt:
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11/22/2005
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Publication #:
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Pub Dt:
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04/13/2006
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Title:
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METHOD OF FABRICATING AN EPITAXIALLY GROWN LAYER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11446357
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Filing Dt:
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06/05/2006
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Publication #:
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Pub Dt:
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10/05/2006
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Title:
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METHOD FOR PRODUCING AN USEFUL LAYER ON A SUBSTRATE BY SEQUENTIALLY IMPLANTING HELIUM AND THEN HYDROGEN SPECIES INTO A DONOR SUBSTRATE FOLLOWED BY THERMAL TREATMENT PROCESS AFTER DETACHING THE USEFUL LAYER FROM DONOR SUBSTRATE.
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Patent #:
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Issue Dt:
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02/15/2011
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Application #:
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11472663
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Filing Dt:
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06/21/2006
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Publication #:
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Pub Dt:
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10/26/2006
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Title:
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SUBSTRATE WITH DETERMINATE THERMAL EXPANSION COEFFICIENT
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Patent #:
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Issue Dt:
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01/12/2010
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Application #:
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11472665
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Filing Dt:
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06/21/2006
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Publication #:
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Pub Dt:
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12/07/2006
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Title:
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METHODS FOR PREPARING A BONDING SURFACE OF A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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06/09/2009
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Application #:
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11481696
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Filing Dt:
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07/05/2006
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Publication #:
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Pub Dt:
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04/05/2007
| | | | |
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Title:
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METHOD OF FABRICATING A RELEASE SUBSTRATE
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Patent #:
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Issue Dt:
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11/04/2008
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Application #:
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11481701
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Filing Dt:
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07/05/2006
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Publication #:
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Pub Dt:
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01/25/2007
| | | | |
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Title:
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METHOD OF REDUCING ROUGHNESS OF A THICK INSULATING LAYER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11505668
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Filing Dt:
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08/16/2006
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Publication #:
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Pub Dt:
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06/21/2007
| | | | |
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Title:
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Methods for making substrates and substrates formed therefrom
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Patent #:
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Issue Dt:
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04/21/2015
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Application #:
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11541192
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Filing Dt:
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09/28/2006
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Publication #:
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Pub Dt:
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02/01/2007
| | | | |
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Title:
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METHOD FOR MAKING A COMPOSITE SUBSTRATE AND COMPOSITE SUBSTRATE ACCORDING TO THE METHOD
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11617345
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Filing Dt:
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12/28/2006
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Publication #:
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Pub Dt:
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05/10/2007
| | | | |
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Title:
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METHOD OF MANUFACTURING A MATERIAL COMPOUND WAFER
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Patent #:
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Issue Dt:
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12/27/2011
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Application #:
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11622053
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Filing Dt:
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01/11/2007
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Publication #:
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Pub Dt:
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05/31/2007
| | | | |
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Title:
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SUBSTRATE CUTTING DEVICE AND METHOD
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Patent #:
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Issue Dt:
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07/06/2010
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Application #:
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11624867
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Filing Dt:
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01/19/2007
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Publication #:
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Pub Dt:
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05/24/2007
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Title:
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METHODS FOR MINIMIZING DEFECTS WHEN TRANSFERRING A SEMICONDUCTOR USEFUL LAYER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11684925
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Filing Dt:
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03/12/2007
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Publication #:
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Pub Dt:
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07/19/2007
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Title:
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HEMT PIEZOELECTRIC STRUCTURES WITH ZERO ALLOY DISORDER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11755560
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Filing Dt:
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05/30/2007
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Publication #:
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Pub Dt:
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06/19/2008
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Title:
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DOUBLE PLASMA UTBOX
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Patent #:
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Issue Dt:
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02/15/2011
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Application #:
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11831484
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
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11/22/2007
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Title:
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FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SEMICONDUCTOR MATERIAL
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11850170
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Filing Dt:
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09/05/2007
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Publication #:
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Pub Dt:
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10/30/2008
| | | | |
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Title:
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METHOD FOR MANUFACTURING COMPOUND MATERIAL WAFER AND CORRESPONDING COMPOUND MATERIAL WAFER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11851830
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Filing Dt:
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09/07/2007
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Publication #:
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Pub Dt:
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12/27/2007
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Title:
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CHEMICAL-MECHANICAL POLISHING METHOD AND APPARATUS
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Patent #:
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Issue Dt:
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01/12/2010
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Application #:
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11873311
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Filing Dt:
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10/16/2007
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Publication #:
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Pub Dt:
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08/21/2008
| | | | |
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Title:
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BONDING INTERFACE QUALITY BY COLD CLEANING AND HOT BONDING
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12087093
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Filing Dt:
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12/01/2008
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Publication #:
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Pub Dt:
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12/10/2009
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Title:
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Method for Making a Plate-Like Detachable Structure, in Particular Made of Silicon, and Use of Said Method
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Patent #:
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Issue Dt:
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12/04/2012
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Application #:
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12170937
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Filing Dt:
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07/10/2008
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Publication #:
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Pub Dt:
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02/12/2009
| | | | |
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Title:
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METHOD AND INSTALLATION FOR FRACTURING A COMPOSITE SUBSTRATE ALONG AN EMBRITTLEMENT PLANE
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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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12180418
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Filing Dt:
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07/25/2008
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Publication #:
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Pub Dt:
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04/16/2009
| | | | |
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Title:
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EPITAXIAL METHODS AND TEMPLATES GROWN BY THE METHODS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12200400
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Filing Dt:
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08/28/2008
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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MULTIPLE GATE FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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05/22/2012
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Application #:
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12234280
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Filing Dt:
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09/19/2008
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Publication #:
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Pub Dt:
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01/22/2009
| | | | |
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Title:
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METHOD OF REDUCING ROUGHNESS OF A THICK INSULATING LAYER
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Patent #:
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Issue Dt:
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03/05/2013
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Application #:
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12261796
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Filing Dt:
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10/30/2008
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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THERMALIZATION OF GASEOUS PRECURSORS IN CVD REACTORS
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Patent #:
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Issue Dt:
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05/10/2011
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Application #:
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12280639
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Filing Dt:
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08/25/2008
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Publication #:
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Pub Dt:
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02/05/2009
| | | | |
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Title:
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PATTERNED THIN SOI
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12303950
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Filing Dt:
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06/16/2010
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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HIGH VOLUME DELIVERY SYSTEM FOR GALLIUM TRICHLORIDE
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Patent #:
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Issue Dt:
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02/26/2013
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Application #:
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12305394
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Filing Dt:
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12/18/2008
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Publication #:
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Pub Dt:
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09/10/2009
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Title:
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METHODS FOR HIGH VOLUME MANUFACTURE OF GROUP III-V SEMICONDUCTOR MATERIALS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12305434
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Filing Dt:
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12/18/2008
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Publication #:
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Pub Dt:
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09/10/2009
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Title:
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HIGH VOLUME DELIVERY SYSTEM FOR GALLIUM TRICHLORIDE
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Patent #:
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Issue Dt:
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11/19/2013
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Application #:
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12305495
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Filing Dt:
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12/18/2008
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Publication #:
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Pub Dt:
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11/19/2009
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Title:
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ABATEMENT OF REACTION GASES FROM GALLIUM NITRIDE DEPOSITION
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Patent #:
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Issue Dt:
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06/12/2012
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Application #:
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12305534
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Filing Dt:
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12/18/2008
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Publication #:
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Pub Dt:
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07/16/2009
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Title:
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GALLIUM TRICHLORIDE INJECTION SCHEME
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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12305553
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Filing Dt:
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12/18/2008
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Publication #:
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Pub Dt:
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08/20/2009
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Title:
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TEMPERATURE-CONTROLLED PURGE GATE VALVE FOR CHEMICAL VAPOR DEPOSITION CHAMBER
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Patent #:
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Issue Dt:
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02/28/2017
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Application #:
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12305574
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Filing Dt:
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12/18/2008
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Publication #:
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Pub Dt:
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09/10/2009
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Title:
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EQUIPMENT FOR HIGH VOLUME MANUFACTURE OF GROUP III-V SEMICONDUCTOR MATERIALS
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Patent #:
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Issue Dt:
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11/01/2011
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Application #:
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12341722
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Filing Dt:
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12/22/2008
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Publication #:
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Pub Dt:
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02/11/2010
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Title:
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METHODS AND STRUCTURES FOR RELAXATION OF STRAINED LAYERS
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Patent #:
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Issue Dt:
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07/19/2011
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Application #:
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12341852
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Filing Dt:
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12/22/2008
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Publication #:
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Pub Dt:
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02/11/2010
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Title:
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METHODS FOR RELAXATION AND TRANSFER OF STRAINED LAYERS AND STRUCTURES FABRICATED THEREBY
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Patent #:
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Issue Dt:
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09/06/2011
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Application #:
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12392888
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Filing Dt:
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02/25/2009
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Publication #:
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Pub Dt:
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07/16/2009
| | | | |
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Title:
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METHOD OF FABRICATING A RELEASE SUBSTRATE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12424868
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Filing Dt:
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04/16/2009
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Publication #:
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Pub Dt:
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08/13/2009
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Title:
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OPTOELECTRONIC SUBSTRATE AND METHODS OF MAKING SAME
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Patent #:
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Issue Dt:
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08/14/2012
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Application #:
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12515484
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Filing Dt:
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05/19/2009
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Publication #:
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Pub Dt:
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02/25/2010
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Title:
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METHOD OF PRODUCING AN SOI STRUCTURE WITH AN INSULATING LAYER OF CONTROLLED THICKNESS
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Patent #:
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Issue Dt:
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01/01/2013
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Application #:
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12524104
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Filing Dt:
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07/22/2009
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Publication #:
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Pub Dt:
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04/22/2010
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Title:
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PROCESS FOR FABRICATING A SUBSTRATE COMPRISING A DEPOSITED BURIED OXIDE LAYER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12524246
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Filing Dt:
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07/23/2009
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Publication #:
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Pub Dt:
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05/19/2011
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Title:
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METHOD FOR POLISHING HETEROSTRUCTURES
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Patent #:
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Issue Dt:
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01/08/2013
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Application #:
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12525493
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Filing Dt:
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07/31/2009
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Publication #:
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Pub Dt:
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04/15/2010
| | | | |
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Title:
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METHOD OF BONDING TWO SUBSTRATES
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06/12/2012
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12530606
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Filing Dt:
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09/09/2009
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Publication #:
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02/25/2010
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Title:
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DOPED SUBSTRATE TO BE HEATED
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02/12/2013
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12552891
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09/02/2009
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03/04/2010
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Title:
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METHOD FOR FABRICATING A LOCALLY PASSIVATED GERMANIUM-ON-INSULATOR SUBSTRATE
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07/10/2012
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12553221
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09/03/2009
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Publication #:
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Pub Dt:
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12/31/2009
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Title:
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METHOD OF FABRICATING AN EPITAXIALLY GROWN LAYER
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NONE
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12556381
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09/09/2009
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06/24/2010
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Title:
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METHOD FOR BONDING TWO SUBSTRATES
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08/21/2012
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12599680
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01/13/2011
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12/22/2011
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Title:
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CONTROLLED TEMPERATURE IMPLANTATION
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Patent #:
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08/07/2012
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12600120
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12/16/2009
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Pub Dt:
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06/03/2010
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Title:
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METHODS FOR IMPROVING THE QUALITY OF EPITAXIALLY-GROWN SEMICONDUCTOR MATERIALS
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Patent #:
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NONE
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Application #:
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12602740
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Filing Dt:
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12/02/2009
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Publication #:
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Pub Dt:
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07/22/2010
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Title:
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METHODS FOR IN-SITU CHAMBER CLEANING PROCESS FOR HIGH VOLUME MANUFACTURE OF SEMICONDUCTOR MATERIALS
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08/21/2012
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12618500
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Filing Dt:
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11/13/2009
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Publication #:
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Pub Dt:
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05/20/2010
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Title:
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METHODS FOR IMPROVING THE QUALITY OF STRUCTURES COMPRISING SEMICONDUCTOR MATERIALS
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Patent #:
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NONE
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Application #:
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12663693
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12/08/2009
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Publication #:
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Pub Dt:
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07/29/2010
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Title:
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METHOD OF FABRICATING A COMPOSITE STRUCTURE WITH A STABLE BONDING LAYER OF OXIDE
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Patent #:
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Issue Dt:
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08/12/2014
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Application #:
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12667990
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Filing Dt:
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01/06/2010
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Publication #:
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Pub Dt:
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07/29/2010
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Title:
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CHARGE RESERVOIR STRUCTURE
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Patent #:
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Application #:
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12672797
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Filing Dt:
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02/09/2010
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Publication #:
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Pub Dt:
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08/11/2011
| | | | |
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Title:
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METHOD OF MANUFACTURING A STRUCTURE COMPRISING A SUBSTRATE AND A LAYER DEPOSITED ON ONE OF ITS FACES
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Patent #:
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04/16/2013
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12675927
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03/01/2010
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Publication #:
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Pub Dt:
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12/02/2010
| | | | |
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Title:
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METHOD OF PRODUCING A STRUCTURE BY LAYER TRANSFER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12677083
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Filing Dt:
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03/08/2010
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Publication #:
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Pub Dt:
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08/05/2010
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Title:
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PRECISE OXIDE DISSOLUTION
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Patent #:
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Issue Dt:
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03/05/2013
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Application #:
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12678482
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Filing Dt:
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03/16/2010
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Publication #:
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Pub Dt:
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08/19/2010
| | | | |
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Title:
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METHOD FOR MAKING A SUBSTRATE OF THE SEMICONDUCTOR ON INSULATOR TYPE WITH AN INTEGRATED GROUND PLANE
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Patent #:
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Issue Dt:
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12/04/2012
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Application #:
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12680880
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Filing Dt:
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06/16/2010
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Publication #:
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Pub Dt:
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11/18/2010
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Title:
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METHOD FOR HEATING A WAFER BY MEANS OF A LIGHT FLUX
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Patent #:
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Issue Dt:
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09/11/2012
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Application #:
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12747099
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Filing Dt:
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06/09/2010
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Publication #:
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Pub Dt:
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10/21/2010
| | | | |
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Title:
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METHOD FOR MANUFACTURING HETEROSTRUCTURES
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Patent #:
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Issue Dt:
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11/03/2015
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Application #:
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12747969
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Filing Dt:
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06/14/2010
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Publication #:
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Pub Dt:
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10/14/2010
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Title:
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APPARATUS FOR DELIVERING PRECURSOR GASES TO AN EPITAXIAL GROWTH SUBSTRATE
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Patent #:
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Issue Dt:
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01/22/2013
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Application #:
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12789100
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Filing Dt:
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05/27/2010
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Publication #:
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Pub Dt:
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09/15/2011
| | | | |
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Title:
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NANO-SENSE AMPLIFIER
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Patent #:
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Issue Dt:
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05/19/2015
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Application #:
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12793515
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Filing Dt:
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06/03/2010
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Publication #:
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Pub Dt:
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10/06/2011
| | | | |
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Title:
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METHOD FOR MANUFACTURING A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
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07/17/2012
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Application #:
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12793553
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Filing Dt:
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06/03/2010
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Publication #:
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Pub Dt:
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10/06/2011
| | | | |
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Title:
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PSEUDO-INVERTER CIRCUIT ON SeOI
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Patent #:
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Issue Dt:
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10/30/2012
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Application #:
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12810133
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Filing Dt:
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07/06/2010
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Publication #:
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Pub Dt:
|
11/25/2010
| | | | |
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Title:
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SUBSTRATES FOR MONOLITHIC OPTICAL CIRCUITS AND ELECTRONIC CIRCUITS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12811209
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Filing Dt:
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09/14/2010
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Publication #:
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Pub Dt:
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01/06/2011
| | | | |
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Title:
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PROCESSING FOR BONDING TWO SUBSTRATES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12830988
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Filing Dt:
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07/06/2010
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Publication #:
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Pub Dt:
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01/27/2011
| | | | |
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Title:
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POSITIONING OF SEMICONDUCTOR SUBSTRATES IN A FURNACE
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Patent #:
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Issue Dt:
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07/10/2012
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Application #:
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12863904
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Filing Dt:
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07/21/2010
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Publication #:
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Pub Dt:
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11/25/2010
| | | | |
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Title:
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METHOD FOR FABRICATING A SEMICONDUCTOR ON INSULATOR TYPE SUBSTRATE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12880806
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Filing Dt:
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09/13/2010
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Publication #:
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Pub Dt:
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05/05/2011
| | | | |
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Title:
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SUBSTRATE HOLDER AND CLIPPING DEVICE
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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12886421
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Filing Dt:
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09/20/2010
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Publication #:
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Pub Dt:
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10/27/2011
| | | | |
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Title:
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DEVICE COMPRISING A FIELD-EFFECT TRANSISTOR IN A SILICON-ON-INSULATOR
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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12888251
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Filing Dt:
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09/22/2010
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Publication #:
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|
Pub Dt:
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12/22/2011
| | | | |
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Title:
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APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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01/01/2013
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Application #:
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12893535
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Filing Dt:
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09/29/2010
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Publication #:
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Pub Dt:
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06/09/2011
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE HAVING AN INGAN LAYER
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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12897409
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Filing Dt:
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10/04/2010
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Publication #:
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Pub Dt:
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01/19/2012
| | | | |
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Title:
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TEMPORARY SUBSTRATE, TRANSFER METHOD AND PRODUCTION METHOD
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Patent #:
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Issue Dt:
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07/02/2013
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Application #:
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12897491
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Filing Dt:
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10/04/2010
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Publication #:
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Pub Dt:
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01/12/2012
| | | | |
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Title:
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METHOD FOR MOLECULAR ADHESION BONDING WITH COMPENSATION FOR RADIAL MISALIGNMENT
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12898230
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Filing Dt:
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10/05/2010
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Publication #:
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Pub Dt:
|
06/09/2011
| | | | |
|
Title:
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METHOD OF CONTROLLING A DRAM MEMORY CELL ON THE SeOI HAVING A SECOND CONTROL GATE BURIED UNDER THE INSULATING LAYER
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Patent #:
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Issue Dt:
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07/29/2014
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Application #:
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12904744
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Filing Dt:
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10/14/2010
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Publication #:
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Pub Dt:
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02/23/2012
| | | | |
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Title:
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LOW-TEMPERATURE BONDING PROCESS
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Patent #:
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Issue Dt:
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04/30/2013
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Application #:
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12910023
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Filing Dt:
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10/22/2010
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Publication #:
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Pub Dt:
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03/01/2012
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Title:
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PROCESS FOR MEASURING AN ADHESION ENERGY, AND ASSOCIATED SUBSTRATES
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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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12918935
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Filing Dt:
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09/29/2010
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Publication #:
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Pub Dt:
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02/03/2011
| | | | |
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Title:
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METHOD FOR FABRICATING A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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12933666
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Filing Dt:
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11/03/2010
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Publication #:
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Pub Dt:
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02/24/2011
| | | | |
|
Title:
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GERMANIUM LAYER POLISHING
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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12933966
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Filing Dt:
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12/08/2010
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|
Publication #:
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Pub Dt:
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05/19/2011
| | | | |
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Title:
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MIXED TRIMMING METHOD
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Patent #:
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Issue Dt:
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03/25/2014
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Application #:
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12934026
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Filing Dt:
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12/08/2010
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Publication #:
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Pub Dt:
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04/28/2011
| | | | |
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Title:
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PROGRESSIVE TRIMMING METHOD
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Patent #:
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Issue Dt:
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01/10/2012
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Application #:
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12934359
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Filing Dt:
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09/24/2010
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Publication #:
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|
Pub Dt:
|
01/20/2011
| | | | |
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Title:
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METHOD FOR MANUFACTURING A LAYER OF GALLIUM NITRIDE OR GALLIUM AND ALUMINUM NITRIDE
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
12937153
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Filing Dt:
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10/08/2010
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|
Publication #:
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Pub Dt:
|
02/10/2011
| | | | |
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Title:
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MODULAR AND READILY CONFIGURABLE REACTOR ENCLOSURES AND ASSOCIATED FUNCTION MODULES
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Patent #:
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Issue Dt:
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11/27/2012
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Application #:
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12937192
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Filing Dt:
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10/08/2010
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Publication #:
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|
Pub Dt:
|
02/03/2011
| | | | |
|
Title:
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METHODS FOR IMPROVING THE QUALITY OF GROUP III-NITRIDE MATERIALS AND STRUCTURES PRODUCED BY THE METHODS
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Patent #:
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Issue Dt:
|
11/06/2012
|
Application #:
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12942754
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Filing Dt:
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11/09/2010
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Publication #:
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Pub Dt:
|
07/14/2011
| | | | |
|
Title:
|
DRAM MEMORY CELL HAVING A VERTICAL BIPOLAR INJECTOR
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|
|
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|
Patent #:
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|
Issue Dt:
|
11/20/2012
|
Application #:
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12943693
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Filing Dt:
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11/10/2010
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Publication #:
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Pub Dt:
|
06/23/2011
| | | | |
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Title:
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PROCESS FOR FABRICATING A HETEROSTRUCTURE WITH MINIMIZED STRESS
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|
Patent #:
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Issue Dt:
|
03/04/2014
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Application #:
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12946135
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Filing Dt:
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11/15/2010
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Publication #:
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Pub Dt:
|
06/09/2011
| | | | |
|
Title:
|
FLASH MEMORY CELL ON SEOI HAVING A SECOND CONTROL GATE BURIED UNDER THE INSULATING LAYER
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|
Patent #:
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Issue Dt:
|
02/05/2013
|
Application #:
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12956547
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Filing Dt:
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11/30/2010
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|
Publication #:
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Pub Dt:
|
06/16/2011
| | | | |
|
Title:
|
MANUFACTURE OF THIN SILICON-ON-INSULATOR (SOI) STRUCTURES
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
12956675
|
Filing Dt:
|
11/30/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/02/2011
| | | | |
|
Title:
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HETEROSTRUCTURE FOR ELECTRONIC POWER COMPONENTS, OPTOELECTRONIC OR PHOTOVOLTAIC COMPONENTS
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Patent #:
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Issue Dt:
|
02/26/2013
|
Application #:
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12961293
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Filing Dt:
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12/06/2010
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|
Publication #:
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|
Pub Dt:
|
06/09/2011
| | | | |
|
Title:
|
ARRAYS OF TRANSISTORS WITH BACK CONTROL GATES BURIED BENEATH THE INSULATING FILM OF A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE
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