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Patent #:
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Issue Dt:
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06/22/2010
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Application #:
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11357480
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Filing Dt:
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02/17/2006
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Publication #:
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Pub Dt:
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08/23/2007
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Title:
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TEST SYSTEM AND METHOD FOR TESTING ELECTRONIC DEVICES USING A PIPELINED TESTING ARCHITECTURE
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Patent #:
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Issue Dt:
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03/04/2008
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Application #:
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11357871
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Filing Dt:
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02/17/2006
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Publication #:
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Pub Dt:
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08/23/2007
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Title:
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MEMORY DEVICE FAIL SUMMARY DATA REDUCTION FOR IMPROVED REDUNDANCY ANALYSIS
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Patent #:
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Issue Dt:
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03/10/2009
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Application #:
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11361084
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Filing Dt:
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02/22/2006
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Publication #:
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Pub Dt:
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09/20/2007
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Title:
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METHOD AND APPARATUS FOR DETERMINING WHICH TIMING SETS TO PRE-LOAD INTO THE PIN ELECTRONICS OF A CIRCUIT TEST SYSTEM, AND FOR PRE-LOADING OR STORING SAID TIMING SETS
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Patent #:
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Issue Dt:
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07/08/2008
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Application #:
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11365010
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Filing Dt:
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03/01/2006
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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PIN ELECTRONIC FOR AUTOMATIC TESTING OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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10/28/2008
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Application #:
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11368751
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Filing Dt:
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03/06/2006
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Publication #:
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Pub Dt:
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09/20/2007
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Title:
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MEMORY DEVICE FAIL SUMMARY DATA REDUCTION FOR IMPROVED REDUNDANCY ANALYSIS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11385963
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Filing Dt:
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03/21/2006
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Publication #:
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Pub Dt:
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10/11/2007
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Title:
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Inexpensive low phase noise high speed stabilized time base
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Patent #:
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Issue Dt:
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06/23/2009
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Application #:
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11388306
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Filing Dt:
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03/22/2006
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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TEST DEVICE WITH TEST PARAMETER ADAPTATION
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Patent #:
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Issue Dt:
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01/01/2008
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Application #:
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11389847
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Filing Dt:
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03/27/2006
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Publication #:
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Pub Dt:
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10/26/2006
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Title:
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CALIBRATION APPARATUS AND METHOD USING PULSE FOR FREQUENCY, PHASE, AND DELAY CHARACTERISTIC
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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11397469
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Filing Dt:
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04/04/2006
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Publication #:
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Pub Dt:
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10/26/2006
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Title:
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ANALOG TO DIGITAL CONVERSION METHOD USING TRACK/HOLD CIRCUIT AND TIME INTERVAL ANALYZER, AND AN APPARATUS USING THE METHOD
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Patent #:
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Issue Dt:
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09/01/2009
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Application #:
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11399730
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Filing Dt:
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04/07/2006
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Publication #:
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Pub Dt:
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11/01/2007
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Title:
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SYSTEMS, METHODS AND APPARATUS FOR SYNTHESIZING STATE EVENTS FOR A TEST DATA STREAM
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Patent #:
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Issue Dt:
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12/28/2010
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Application #:
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11410699
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Filing Dt:
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04/24/2006
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Publication #:
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Pub Dt:
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10/25/2007
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Title:
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APPARATUS, SYSTEMS AND METHODS FOR PROCESSING SIGNALS BETWEEN A TESTER AND A PLURALITY OF DEVICES UNDER TEST AT HIGH TEMPERATURES AND WITH SINGLE TOUCHDOWN OF A PROBE ARRAY
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Patent #:
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Issue Dt:
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12/14/2010
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Application #:
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11432176
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Filing Dt:
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05/11/2006
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Publication #:
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Pub Dt:
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11/15/2007
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Title:
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GRAPHICALLY EXTENSIBLE, HARDWARE INDEPENDENT METHOD TO INSPECT AND MODIFY STATE OF TEST EQUIPMENT
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Patent #:
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Issue Dt:
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09/15/2009
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Application #:
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11435064
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Filing Dt:
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05/15/2006
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Publication #:
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Pub Dt:
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11/15/2007
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Title:
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RE-CONFIGURABLE ARCHITECTURE FOR AUTOMATED TEST EQUIPMENT
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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11443732
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Filing Dt:
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05/31/2006
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Publication #:
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Pub Dt:
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12/06/2007
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Title:
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MAPPING LOGIC FOR CONTROLLING LOADING OF THE SELECT RAM OF AN ERROR DATA CROSSBAR MULTIPLEXER
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Patent #:
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Issue Dt:
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12/02/2008
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Application #:
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11444645
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Filing Dt:
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05/31/2006
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Publication #:
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Pub Dt:
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12/27/2007
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Title:
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METHOD AND APPARATUS FOR A PADDLE BOARD PROBE CARD
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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11445368
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Filing Dt:
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06/01/2006
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Publication #:
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Pub Dt:
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01/18/2007
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Title:
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METHOD FOR ADJUSTING SIGNAL GENERATOR AND SIGNAL GENERATOR
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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11447646
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Filing Dt:
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06/06/2006
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Publication #:
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Pub Dt:
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10/26/2006
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Title:
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METHODS FOR SAMPLING EQUIPMENT AND FLUID CONDITIONS
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Patent #:
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Issue Dt:
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01/22/2008
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Application #:
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11460277
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Filing Dt:
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07/27/2006
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Publication #:
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Pub Dt:
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01/31/2008
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Title:
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ELECTRICAL COUPLING APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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08/30/2011
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Application #:
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11481593
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Filing Dt:
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07/06/2006
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Publication #:
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Pub Dt:
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11/09/2006
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Title:
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SOURCE SYNCHRONOUS TIMING EXTRACTION, CYCLIZATION AND SAMPLING
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11489190
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Filing Dt:
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07/19/2006
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Publication #:
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Pub Dt:
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02/01/2007
| | | | |
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Title:
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METHOD AND SYSTEM FOR DIGITAL TO ANALOG CONVERSION USING MULTI-PURPOSE CURRENT SUMMATION
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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11489431
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Filing Dt:
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07/19/2006
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Publication #:
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Pub Dt:
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02/01/2007
| | | | |
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Title:
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DIGITAL TO ANALOG CONVERSION USING SUMMATION OF MULTIPLE DACS
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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11518766
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Filing Dt:
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09/11/2006
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Publication #:
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Pub Dt:
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03/22/2007
| | | | |
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Title:
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METHOD AND AN APPARATUS FOR MEASURING THE INPUT THRESHOLD LEVEL OF DEVICE UNDER TEST
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Patent #:
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Issue Dt:
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05/27/2008
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Application #:
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11525731
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Filing Dt:
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09/22/2006
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Publication #:
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Pub Dt:
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04/17/2008
| | | | |
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Title:
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WAFER TEST HEAD ARCHITECTURE AND METHOD OF USE
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Patent #:
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Issue Dt:
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02/24/2009
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Application #:
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11534082
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Filing Dt:
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09/21/2006
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Publication #:
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Pub Dt:
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01/25/2007
| | | | |
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Title:
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ELECTRICAL TEST CIRCUIT WITH ACTIVE-LOAD AND OUTPUT SAMPLING CAPABILITY
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11535909
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Filing Dt:
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09/27/2006
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Publication #:
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Pub Dt:
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03/27/2008
| | | | |
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Title:
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Automatic Test Equipment Receiving Diagnostic Information from Devices with Built-in Self Test
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Patent #:
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Issue Dt:
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09/14/2010
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Application #:
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11535973
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Filing Dt:
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09/27/2006
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Publication #:
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Pub Dt:
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04/17/2008
| | | | |
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Title:
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DIAGNOSTIC INFORMATION CAPTURE FROM LOGIC DEVICES WITH BUILT-IN SELF TEST
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11535974
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Filing Dt:
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09/27/2006
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Publication #:
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Pub Dt:
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03/27/2008
| | | | |
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Title:
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Diagnostic Information Capture from Memory Devices with Built-in Self Test
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Patent #:
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Issue Dt:
|
05/31/2011
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Application #:
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11552110
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Filing Dt:
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10/23/2006
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Publication #:
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Pub Dt:
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03/01/2007
| | | | |
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Title:
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CONSTRUCTION STRUCTURES AND MANUFACTURING PROCESSES FOR INTEGRATED CIRCUIT WAFER PROBE CARD ASSEMBLIES
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Patent #:
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Issue Dt:
|
07/22/2008
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Application #:
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11555603
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Filing Dt:
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11/01/2006
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Publication #:
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Pub Dt:
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03/15/2007
| | | | |
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Title:
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MASSIVELY PARALLEL INTERFACE FOR ELECTRONIC CIRCUIT
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|
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Patent #:
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Issue Dt:
|
08/23/2011
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Application #:
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11563612
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Filing Dt:
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11/27/2006
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Publication #:
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Pub Dt:
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05/29/2008
| | | | |
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Title:
|
SYSTEM AND METHOD FOR DEVICE PERFORMANCE CHARACTERIZATION IN PHYSICAL AND LOGICAL DOMAINS WITH AC SCAN TESTING
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|
|
|
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Patent #:
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|
Issue Dt:
|
05/28/2013
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Application #:
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11565616
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Filing Dt:
|
11/30/2006
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Publication #:
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Pub Dt:
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05/01/2008
| | | | |
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Title:
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PROCESS FOR IMPROVING DESIGN LIMITED YIELD BY EFFICIENTLY CAPTURING AND STORING PRODUCTION TEST DATA FOR ANALYSIS USING CHECKSUMS, HASH VALUES, OR DIGITAL FAULT SIGNATURES
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Patent #:
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|
Issue Dt:
|
05/04/2010
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Application #:
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11589465
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Filing Dt:
|
10/30/2006
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|
Publication #:
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Pub Dt:
|
05/01/2008
| | | | |
|
Title:
|
ATE ARCHITECTURE AND METHOD FOR DFT ORIENTED TESTING
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/08/2010
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Application #:
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11595640
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Filing Dt:
|
11/08/2006
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|
Publication #:
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Pub Dt:
|
05/08/2008
| | | | |
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Title:
|
SYSTEM AND METHOD FOR FREQUENCY OFFSET TESTING
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|
|
|
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Patent #:
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|
Issue Dt:
|
06/30/2009
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Application #:
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11603390
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Filing Dt:
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11/22/2006
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Publication #:
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Pub Dt:
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03/29/2007
| | | | |
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Title:
|
METHOD OF MANUFACTURING A PCB HAVING IMPROVED COOLING
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Patent #:
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|
Issue Dt:
|
07/28/2009
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Application #:
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11609899
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Filing Dt:
|
12/12/2006
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Publication #:
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Pub Dt:
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06/12/2008
| | | | |
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Title:
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PROCESS FOR IDENTIFYING THE LOCATION OF A BREAK IN A SCAN CHAIN IN REAL TIME
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Patent #:
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Issue Dt:
|
11/18/2008
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Application #:
|
11636096
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Filing Dt:
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12/08/2006
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Publication #:
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Pub Dt:
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06/12/2008
| | | | |
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Title:
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INTERCONNECT ASSEMBLIES, AND METHODS OF FORMING INTERCONNECTS, BETWEEN CONDUCTIVE CONTACT BUMPS AND CONDUCTIVE CONTACT PADS
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Patent #:
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NONE
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Issue Dt:
|
|
Application #:
|
11636244
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Filing Dt:
|
12/08/2006
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Publication #:
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Pub Dt:
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06/12/2008
| | | | |
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Title:
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Interconnect assemblies, and methods of forming interconnects
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Patent #:
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|
Issue Dt:
|
03/10/2009
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Application #:
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11638819
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Filing Dt:
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12/14/2006
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Publication #:
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Pub Dt:
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06/19/2008
| | | | |
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Title:
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LIQUID COOLED DUT CARD INTERFACE FOR WAFER SORT PROBING
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Patent #:
|
|
Issue Dt:
|
06/02/2009
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Application #:
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11639010
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Filing Dt:
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12/14/2006
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Publication #:
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Pub Dt:
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06/19/2008
| | | | |
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Title:
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FORCED AIR COOLING OF COMPONENTS ON A PROBECARD
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Patent #:
|
|
Issue Dt:
|
10/26/2010
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Application #:
|
11639769
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Filing Dt:
|
12/15/2006
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|
Publication #:
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Pub Dt:
|
06/19/2008
| | | | |
|
Title:
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METHOD AND APPARATUS FOR IMPROVING LOAD TIME FOR AUTOMATED TEST EQUIPMENT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2010
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Application #:
|
11639770
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Filing Dt:
|
12/15/2006
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|
Publication #:
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Pub Dt:
|
06/19/2008
| | | | |
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Title:
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AUTOMATED LOADER FOR REMOVING AND INSERTING REMOVABLE DEVICES TO IMPROVE LOAD TIME FOR AUTOMATED TEST EQUIPMENT
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|
|
|
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Patent #:
|
|
Issue Dt:
|
02/19/2013
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Application #:
|
11647118
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Filing Dt:
|
12/28/2006
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|
Publication #:
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Pub Dt:
|
06/28/2007
| | | | |
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Title:
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EVALUATION OF AN OUTPUT SIGNAL OF A DEVICE UNDER TEST
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|
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Patent #:
|
|
Issue Dt:
|
01/19/2010
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Application #:
|
11680134
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Filing Dt:
|
02/28/2007
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|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
|
Title:
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APPARATUS FOR LOCATING A DEFECT IN A SCAN CHAIN WHILE TESTING DIGITAL LOGIC
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2013
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Application #:
|
11682314
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Filing Dt:
|
03/06/2007
|
|
Publication #:
|
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Pub Dt:
|
04/17/2008
| | | | |
|
Title:
|
PROCESS FOR IMPROVING DESIGN-LIMITED YIELD BY LOCALIZING POTENTIAL FAULTS FROM PRODUCTION TEST DATA
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2009
|
Application #:
|
11684446
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Filing Dt:
|
03/09/2007
|
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR TESTING A CIRCUIT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
11685866
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Filing Dt:
|
03/14/2007
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2008
| | | | |
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Title:
|
SOLID HIGH ASPECT RATIO VIA HOLE USED FOR BURN-IN BOARDS, WAFER SORT PROBE CARDS, AND PACKAGE TEST LOAD BOARDS WITH ELECTRONIC CIRCUITRY
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
11685873
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Filing Dt:
|
03/14/2007
|
|
Title:
|
HIGH VOLTAGE, HIGH FREQUENCY, HIGH RELIABILITY, HIGH DENSITY, HIGH TEMPERATURE AUTOMATED TEST EQUIPMENT (ATE) SWITCH DESIGN
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|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2010
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Application #:
|
11688757
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Filing Dt:
|
03/20/2007
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|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
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Title:
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SYSTEM. METHOD AND APPARATUS USING AT LEAST ONE FLEX CIRCUIT TO CONNECT A PRINTED CIRCUIT BOARD AND A SOCKET CARD ASSEMBLY THAT ARE ORIENTED AT A RIGHT ANGLE TO ONE ANOTHER
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Patent #:
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Issue Dt:
|
08/03/2010
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Application #:
|
11689585
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Filing Dt:
|
03/22/2007
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Publication #:
|
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Pub Dt:
|
08/14/2008
| | | | |
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Title:
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HIGH IMPEDANCE, HIGH PARALLELISM, HIGH TEMPERATURE MEMORY TEST SYSTEM ARCHITECTURE
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|
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Patent #:
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Issue Dt:
|
04/19/2011
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Application #:
|
11724448
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Filing Dt:
|
03/15/2007
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|
Publication #:
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Pub Dt:
|
10/25/2007
| | | | |
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Title:
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FEATURE-ORIENTED TEST PROGRAM DEVELOPMENT AND EXECUTION
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|
|
|
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Patent #:
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|
Issue Dt:
|
04/27/2010
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Application #:
|
11726542
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Filing Dt:
|
03/22/2007
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|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR ELECTRONIC TESTING OF MULTIPLE MEMORY DEVICES
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|
|
|
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Patent #:
|
|
Issue Dt:
|
05/03/2011
|
Application #:
|
11734187
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Filing Dt:
|
04/11/2007
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|
Publication #:
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Pub Dt:
|
08/16/2007
| | | | |
|
Title:
|
CLAMP AND METHOD FOR OPERATING SAME
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11735871
|
Filing Dt:
|
04/16/2007
|
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Publication #:
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