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Reel/Frame:	028138/0895			Pages:	22
		Recorded:	02/28/2012
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 52

1

Patent #:	8263984	Issue Dt:	09/11/2012	Application #:	12310345	Filing Dt:	02/20/2009
Publication #:	US20100012947	Pub Dt:	01/21/2010
Title:	PROCESS FOR MAKING A GAN SUBSTRATE

2

Patent #:	8273636	Issue Dt:	09/25/2012	Application #:	12312017	Filing Dt:	11/24/2009
Publication #:	US20110097871	Pub Dt:	04/28/2011
Title:	PROCESS FOR THE TRANSFER OF A THIN LAYER FORMED IN A SUBSTRATE WITH VACANCY CLUSTERS

3

Patent #:	8309437	Issue Dt:	11/13/2012	Application #:	12450295	Filing Dt:	09/18/2009
Publication #:	US20100038756	Pub Dt:	02/18/2010
Title:	(110) ORIENTED SILICON SUBSTRATE AND A BONDED PAIR OF SUBSTRATES COMPRISING SAID (110) ORIENTED SILICON SUBSTRATE

4

Patent #:	8105916	Issue Dt:	01/31/2012	Application #:	12463873	Filing Dt:	05/11/2009
Publication #:	US20100025728	Pub Dt:	02/04/2010
Title:	RELAXATION AND TRANSFER OF STRAINED LAYERS

5

Patent #:	8367520	Issue Dt:	02/05/2013	Application #:	12563327	Filing Dt:	09/21/2009
Publication #:	US20100072576	Pub Dt:	03/25/2010
Title:	METHODS AND STRUCTURES FOR ALTERING STRAIN IN III-NITRIDE MATERIALS

6

Patent #:	8278193	Issue Dt:	10/02/2012	Application #:	12576116	Filing Dt:	10/08/2009
Publication #:	US20100109126	Pub Dt:	05/06/2010
Title:	METHODS OF FORMING LAYERS OF SEMICONDUCTOR MATERIAL HAVING REDUCED LATTICE STRAIN, SEMICONDUCTOR STRUCTURES, DEVICES AND ENGINEERED SUBSTRATES INCLUDING SAME

7

Patent #:	8461055	Issue Dt:	06/11/2013	Application #:	12598403	Filing Dt:	02/25/2010
Publication #:	US20100140746	Pub Dt:	06/10/2010
Title:	IMPROVED PROCESS FOR PREPARING CLEANED SURFACES OF STRAINED SILICON

8

Patent #:	8679942	Issue Dt:	03/25/2014	Application #:	12610065	Filing Dt:	10/30/2009
Publication #:	US20100127353	Pub Dt:	05/27/2010
Title:	STRAIN ENGINEERED COMPOSITE SEMICONDUCTOR SUBSTRATES AND METHODS OF FORMING SAME

9

Patent #:	NONE	Issue Dt:		Application #:	12610092	Filing Dt:	10/30/2009
Publication #:	US20100187568	Pub Dt:	07/29/2010
Title:	EPITAXIAL METHODS AND STRUCTURES FOR FORMING SEMICONDUCTOR MATERIALS

10

Patent #:	8324075	Issue Dt:	12/04/2012	Application #:	12663254	Filing Dt:	12/04/2009
Publication #:	US20100181653	Pub Dt:	07/22/2010
Title:	METHODS FOR RECYCLING SUBSTRATES AND FABRICATING LAMINATED WAFERS

11

Patent #:	NONE	Issue Dt:		Application #:	12678978	Filing Dt:	05/28/2010
Publication #:	US20100244203	Pub Dt:	09/30/2010
Title:	SEMICONDUCTOR STRUCTURE HAVING A PROTECTIVE LAYER

12

Patent #:	8476148	Issue Dt:	07/02/2013	Application #:	12712938	Filing Dt:	02/25/2010
Publication #:	US20100279487	Pub Dt:	11/04/2010
Title:	METHOD FOR TRANSFERRING A LAYER FROM A DONOR SUBSTRATE ONTO A HANDLE SUBSTRATE

13

Patent #:	8058158	Issue Dt:	11/15/2011	Application #:	12726800	Filing Dt:	03/18/2010
Publication #:	US20100289113	Pub Dt:	11/18/2010
Title:	HYBRID SEMICONDUCTOR SUBSTRATE INCLUDING SEMICONDUCTOR-ON-INSULATOR REGION AND METHOD OF MAKING THE SAME

14

Patent #:	8153504	Issue Dt:	04/10/2012	Application #:	12742424	Filing Dt:	05/11/2010
Publication #:	US20100323496	Pub Dt:	12/23/2010
Title:	PROCESS FOR MANUFACTURING A COMPOSITE SUBSTRATE

15

Patent #:	8420548	Issue Dt:	04/16/2013	Application #:	12808353	Filing Dt:	06/15/2010
Publication #:	US20100267244	Pub Dt:	10/21/2010
Title:	METHOD FOR TREATING GERMANIUM SURFACES AND SOLUTIONS TO BE EMPLOYED THEREIN

16

Patent #:	8530334	Issue Dt:	09/10/2013	Application #:	12811203	Filing Dt:	06/29/2010
Publication #:	US20100285213	Pub Dt:	11/11/2010
Title:	PROCESS OF TREATING DEFECTS DURING THE BONDING OF WAFERS

17

Patent #:	NONE	Issue Dt:		Application #:	12814936	Filing Dt:	06/14/2010
Publication #:	US20110305835	Pub Dt:	12/15/2011
Title:	SYSTEMS AND METHODS FOR A GAS TREATMENT OF A NUMBER OF SUBSTRATES

18

Patent #:	9070818	Issue Dt:	06/30/2015	Application #:	12820326	Filing Dt:	06/22/2010
Publication #:	US20110011450	Pub Dt:	01/20/2011
Title:	METHODS AND STRUCTURES FOR BONDING ELEMENTS

19

Patent #:	8481406	Issue Dt:	07/09/2013	Application #:	12837326	Filing Dt:	07/15/2010
Publication #:	US20120013012	Pub Dt:	01/19/2012
Title:	METHODS OF FORMING BONDED SEMICONDUCTOR STRUCTURES

20

Patent #:	8461017	Issue Dt:	06/11/2013	Application #:	12839203	Filing Dt:	07/19/2010
Publication #:	US20120013013	Pub Dt:	01/19/2012
Title:	Methods of forming bonded semiconductor structures using a temporary carrier having a weakened ion implant region for subsequent separation along the weakened region

21

Patent #:	8505197	Issue Dt:	08/13/2013	Application #:	12851227	Filing Dt:	08/05/2010
Publication #:	US20110076849	Pub Dt:	03/31/2011
Title:	METHODS OF FABRICATING MULTILAYER SUBSTRATES

22

Patent #:	8535996	Issue Dt:	09/17/2013	Application #:	12865838	Filing Dt:	08/02/2010
Publication #:	US20110012200	Pub Dt:	01/20/2011
Title:	SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER

23

Patent #:	NONE	Issue Dt:		Application #:	12879637	Filing Dt:	09/10/2010
Publication #:	US20120061794	Pub Dt:	03/15/2012
Title:	METHODS OF FORMING THROUGH WAFER INTERCONNECTS IN SEMICONDUCTOR STRUCTURES USING SACRIFICIAL MATERIAL, AND SEMICONDUCTOR STRUCTURES FORMED BY SUCH METHODS

24

Patent #:	8114754	Issue Dt:	02/14/2012	Application #:	12890220	Filing Dt:	09/24/2010
Publication #:	US20110114965	Pub Dt:	05/19/2011
Title:	METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES AND DEVICES USING GLASS BONDING LAYERS, AND SEMICONDUCTOR STRUCTURES AND DEVICES FORMED BY SUCH METHODS

25

Patent #:	8486192	Issue Dt:	07/16/2013	Application #:	12894724	Filing Dt:	09/30/2010
Publication #:	US20120083100	Pub Dt:	04/05/2012
Title:	THERMALIZING GAS INJECTORS FOR GENERATING INCREASED PRECURSOR GAS, MATERIAL DEPOSITION SYSTEMS INCLUDING SUCH INJECTORS, AND RELATED METHODS

26

Patent #:	8133806	Issue Dt:	03/13/2012	Application #:	12895311	Filing Dt:	09/30/2010
Publication #:	US20120083101	Pub Dt:	04/05/2012
Title:	SYSTEMS AND METHODS FOR FORMING SEMICONDUCTOR MATERIALS BY ATOMIC LAYER DEPOSITION

27

Patent #:	9048169	Issue Dt:	06/02/2015	Application #:	12935857	Filing Dt:	09/30/2010
Publication #:	US20110057294	Pub Dt:	03/10/2011
Title:	FORMATION OF SUBSTANTIALLY PIT FREE INDIUM GALLIUM NITRIDE

28

Patent #:	8163570	Issue Dt:	04/24/2012	Application #:	12936639	Filing Dt:	11/15/2010
Publication #:	US20110045611	Pub Dt:	02/24/2011
Title:	METHOD OF INITIATING MOLECULAR BONDING

29

Patent #:	NONE	Issue Dt:		Application #:	12937920	Filing Dt:	04/05/2011
Publication #:	US20110183493	Pub Dt:	07/28/2011
Title:	PROCESS FOR MANUFACTURING A STRUCTURE COMPRISING A GERMANIUM LAYER ON A SUBSTRATE

30

Patent #:	8778773	Issue Dt:	07/15/2014	Application #:	12970422	Filing Dt:	12/16/2010
Publication #:	US20120153484	Pub Dt:	06/21/2012
Title:	METHODS FOR DIRECTLY BONDING TOGETHER SEMICONDUCTOR STRUCTURES, AND BONDED SEMICONDUCTOR STRUCTURES FORMED USING SUCH METHODS

31

Patent #:	8637383	Issue Dt:	01/28/2014	Application #:	12977999	Filing Dt:	12/23/2010
Publication #:	US20120161289	Pub Dt:	06/28/2012
Title:	STRAIN RELAXATION USING METAL MATERIALS AND RELATED STRUCTURES

32

Patent #:	8436363	Issue Dt:	05/07/2013	Application #:	13020288	Filing Dt:	02/03/2011
Publication #:	US20120199845	Pub Dt:	08/09/2012
Title:	METALLIC CARRIER FOR LAYER TRANSFER AND METHODS FOR FORMING THE SAME

33

Patent #:	8975165	Issue Dt:	03/10/2015	Application #:	13029213	Filing Dt:	02/17/2011
Publication #:	US20120211870	Pub Dt:	08/23/2012
Title:	III-V SEMICONDUCTOR STRUCTURES WITH DIMINISHED PIT DEFECTS AND METHODS FOR FORMING THE SAME

34

Patent #:	8148252	Issue Dt:	04/03/2012	Application #:	13038920	Filing Dt:	03/02/2011
Title:	METHODS OF FORMING III/V SEMICONDUCTOR MATERIALS, AND SEMICONDUCTOR STRUCTURES FORMED USING SUCH METHODS

35

Patent #:	8298916	Issue Dt:	10/30/2012	Application #:	13043088	Filing Dt:	03/08/2011
Publication #:	US20110230003	Pub Dt:	09/22/2011
Title:	PROCESS FOR FABRICATING A MULTILAYER STRUCTURE WITH POST-GRINDING TRIMMING

36

Patent #:	8765508	Issue Dt:	07/01/2014	Application #:	13060398	Filing Dt:	02/23/2011
Publication #:	US20110156212	Pub Dt:	06/30/2011
Title:	METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES OR DEVICES USING LAYERS OF SEMICONDUCTOR MATERIAL HAVING SELECTED OR CONTROLLED LATTICE PARAMETERS

37

Patent #:	8377802	Issue Dt:	02/19/2013	Application #:	13069900	Filing Dt:	03/23/2011
Publication #:	US20110284863	Pub Dt:	11/24/2011
Title:	III-V SEMICONDUCTOR STRUCTURES AND METHODS FOR FORMING THE SAME

38

Patent #:	8716105	Issue Dt:	05/06/2014	Application #:	13076745	Filing Dt:	03/31/2011
Publication #:	US20120252189	Pub Dt:	10/04/2012
Title:	METHODS FOR BONDING SEMICONDUCTOR STRUCTURES INVOLVING ANNEALING PROCESSES, AND BONDED SEMICONDUCTOR STRUCTURES AND INTERMEDIATE STRUCTURES FORMED USING SUCH METHODS

39

Patent #:	NONE	Issue Dt:		Application #:	13077292	Filing Dt:	03/31/2011
Publication #:	US20120248621	Pub Dt:	10/04/2012
Title:	METHODS OF FORMING BONDED SEMICONDUCTOR STRUCTURES, AND SEMICONDUCTOR STRUCTURES FORMED BY SUCH METHODS

40

Patent #:	8338294	Issue Dt:	12/25/2012	Application #:	13077364	Filing Dt:	03/31/2011
Publication #:	US20120248622	Pub Dt:	10/04/2012
Title:	METHODS OF FORMING BONDED SEMICONDUCTOR STRUCTURES INCLUDING TWO OR MORE PROCESSED SEMICONDUCTOR STRUCTURES CARRIED BY A COMMON SUBSTRATE, AND SEMICONDUCTOR STRUCTURES FORMED BY SUCH METHODS

41

Patent #:	NONE	Issue Dt:		Application #:	13123180	Filing Dt:	04/07/2011
Publication #:	US20110195560	Pub Dt:	08/11/2011
Title:	METHOD OF PRODUCING A SILICON-ON-SAPPHIRE TYPE HETEROSTRUCTURE

42

Patent #:	NONE	Issue Dt:		Application #:	13126376	Filing Dt:	04/27/2011
Publication #:	US20110193201	Pub Dt:	08/11/2011
Title:	METHOD TO FABRICATE AND TREAT A STRUCTURE OF SEMICONDUCTOR-ON-INSULATOR TYPE, ENABLING DISPLACEMENT OF DISLOCATIONS, AND CORRESPONDING STRUCTURE

43

Patent #:	NONE	Issue Dt:		Application #:	13133118	Filing Dt:	06/08/2011
Publication #:	US20110233719	Pub Dt:	09/29/2011
Title:	METHODS FOR TESTING SEMICONDUCTOR-ON-INSULATOR TYPE SUBSTRATES

44

Patent #:	8614501	Issue Dt:	12/24/2013	Application #:	13143038	Filing Dt:	06/30/2011
Publication #:	US20110278597	Pub Dt:	11/17/2011
Title:	METHOD OF PRODUCING A LAYER OF CAVITIES

45

Patent #:	8507332	Issue Dt:	08/13/2013	Application #:	13143170	Filing Dt:	07/01/2011
Publication #:	US20110266651	Pub Dt:	11/03/2011
Title:	METHOD FOR MANUFACTURING COMPONENTS

46

Patent #:	8785293	Issue Dt:	07/22/2014	Application #:	13147749	Filing Dt:	08/03/2011
Publication #:	US20110294245	Pub Dt:	12/01/2011
Title:	ADAPTATION OF THE LATTICE PARAMETER OF A LAYER OF STRAINED MATERIAL

47

Patent #:	8697493	Issue Dt:	04/15/2014	Application #:	13185044	Filing Dt:	07/18/2011
Publication #:	US20130020704	Pub Dt:	01/24/2013
Title:	BONDING SURFACES FOR DIRECT BONDING OF SEMICONDUCTOR STRUCTURES

48

Patent #:	9041165	Issue Dt:	05/26/2015	Application #:	13201365	Filing Dt:	08/12/2011
Publication #:	US20110291247	Pub Dt:	12/01/2011
Title:	RELAXATION AND TRANSFER OF STRAINED MATERIAL LAYERS

49

Patent #:	8728863	Issue Dt:	05/20/2014	Application #:	13206242	Filing Dt:	08/09/2011
Publication #:	US20130037959	Pub Dt:	02/14/2013
Title:	METHODS OF FORMING BONDED SEMICONDUCTOR STRUCTURES INCLUDING INTERCONNECT LAYERS HAVING ONE OR MORE OF ELECTRICAL, OPTICAL, AND FLUIDIC INTERCONNECTS THEREIN, AND BONDED SEMICONDUCTOR STRUCTURES FORMED USING SUCH METHODS

50

Patent #:	8617925	Issue Dt:	12/31/2013	Application #:	13206280	Filing Dt:	08/09/2011
Publication #:	US20130037960	Pub Dt:	02/14/2013
Title:	METHODS OF FORMING BONDED SEMICONDUCTOR STRUCTURES IN 3D INTEGRATION PROCESSES USING RECOVERABLE SUBSTRATES, AND BONDED SEMICONDUCTOR STRUCTURES FORMED BY SUCH METHODS

51

Patent #:	8842945	Issue Dt:	09/23/2014	Application #:	13206299	Filing Dt:	08/09/2011
Publication #:	US20130039615	Pub Dt:	02/14/2013
Title:	METHODS OF FORMING THREE DIMENSIONALLY INTEGRATED SEMICONDUCTOR SYSTEMS INCLUDING PHOTOACTIVE DEVICES AND SEMICONDUCTOR-ON-INSULATOR SUBSTRATES

52

Patent #:	8932938	Issue Dt:	01/13/2015	Application #:	13255670	Filing Dt:	10/18/2011
Publication #:	US20120028440	Pub Dt:	02/02/2012
Title:	METHOD OF FABRICATING A MULTILAYER STRUCTURE WITH CIRCUIT LAYER TRANSFER

Assignors

1

S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES

Exec Dt:

09/06/2011

2

CHEMIN DES FRANQUES

Exec Dt:

09/06/2011

3

PARC TECHNOLOGIES DES FONTAINES

Exec Dt:

09/06/2011

4

BERNIN. FRANCE 38190

Exec Dt:

09/06/2011

Assignee

1

CHEMIN DES FRANGUES

PARC TECHNOLOGIQUE DES FONTAINES

BERNIN, FRANCE 38190

Correspondence name and address
	TRASKBRITT
	P.O. BOX 2550
	SALT LAKE CITY, UT 84110-2550

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