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Reel/Frame:028546/0232   Pages: 8
Recorded: 07/13/2012
Attorney Dkt #:NVDA/SC-11-0314-US1
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
12/06/2016
Application #:
13462649
Filing Dt:
05/02/2012
Publication #:
Pub Dt:
11/07/2013
Title:
TECHNIQUE FOR COMPUTATIONAL NESTED PARALLELISM
Assignors
1
Exec Dt:
05/02/2012
2
Exec Dt:
05/02/2012
3
Exec Dt:
06/30/2012
4
Exec Dt:
05/02/2012
5
Exec Dt:
05/02/2012
6
Exec Dt:
05/02/2012
7
Exec Dt:
05/03/2012
Assignee
1
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CALIFORNIA 95050
Correspondence name and address
PATTERSON & SHERIDAN, LLP/NVIDIA
3040 POST OAK BLVD.
SUITE 1500
HOUSTON, TX 77056

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