Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 028724/0270 | |
| Pages: | 4 |
| | Recorded: | 08/01/2012 | | |
| Attorney Dkt #: | TIPI 5.2-029 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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06/20/2000
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Application #:
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09076608
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Filing Dt:
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05/12/1998
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Title:
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METHOD AND STRUCTURE FOR CONTROLLING OPERATION OF A DRAM ARRAY
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Patent #:
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Issue Dt:
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11/27/2001
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Application #:
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09267228
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Filing Dt:
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03/12/1999
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Title:
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HIGH-SPEED READ-WRITE CIRCUITRY FOR SEMI-CONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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11/14/2000
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Application #:
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09517609
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Filing Dt:
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03/02/2000
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Title:
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Clock phase generator for controlling operation of a dram array
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09656882
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Filing Dt:
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09/07/2000
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Title:
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Method for generating a clock phase signal for controlling operation of a dram array
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Patent #:
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Issue Dt:
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03/30/2004
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Application #:
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09963984
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Filing Dt:
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09/25/2001
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Publication #:
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Pub Dt:
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02/07/2002
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Title:
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HIGH-SPEED READ-WRITE CIRCUITRY FOR SEMI-CONDUCTOR MEMORY DEVICES
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Assignee
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| 2702 ORCHARD PARKWAY |
| SAN JOSE, CALIFORNIA 95134 |
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Correspondence name and address
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DARYL K. NEFF
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LERNER, DAVID, LITTENBERG, KRUMHOLZ &
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MENTLIK, LLP
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600 SOUTH AVENUE WEST
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WESTFIELD, NJ 07090
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