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Reel/Frame:029008/0626   Pages: 4
Recorded: 09/22/2012
Attorney Dkt #:4717-39800
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
02/25/2014
Application #:
13487066
Filing Dt:
06/01/2012
Publication #:
Pub Dt:
12/20/2012
Title:
METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAVING LOW ELECTRICAL LOSSES, AND CORRESPONDING STRUCTURE
Assignors
1
Exec Dt:
06/07/2012
2
Exec Dt:
05/23/2012
3
Exec Dt:
08/29/2012
Assignee
1
PARC TECHNOLOGIQUE DES FONTAINES
CHEMIN DES FRANQUES
38190 BERNIN, FRANCE
Correspondence name and address
WINSTON & STRAWN LLP - ALLAN A. FANUCCI
1700 K STREET, N.W.
PATENT DEPARTMENT
WASHINGTON, DC 20006-3817

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