Patent Assignment Details
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Reel/Frame: | 029058/0119 | |
| Pages: | 4 |
| | Recorded: | 09/28/2012 | | |
Attorney Dkt #: | 6257-67000 |
Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 013772 FRAME 0939. ASSIGNOR(S) HEREBY CONFIRMS THE NAME OF THE ASSIGNOR IS PHILIPS SEMICONDUCTORS INC. |
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Total properties:
1
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09021679
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Filing Dt:
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02/10/1998
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Title:
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REDUCED INSTRUCTION FETCH LATENCY IN A SYSTEM INCLUDING A PIPELINED PROCESSOR
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Assignee
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GROENEWOUDSEWEG 1 |
EINDHOVEN, NETHERLANDS 5621 BA |
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Correspondence name and address
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DAWN DELUCA
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1120 SOUTH CAPITAL OF TEXAS HIGHWAY
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BUILDING 2, SUITE 300
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AUSTIN, TX 78746
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