Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 029522/0886 | |
| Pages: | 2 |
| | Recorded: | 12/21/2012 | | |
| Attorney Dkt #: | AQA007 US / AQA008 US |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
2
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Patent #:
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Issue Dt:
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08/13/2013
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Application #:
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13371323
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Filing Dt:
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02/10/2012
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Publication #:
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Pub Dt:
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08/02/2012
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Title:
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CIRCUIT SUBSTRATE AND METHOD OF MANUFACTURING SAME
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13418134
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Filing Dt:
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03/12/2012
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Publication #:
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Pub Dt:
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02/07/2013
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Title:
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WAFER LEVEL PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
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Assignee
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| 13-11 OMORI-KITA 2-CHOME, OTA-KU |
| TOKYO, JAPAN 1438580 |
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Correspondence name and address
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SILICON VALLEY PATENT GROUP LLP
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4010 MOORPARK AVENUE
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SUITE 210
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SAN JOSE, CA 95117
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