Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 030095/0160 | |
| Pages: | 2 |
| | Recorded: | 02/22/2013 | | |
Conveyance: | PLEASE RECORD TO CORRECT ASSIGNEE'S LOCATION TO SPECIFY:FUJITSU SEMICONDUCTOR LIMITED 2-10-23 SHIN-YOKOHAMA,KOHOKU-KU,YOKOHAMA-SHI,KANAGAWA 222-0033 JAPAN,PREVIOUSLY RECORDED AT REEL 029860,FRAME 0977. |
|
Total properties:
1
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2013
|
Application #:
|
13742638
|
Filing Dt:
|
01/16/2013
|
Publication #:
|
|
Pub Dt:
|
07/25/2013
| | | | |
Title:
|
HIGH-LEVEL SYNTHESIS DEVICE, HIGH-LEVEL SYNTHESIS METHOD, HIGH-LEVEL SYNTHESIS PROGRAM, AND INTEGRATED CIRCUIT DESIGN METHOD
|
|
Assignee
|
|
|
2-10-23 SHIN-YOKOHAMA, |
KOHOKU-KU, YOKOHAMA-SHI, |
KANAGAWA 222-0033, JAPAN |
|
Correspondence name and address
|
|
STAAS & HALSEY LLP
|
|
ATTENTION: GENE M. GARNER, II
|
|
1201 NEW YORK AVE., N.W., 7TH FLOOR
|
|
WASHINGTON, D.C. 20005
|
Search Results as of:
05/11/2024 12:20 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|