Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 030490/0949 | |
| Pages: | 11 |
| | Recorded: | 05/21/2013 | | |
| Attorney Dkt #: | TIPI 5.2-038 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
7
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Patent #:
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Issue Dt:
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11/02/2010
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Application #:
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11569144
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Filing Dt:
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11/15/2006
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Publication #:
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Pub Dt:
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08/16/2007
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Title:
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METHOD FOR PROCESSING COPPER SURFACE, METHOD FOR FORMING COPPER PATTERN WIRING AND SEMICONDUCTOR DEVICE MANUFACTURED USING SUCH METHOD
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Patent #:
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Issue Dt:
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08/18/2009
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Application #:
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11576323
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Filing Dt:
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03/29/2007
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Publication #:
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Pub Dt:
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03/13/2008
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Title:
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PACKAGED STACKED SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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11/23/2010
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Application #:
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11911990
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Filing Dt:
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10/19/2007
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Publication #:
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Pub Dt:
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06/04/2009
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Title:
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PACKAGED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE PACKAGED SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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09/13/2011
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Application #:
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12259329
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Filing Dt:
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10/28/2008
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Publication #:
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Pub Dt:
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02/26/2009
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Title:
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METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH ELECTRODE FOR EXTERNAL CONNECTION AND SEMICONDUCTOR DEVICE OBTAINED BY MEANS OF SAID METHOD
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Patent #:
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Issue Dt:
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02/07/2012
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Application #:
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12864125
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Filing Dt:
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07/22/2010
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Publication #:
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Pub Dt:
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11/25/2010
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Title:
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SEMICONDUCTOR CHIP PACKAGE WITH POST ELECTRODES
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Patent #:
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Issue Dt:
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03/19/2013
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Application #:
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12935341
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Filing Dt:
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09/29/2010
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Publication #:
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Pub Dt:
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01/20/2011
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Title:
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ELECTRONIC COMPONENT USED FOR WIRING AND METHOD FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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10/15/2013
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Application #:
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12991143
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Filing Dt:
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11/05/2010
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Publication #:
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Pub Dt:
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03/10/2011
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Title:
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METHOD FOR MANUFACTURING A CHIP-SIZE DOUBLE SIDE CONNECTION PACKAGE
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Assignee
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| NEW PROVIDENCE FINANCIAL CENTER, SUITE 1000 |
| EAST BAY STREET |
| NASSAU, BAHAMAS |
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Correspondence name and address
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DARYL K. NEFF
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LERNER, DAVID, LITTENBERG, KRUMHOLZ &
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MENTLIK, LLP
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600 SOUTH AVENUE WEST
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WESTFIELD, NJ 07090
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