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Reel/Frame:031135/0179   Pages: 14
Recorded: 09/04/2013
Attorney Dkt #:2162.233000
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
9105497
Issue Dt:
08/11/2015
Application #:
14017485
Filing Dt:
09/04/2013
Publication #:
US20150061027
Pub Dt:
03/05/2015
Title:
METHODS OF FORMING GATE STRUCTURES FOR TRANSISTOR DEVICES FOR CMOS APPLICATIONS
Assignors
1
HONG, ZHENDONG
Exec Dt:
08/28/2013
2
TZENG, SUSIE
Exec Dt:
08/23/2013
3
JOSHI, AMOL
Exec Dt:
08/29/2013
4
BODKE, ASHISH
Exec Dt:
08/17/2013
5
PISHAROTY, DIVYA
Exec Dt:
08/21/2013
6
RAGHURAM, USHA
Exec Dt:
08/22/2013
7
KARLSSON, OLOV
Exec Dt:
08/25/2013
8
CHOI, KISIK
Exec Dt:
08/21/2013
9
MUJUMDAR, SALIL
Exec Dt:
08/21/2013
10
BESSER, PAUL R.
Exec Dt:
08/20/2013
11
LIU, JINPING
Exec Dt:
08/21/2013
12
KIM, HOON
Exec Dt:
08/26/2013
Assignee
1
GLOBALFOUNDRIES INC.
MAPLES CORPORATE SERVICES LIMITED
PO BOX 309, UGLAND HOUSE
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
J. MIKE AMERSON
10333 RICHMOND, SUITE 1100
HOUSTON, TX 77042

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