Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 031402/0355 | |
| Pages: | 3 |
| | Recorded: | 10/15/2013 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
Total properties:
1
|
|
Patent #:
|
|
Issue Dt:
|
05/30/2006
|
Application #:
|
10914807
|
Filing Dt:
|
08/10/2004
|
Publication #:
|
|
Pub Dt:
|
08/11/2005
| | | | |
Title:
|
LOGIC-IN-MEMORY CIRCUIT USING MAGNETORESISTIVE ELEMENT
|
|
Assignee
|
|
|
2-1-1, KATAHIRA, AOBA-KU |
SENDAI-SHI, MIYAGI, JAPAN 980-8577 |
|
Correspondence name and address
|
|
MASARU SATO
|
|
ARIAKE 3-6-11
|
|
TFT BLDG. EAST 3F
|
|
KOUTO-KU, TOKYO, 135-8071 JAPAN
|
Search Results as of:
05/12/2024 06:01 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|