Patent Assignment Details
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| Reel/Frame: | 031803/0116 | |
| Pages: | 2 |
| | Recorded: | 12/17/2013 | | |
| Attorney Dkt #: | ATST-JP0088 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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11/07/2017
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Application #:
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13781337
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Filing Dt:
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02/28/2013
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Publication #:
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Pub Dt:
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08/28/2014
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Title:
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TESTER WITH ACCELERATION FOR PACKET BUILDING WITHIN A FPGA BLOCK
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Assignee
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| 1-32-1 ASAHI-CHO, NERIMA-KU |
| TOKYO, JAPAN 179-0071 |
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Correspondence name and address
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MURABITO HAO & BARNES LLP
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2 NORTH MARKET STREET 3RD FLOOR
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SAN JOSE, CA 95113
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