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Patent #:
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Issue Dt:
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06/20/1995
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Application #:
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08243100
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Filing Dt:
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05/16/1994
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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04/01/1997
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Application #:
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08280933
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Filing Dt:
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07/27/1994
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Title:
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METHOD OF FABRICATING A MICRO-TRENCH STORAGE CAPACITOR
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Patent #:
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Issue Dt:
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03/12/1996
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Application #:
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08281568
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Filing Dt:
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07/28/1994
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Title:
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SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED ISOLATION BETWEEN ELECTRODES, AND PROCESS FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
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06/18/1996
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Application #:
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08292005
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Filing Dt:
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08/17/1994
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Title:
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DYNAMIC RANDOM ACCESS MEMORY DEVICE WITH SENSE AMPLIFIERS SERVING AS CACHE MEMORY INDEPENDENT OF ROW ADDRESS BUFFER UNIT FOR HIGH-SPEED SEQUENTIAL ACCESS
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Patent #:
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Issue Dt:
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12/19/1995
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Application #:
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08317606
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Filing Dt:
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09/29/1994
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Title:
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SEMICONDUCTOR DEVICE HAVING A BOUNDARY SCAN TEST CIRCUIT
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Patent #:
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Issue Dt:
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05/28/1996
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Application #:
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08374990
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Filing Dt:
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01/19/1995
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUITS WITH POWER REDUCTION MECHANISM
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Patent #:
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Issue Dt:
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01/28/1997
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Application #:
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08476765
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Filing Dt:
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06/07/1995
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Title:
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SEMICONDUCTOR MEMORY SYSTEM
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Patent #:
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Issue Dt:
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05/06/1997
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Application #:
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08509235
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Filing Dt:
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07/31/1995
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/10/1998
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Application #:
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08562224
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Filing Dt:
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11/28/1995
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Title:
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PROCESS OF FABRICATING DYNAMIC RANDOM ACCESS MEMORY DEVICE HAVING STORAGE CAPACITOR LOW IN CONTACT RESISTANCE AND SMALL IN LEAKAGE CURRENT THROUGH TANTALUM OXIDE FILM
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Patent #:
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Issue Dt:
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05/13/1997
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Application #:
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08607977
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Filing Dt:
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02/29/1996
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Title:
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DYNAMIC MEMORY DEVICE, A MEMORY MODULE, AND A METHOD OF REFRESHING A DYNAMIC MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/25/1997
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Application #:
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08648673
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Filing Dt:
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05/16/1996
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Title:
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ALIGNMENT ACCURACY CHECK PATTERN
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08712875
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Filing Dt:
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09/12/1996
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Title:
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SEMICONDUCTOR MEMORY DEVICE HAVING EXTENDED MARGIN IN LATCHING INPUT SIGNAL
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Patent #:
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Issue Dt:
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02/17/1998
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Application #:
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08719880
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Filing Dt:
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09/25/1996
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Title:
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SEMICONDUCTOR MEMORY DEVICE CAPABLE OF STORING HIGH POTENTIAL LEVEL OF DATA
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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08749855
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Filing Dt:
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11/15/1996
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Title:
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SEMICONDUCTOR DEVICE HAVING DUMMY WIRING CONDUCTORS FOR SUPPRESSING HEAT-TREATMENT-INDUCED SHIFITNG
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Patent #:
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Issue Dt:
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02/01/2000
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Application #:
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08754623
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Filing Dt:
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11/21/1996
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Title:
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METHOD OF FABRICATING SEMICONDUCTOR DEVICES WITH CONTACT HOLES
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Patent #:
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Issue Dt:
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03/03/1998
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Application #:
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08762883
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Filing Dt:
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12/12/1996
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF ACTIVATING THE SAME
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08782400
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Filing Dt:
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01/13/1997
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A CONSTANT DELAY-TIME CICUIT
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Patent #:
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Issue Dt:
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12/30/1997
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Application #:
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08785417
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Filing Dt:
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01/23/1997
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A LEAKAGE CURRENT REDUCTION MEANS
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Patent #:
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Issue Dt:
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10/20/1998
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Application #:
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08797051
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Filing Dt:
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02/10/1997
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUITS WITH POWER REDUCTION MECHANISM
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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08805273
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Filing Dt:
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02/25/1997
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Title:
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MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE HAVING A TRENCH GATE ELECTRODE
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Patent #:
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Issue Dt:
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05/25/1999
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Application #:
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08806420
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Filing Dt:
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02/26/1997
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Title:
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METHOD OF PRODUCING CYLINDRICAL STORAGE NODE OF STACKED CAPACITOR IN MEMORY CELL
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Patent #:
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Issue Dt:
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01/05/1999
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Application #:
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08806512
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Filing Dt:
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02/24/1997
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Title:
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SMALL-SIZED MULTI-VALUED SEMICONDUCTOR MEMORY DEVICE WITH COUPLED CAPACITORS BETWEEN DIVIDED BIT LINES
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Patent #:
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Issue Dt:
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09/22/1998
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Application #:
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08823688
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Filing Dt:
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03/25/1997
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Title:
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SINGLE-CHIP SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (DRAM) SYSTEM
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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08825053
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Filing Dt:
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03/27/1997
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Title:
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SEMICONDUCTOR DEVICE WITH MEMORY CELL HAVING A STORAGE CAPACITOR WITH A PLURALITY OF CONCENTRIC STORAGE ELECTRODES FORMED IN AN INSULATING LAYER AND FABRICATION METHOD THEREOF
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Patent #:
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Issue Dt:
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11/09/1999
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Application #:
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08857443
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Filing Dt:
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05/16/1997
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Title:
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SEMICONDUCTOR DEVICE HAVING TWO OR MORE BONDING OPTION PADS
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08893568
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Filing Dt:
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07/11/1997
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Title:
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RANDOM ACCESS MEMORY WITH PLURAL SIMULTANEOUSLY OPERABLE BANKS
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Patent #:
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Issue Dt:
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03/02/1999
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Application #:
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08903173
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Filing Dt:
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07/30/1997
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Title:
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DRAM COMPOSED OF OPEN-BIT-LINE TYPE CAPACITOR-OVER-BIT-LINE STRUCTURE MEMORY CELLS
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Patent #:
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Issue Dt:
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11/24/1998
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Application #:
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08906824
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Filing Dt:
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08/06/1997
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Title:
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TEST MODE POWER CIRCUIT FOR INTEGRATED-CIRCUITS CHIP
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Patent #:
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Issue Dt:
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09/28/1999
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Application #:
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08907946
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Filing Dt:
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08/11/1997
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Title:
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SYNCHRONOUS SEMICONDUCTOR MEMORY HAVING A REDUCED NUMBER OF REGISTERS
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Patent #:
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Issue Dt:
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06/08/1999
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Application #:
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08917706
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Filing Dt:
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08/26/1997
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING VOLTAGE CONVERTER EFFECTIVE AT LOW OPERATIONAL VOLTAGES
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Patent #:
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Issue Dt:
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05/18/1999
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Application #:
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08951734
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Filing Dt:
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10/15/1997
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Title:
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DYNAMIC MEMORY
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Patent #:
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Issue Dt:
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05/22/2001
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Application #:
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08979685
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Filing Dt:
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11/26/1997
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Title:
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WIRING STRUCTURE WITH DIVIDED WIRING CONDUCTORS TO ACHIEVE PLANARITY IN AN OVERLYING SOG LAYER
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Patent #:
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Issue Dt:
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07/20/1999
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Application #:
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08985425
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Filing Dt:
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12/05/1997
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF ACTIVATING THE SAME
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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09023880
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Filing Dt:
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02/13/1998
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Title:
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DYNAMIC RAM HAVING WORD LINE VOLTAGE INTERMITTENTLY BOOSTED IN SYNCHRONISM WITH AN EXTERNAL CLOCK SIGNAL
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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09035267
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Filing Dt:
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03/05/1998
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Title:
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DYNAMIC RAM PROVIDED WITH A DEFECT RELIEF CIRCUIT
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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09084251
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Filing Dt:
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05/26/1998
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09095101
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Filing Dt:
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06/10/1998
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Title:
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LARGE SCALE INTEGRATED CIRCUIT WITH SENSE AMPLIFIER CIRCUITS FOR LOW VOLTAGE OPERATION
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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09096456
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Filing Dt:
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06/11/1998
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT
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|
|
|
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Patent #:
|
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Issue Dt:
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03/13/2001
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Application #:
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09101009
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Filing Dt:
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02/08/1999
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Title:
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DYNAMIC RAM, SEMICONDUCTOR STORAGE DEVICE, AND SEMICONDUCTOR INTEGRATED CIRCUIT DIVICE
|
|
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Patent #:
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Issue Dt:
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10/23/2001
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Application #:
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09113500
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Filing Dt:
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07/10/1998
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Title:
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SEMICONDUCTOR DEVICE WITH CHIP SIZE PACKAGE
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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09120507
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Filing Dt:
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07/23/1998
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Title:
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SEMICONDUCTOR MEMORY DEVICE HAVING BURN-IN TEST FUNCTION
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09125545
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Filing Dt:
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08/28/1998
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Title:
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FERROELECTRIC MEMORY DEVICE HAVING TWO COLUMNS OF MEMORY CELLS PRECHARGED TO SEPARATE VOLTAGES
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09141300
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Filing Dt:
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08/27/1998
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Title:
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SEMICONDUCTOR DEVICE AND METHOD WITH IMPROVED FLAT SURFACE
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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09141563
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Filing Dt:
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08/28/1998
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUITS WITH POWER REDUCTION MECHANISM
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Patent #:
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Issue Dt:
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02/08/2000
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Application #:
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09182514
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Filing Dt:
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10/30/1998
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH A REDUNDANT DECODER HAVING A SMALL SCALE IN CIRCUITRY
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09216978
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Filing Dt:
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12/21/1998
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Title:
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"STACK ARRRANGEMENT FOR TWO SEMICONDUCTOR MEMORY CHIPS AND PRINTED BOARD FOR ACCEPTING A PURALITY OF SUCH STACK ARRANGEMENTS"
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09243973
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Filing Dt:
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02/04/1999
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Title:
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PROGRAM/ERASE ENDURANCE OF EEPROM MEMORY CELLS
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Patent #:
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Issue Dt:
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11/14/2000
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Application #:
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09243974
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Filing Dt:
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02/04/1999
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Title:
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REDUNDANCY METHOD AND STRUCTURE FOR 2-BIT NON-VOLATILE MEMORY CELLS
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Patent #:
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Issue Dt:
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06/27/2000
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Application #:
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09243976
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Filing Dt:
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02/04/1999
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Title:
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BIT LINE CONTROL CIRCUIT FOR A MEMORY ARRAY USING 2-BIT NON-VOLATILE MEMORY CELLS
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09244317
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Filing Dt:
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02/04/1999
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Title:
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EEPROM ARRAY USING 2-BIT NON-VOLATILE MEMORY CELLS WITH SERIAL READ OPERATIONS
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09244529
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Filing Dt:
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02/04/1999
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Title:
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EEPROM ARRAY USING 2-BIT NON-VOLATILE MEMORY CELLS AND METHOD OF IMPLEMENTING SAME
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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09247926
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Filing Dt:
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02/11/1999
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Publication #:
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Pub Dt:
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01/03/2002
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Title:
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PROCESS FOR FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING POLYCIDE LINE AND IMPURITY REGION RESPECTIVELY EXPOSED TO CONTACT HOLES DIFFERENT IN DEPTH
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Patent #:
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Issue Dt:
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03/28/2000
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Application #:
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09258059
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Filing Dt:
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02/26/1999
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Title:
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PROGRAMMABLE CONFIGURATION FOR EEPROMS INCLUDING 2-BIT NON-VOLATILE MEMORY CELL ARRAYS
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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09285681
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Filing Dt:
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04/05/1999
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Title:
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SEMICONDUCTOR PACKAGE
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Patent #:
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Issue Dt:
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01/16/2001
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Application #:
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09299839
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Filing Dt:
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04/26/1999
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Title:
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SYNCHRONOUS SEMICONDUCTOR STORAGE DEVICE
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Patent #:
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Issue Dt:
|
11/07/2000
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Application #:
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09337791
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Filing Dt:
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06/22/1999
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09340979
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Filing Dt:
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06/28/1999
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Title:
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AREA EFFICIENT COLUMN SELECT CIRCUITRY FOR 2-BIT NON-VOLATILE MEMORY CELLS
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Patent #:
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Issue Dt:
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10/03/2000
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Application #:
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09345738
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Filing Dt:
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07/01/1999
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Title:
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A SEMICONDUCTOR MEMORY DEVICE INCLUDING A CLOCKING CIRCUIT FOR CONTROLLING THE READ CIRCUIT OPERATION
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|
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|
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Patent #:
|
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Issue Dt:
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12/23/2003
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Application #:
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09349761
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Filing Dt:
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07/09/1999
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT WITH MEMORY REDUNDANCY CIRCUIT
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09381345
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Filing Dt:
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09/20/1999
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUITRY AND METHOD FOR MANUFACTURING THE SAME CIRCUITRY
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|
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Patent #:
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Issue Dt:
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05/22/2001
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Application #:
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09382329
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Filing Dt:
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08/24/1999
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Title:
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PROCESS FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
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|
|
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Patent #:
|
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Issue Dt:
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04/16/2002
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Application #:
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09390682
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Filing Dt:
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09/07/1999
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD FOR PRODUCTION OF THE SAME
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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09420779
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Filing Dt:
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10/19/1999
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH REDUNDANCY CIRCUIT HAVING A REFERENCE RESISTANCE
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09437010
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Filing Dt:
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11/09/1999
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Title:
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SEMICONDUCTOR MEMORY HAVING IMPROVED REGISTER ARRAY ACCESS SPEED
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09446302
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Filing Dt:
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04/14/2000
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF FABRICATING THE SAME
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Patent #:
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Issue Dt:
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04/26/2005
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Application #:
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09453171
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Filing Dt:
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12/02/1999
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Title:
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SEMICONDUCTOR DEVICE AND A MEMORY SYSTEM INCLUDING A PLURALITY OF IC CHIPS IN A COMMON PACKAGE
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09471504
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Filing Dt:
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12/23/1999
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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12/25/2001
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Application #:
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09480489
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Filing Dt:
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01/11/2000
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Title:
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Semiconductor integrated circuit device equipped with power make-up circuit used in burn-in test after packaging and method for testing the same
|
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Patent #:
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Issue Dt:
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01/15/2002
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Application #:
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09497280
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Filing Dt:
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02/02/2000
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Title:
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Semiconductor integrated circuit device
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Patent #:
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Issue Dt:
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12/12/2000
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Application #:
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09515833
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Filing Dt:
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02/29/2000
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Title:
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Semiconductor storage device
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09546178
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Filing Dt:
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04/10/2000
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Title:
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Semiconductor memory device
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09560724
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Filing Dt:
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04/28/2000
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Title:
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Phase control circuit, semiconductor device and semiconductor memory
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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09561439
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Filing Dt:
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04/28/2000
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Title:
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REDUNDANT ADDRESS SETTING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09568747
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Filing Dt:
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05/11/2000
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Title:
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Semiconductor memory device in which use of cache can be selected
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09569876
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Filing Dt:
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05/12/2000
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Title:
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DIRECTIONAL COUPLING MEMORY MODULE
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Patent #:
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Issue Dt:
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07/31/2001
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Application #:
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09573609
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Filing Dt:
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05/19/2000
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Title:
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Semiconductor integrated circuits with power reduction mechanism
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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09603508
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Filing Dt:
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06/26/2000
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Title:
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Synchronous type semiconductor memory system with less power consumption
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09646010
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Filing Dt:
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09/12/2000
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Title:
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Data transmitter
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09656477
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Filing Dt:
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09/06/2000
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Title:
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DYNAMIC RANDOM ACCESS MEMORY (DRAM) CAPABLE OF CANCELING OUT COMPLEMENTARY NOISE DEVELOPED IN PLATE ELECTRODES OF MEMORY CELL CAPACITORS
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09657839
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Filing Dt:
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09/07/2000
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Title:
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SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09666598
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Filing Dt:
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09/20/2000
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Title:
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Phase control circuit, semiconductor device and semiconductor memory
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09679805
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Filing Dt:
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10/05/2000
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Title:
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CHIP SCALE PACKAGE IN WHICH LAYOUT OF WIRING LINES IS IMPROVED
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Patent #:
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Issue Dt:
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06/18/2002
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Application #:
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09689664
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Filing Dt:
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10/13/2000
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Title:
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SEMICONDUCTOR MEMORY DEVICE OF DDR CONFIGURATION HAVING IMPROVEMENT IN GLITCH IMMUNITY
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09705837
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Filing Dt:
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11/06/2000
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Title:
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DYNAMIC RAM AND SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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01/01/2002
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Application #:
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09706689
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Filing Dt:
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11/07/2000
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Title:
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Non-volatile multi-level semiconductor flash memory device and method of driving same
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Patent #:
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Issue Dt:
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06/29/2004
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Application #:
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09708450
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Filing Dt:
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11/09/2000
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING SPACED-APART ELECTRODES AND THE METHOD THEREOF
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09724195
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Filing Dt:
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11/28/2000
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Title:
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SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09725107
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Filing Dt:
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11/29/2000
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Publication #:
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Pub Dt:
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06/07/2001
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Title:
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SEMICONDUCTOR MEMORY DEVICE USING OPEN DATA LINE ARRANGEMENT
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Patent #:
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Issue Dt:
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01/15/2002
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Application #:
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09730611
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Filing Dt:
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12/05/2000
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Title:
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Content-addressable memory for virtual ground flash architectures
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Patent #:
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Issue Dt:
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12/11/2001
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Application #:
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09741419
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Filing Dt:
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12/21/2000
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Publication #:
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Pub Dt:
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09/20/2001
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Title:
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Virtual channel synchronous dynamic random access memory
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Patent #:
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Issue Dt:
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01/22/2002
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Application #:
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09750038
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Filing Dt:
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12/29/2000
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Publication #:
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Pub Dt:
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05/10/2001
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Title:
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DYNAMIC RANDOM ACCESS MEMORY IN SWITCH MOSFETs BETWEEN SENSE AMPLIFIERS AND BIT LINES
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09755170
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Filing Dt:
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01/08/2001
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Publication #:
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Pub Dt:
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05/24/2001
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Title:
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DYNAMIC RANDOM ACCESS MEMORY (RAM), SEMICONDUCTOR STORAGE DEVICE, AND SEMICONDUCTOR INTEGRATED CIRCUIT (IC) DEVICE
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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09767830
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Filing Dt:
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01/24/2001
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Publication #:
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Pub Dt:
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10/04/2001
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PROCESS FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09802842
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Filing Dt:
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03/12/2001
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Publication #:
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Pub Dt:
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09/20/2001
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Title:
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MEMORY SYSTEM
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09805167
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Filing Dt:
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03/14/2001
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Publication #:
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Pub Dt:
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07/26/2001
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Title:
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DYNAMIC RAM AND SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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08/05/2003
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Application #:
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09811400
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Filing Dt:
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03/20/2001
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Publication #:
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Pub Dt:
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10/04/2001
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Title:
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A SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED ARRANGEMENT FOR REPLACING FAILED BIT LINES
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|
|
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09811529
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Filing Dt:
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03/20/2001
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Publication #:
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Pub Dt:
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10/04/2001
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Title:
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SEMICONDUCTOR MEMORY PRODUCTION SYSTEM AND SEMICONDUCTOR MEMORY PRODUCTION METHOD
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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09813684
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Filing Dt:
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03/20/2001
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Publication #:
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Pub Dt:
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10/04/2001
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Title:
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SEMICONDUCTOR STORAGE DEVICE
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Patent #:
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Issue Dt:
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02/26/2002
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Application #:
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09821336
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Filing Dt:
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03/28/2001
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Title:
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Symmetrical non-volatile memory array architecture without neighbor effect
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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09826179
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Filing Dt:
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04/04/2001
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Publication #:
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Pub Dt:
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02/21/2002
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Title:
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DLL CIRCUIT AND METHOD OF GENERATING TIMING SIGNALS
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