Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 032346/0039 | |
| Pages: | 6 |
| | Recorded: | 03/04/2014 | | |
| Attorney Dkt #: | 8947-000730/US |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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10/06/2015
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Application #:
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14024890
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Filing Dt:
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09/12/2013
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Publication #:
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Pub Dt:
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03/13/2014
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Title:
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ERROR CHECK AND CORRECTION CIRCUIT AND SEMICONDUCTOR MEMORY
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Assignee
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| 129, SAMSUNG-RO, YEONGTONG-GU, SUWON-SI |
| GYEONGGI-DO, KOREA, REPUBLIC OF 443-742 |
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Correspondence name and address
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JOHN A. CASTELLANO
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11730 PLAZA AMERICA DR.
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HARNESS, DICKEY & PIERCE P.L.C.
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RESTON, VA 20190
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