|
|
Patent #:
|
|
Issue Dt:
|
10/01/2002
|
Application #:
|
07986571
|
Filing Dt:
|
12/07/1992
|
Title:
|
FEEDBACK CONTROLLED SUBSTRATE BIAS GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/1999
|
Application #:
|
08113665
|
Filing Dt:
|
08/31/1993
|
Title:
|
MULTI-LAYER WIRING STRUCTURE HAVING NARROWED PORTIONS AT PREDETERMINED LENGTH INTERVALS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/1995
|
Application #:
|
08132111
|
Filing Dt:
|
10/05/1993
|
Title:
|
FUSE-PROGRAMMABLE REDUNDANCY CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/1995
|
Application #:
|
08132952
|
Filing Dt:
|
10/07/1993
|
Title:
|
METHOD OF WRITING DATA INTO AND ERASING THE SAME FROM SEMICONDUCTOR NONVOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/1995
|
Application #:
|
08137292
|
Filing Dt:
|
10/14/1993
|
Title:
|
PLASMA PROCESSING APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/1995
|
Application #:
|
08156360
|
Filing Dt:
|
11/23/1993
|
Title:
|
SENSE AMPLIFIER CONTROL CIRCUIT FOR SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/1995
|
Application #:
|
08156620
|
Filing Dt:
|
11/23/1993
|
Title:
|
ONE-TRANSISTOR ONE-CAPACITOR MEMORY CELL STRUCTURE FOR DRAMS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/1995
|
Application #:
|
08186093
|
Filing Dt:
|
01/25/1994
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/1995
|
Application #:
|
08215487
|
Filing Dt:
|
03/21/1994
|
Title:
|
SEMICONDUCTOR MEMORY CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/1995
|
Application #:
|
08225968
|
Filing Dt:
|
04/08/1994
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/1996
|
Application #:
|
08226695
|
Filing Dt:
|
04/12/1994
|
Title:
|
LOCAL AREA NETWORK SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/1995
|
Application #:
|
08243584
|
Filing Dt:
|
05/16/1994
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/1995
|
Application #:
|
08246283
|
Filing Dt:
|
05/19/1994
|
Title:
|
ADDRESS TRANSITION DETECTOR CIRCUIT AND METHOD OF DRIVING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/1995
|
Application #:
|
08254676
|
Filing Dt:
|
06/06/1994
|
Title:
|
RADIATION-SENSITIVE RESIN COMPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/1995
|
Application #:
|
08254878
|
Filing Dt:
|
06/06/1994
|
Title:
|
SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/1995
|
Application #:
|
08256073
|
Filing Dt:
|
06/23/1994
|
Title:
|
INPUT/OUTPUT PROTECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/1995
|
Application #:
|
08257450
|
Filing Dt:
|
06/08/1994
|
Title:
|
DYNAMIC RANDOM ACCESS MEMORY WITH BIT LINE EQUALIZING MEANS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/1995
|
Application #:
|
08258799
|
Filing Dt:
|
06/13/1994
|
Title:
|
WORD LINE SELECTION CIRCUIT FOR SELECTING MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/1995
|
Application #:
|
08277704
|
Filing Dt:
|
07/20/1994
|
Title:
|
LOW-POWER BAUD RATE GENERATOR INCLUDING TWO OSCILLATORS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/1998
|
Application #:
|
08295685
|
Filing Dt:
|
08/24/1994
|
Title:
|
CACHE MEMORY APPARATUS FOR READING DATA CORRESPONDING TO INPUT ADDRESS INFORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/1996
|
Application #:
|
08297450
|
Filing Dt:
|
08/29/1994
|
Title:
|
DYNAMIC RANDOM ACCESS MEMORY (DRAM) WITH CACHE AND TAG
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/1995
|
Application #:
|
08302235
|
Filing Dt:
|
09/08/1994
|
Title:
|
CODEC
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/1996
|
Application #:
|
08317245
|
Filing Dt:
|
10/03/1994
|
Title:
|
DIGITAL SIGNAL TRANSMISSION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/1997
|
Application #:
|
08318175
|
Filing Dt:
|
10/05/1994
|
Title:
|
WORD LINE DRIVER IN A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/1996
|
Application #:
|
08328259
|
Filing Dt:
|
10/24/1994
|
Title:
|
OPTICAL ELEMENT MOUNTED ON A BASE HAVING A CAPACITOR IMBEDDED THEREIN
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08336661
|
Filing Dt:
|
11/04/1994
|
Title:
|
SERIAL ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/1997
|
Application #:
|
08351253
|
Filing Dt:
|
01/24/1995
|
Title:
|
VARIABLE-LENGTH CODE DECODER USING A CONTENT ADDRESSABLE MEMORY WITH MATCH INHIBITING GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08364188
|
Filing Dt:
|
12/27/1994
|
Title:
|
SIGNAL TRANSMISSION CIRCUIT AND SIGNAL TRANSMISSION DEVICE UTILIZING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/1997
|
Application #:
|
08365467
|
Filing Dt:
|
12/28/1994
|
Title:
|
QUANTIZING AND DEQUANTIZING CIRCUIT WITH REDUCED SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/1997
|
Application #:
|
08365471
|
Filing Dt:
|
12/27/1994
|
Title:
|
LEVEL SHIFTER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/1997
|
Application #:
|
08366505
|
Filing Dt:
|
12/30/1994
|
Title:
|
A METHOD OF MANUFACTURING A ONE TRANSISTOR ONE-CAPACITOR MEMORY CELL STRUCTURE WITH A TRENCH CONTAINING A CONDUCTOR PENETRATING A BURICE INSULATING FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/1996
|
Application #:
|
08412276
|
Filing Dt:
|
03/28/1995
|
Title:
|
FLASH MEMORY HAVING SELECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/1997
|
Application #:
|
08449951
|
Filing Dt:
|
05/25/1995
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2002
|
Application #:
|
08450553
|
Filing Dt:
|
05/25/1995
|
Title:
|
EEPROM ERASING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/1999
|
Application #:
|
08454118
|
Filing Dt:
|
06/02/1995
|
Title:
|
NEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/1997
|
Application #:
|
08455029
|
Filing Dt:
|
05/31/1995
|
Title:
|
CACHE MEMORY APPARATUS FOR READING DATA CORRESPONDING TO INPUT ADDRESS INFORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/1996
|
Application #:
|
08457265
|
Filing Dt:
|
06/01/1995
|
Title:
|
INVERTING AMPLIFIER HAVING NEGATIVE-RESISTANCE CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/1997
|
Application #:
|
08458673
|
Filing Dt:
|
06/02/1995
|
Title:
|
METHOD FOR FABRICATING AN ELECTRONIC DEVICE HAVING SOLDER JOINTS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/1996
|
Application #:
|
08460762
|
Filing Dt:
|
06/02/1995
|
Title:
|
FABRICATION PROCESS FOR A SEMICONDUCTOR PRESSURE SENSOR FOR SENSING PRESSURE APPLIED THERETO
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/1997
|
Application #:
|
08470015
|
Filing Dt:
|
07/28/1995
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING VOLATILE STORAGE UNIT AND NON-VOLATILE STORAGE UNIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/1997
|
Application #:
|
08471205
|
Filing Dt:
|
06/06/1995
|
Title:
|
METHOD FOR MANUFACTURING A CONDUCTIVE PATTERN STRUCTURE FOR A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/1997
|
Application #:
|
08493581
|
Filing Dt:
|
06/22/1995
|
Title:
|
METHOD OF MANUFACTURING CONTACT STRUCTURE USING BARRIER METAL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/1997
|
Application #:
|
08504062
|
Filing Dt:
|
07/18/1995
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A MULTI-LAYERED CONDUCTIVE STRUCTURE WHICH INCLUDES AN ALUMINUM ALLOY LAYER, A HIGH MELTING TEMPERATURE METAL LAYER, AND A HIGH MELTING TEMPERATURE NITRIDE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/1996
|
Application #:
|
08504734
|
Filing Dt:
|
07/19/1995
|
Title:
|
LEVEL CONVERTING CIRCUIT FOR REDUCING AN ON-QUIESCENCE CURRENT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/1997
|
Application #:
|
08505078
|
Filing Dt:
|
08/14/1995
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT WITH SURGE-PROTECTED OUTPUT MISFET'S
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/1996
|
Application #:
|
08508175
|
Filing Dt:
|
07/27/1995
|
Title:
|
ADDRESS TRANSITION DETECTOR CIRCUIT AND METHOD OF DRIVING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/1997
|
Application #:
|
08515050
|
Filing Dt:
|
08/14/1995
|
Title:
|
SENSE AMPLIFIER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/1997
|
Application #:
|
08515581
|
Filing Dt:
|
08/16/1995
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08518832
|
Filing Dt:
|
08/24/1995
|
Title:
|
SEMICONDUCTOR DEVICE HAVING PROTECTION DEVICE FOR PREVENTING THE ELECTROSTATIC BREAKDOWN OF OUTPUT BUFFER MOSFETS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/1997
|
Application #:
|
08529546
|
Filing Dt:
|
09/18/1995
|
Title:
|
BOOSTER POWER GENERATING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/1996
|
Application #:
|
08534589
|
Filing Dt:
|
09/27/1995
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1998
|
Application #:
|
08539683
|
Filing Dt:
|
10/05/1995
|
Title:
|
INSTRUCTION PREFETCH CIRCUIT AND CACHE DEVICE WITH BRANCH DETECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/1997
|
Application #:
|
08542221
|
Filing Dt:
|
10/12/1995
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/1997
|
Application #:
|
08544540
|
Filing Dt:
|
10/18/1995
|
Title:
|
SEMICONDUCTOR MEMORY WITH A TIMING CONTROLLED FOR RECEIVING DATA AT A SEMICONDUCTOR MEMORY MODULE TO BE ACCESSED
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/1997
|
Application #:
|
08546374
|
Filing Dt:
|
10/20/1995
|
Title:
|
INTERNAL STATE DETERMINING APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/1997
|
Application #:
|
08548668
|
Filing Dt:
|
10/26/1995
|
Title:
|
METHOD OF MEMORY-DRIVING A PLASMA DISPLAY PANEL WITH WRITE AND SUSTAIN VOLTAGES SET UP INDEPENDENTLY OF EACH OTHER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/1998
|
Application #:
|
08562118
|
Filing Dt:
|
11/22/1995
|
Title:
|
ANALOG-TO-DIGITAL CONVERTER WITH WRITABLE RESULT REGISTER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/1998
|
Application #:
|
08565958
|
Filing Dt:
|
12/04/1995
|
Title:
|
SYNCHRONOUS BURST-ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/1997
|
Application #:
|
08566955
|
Filing Dt:
|
12/04/1995
|
Title:
|
BUFFER CIRCUIT AND BIAS CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/1997
|
Application #:
|
08571513
|
Filing Dt:
|
12/13/1995
|
Title:
|
WAFER STRUCTURE IN A SEMICONDUCTOR DEVICE MANUFACTURING PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/1997
|
Application #:
|
08576614
|
Filing Dt:
|
12/21/1995
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A CMOS ELEMENT AS A BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/1997
|
Application #:
|
08587787
|
Filing Dt:
|
12/26/1995
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/1997
|
Application #:
|
08596871
|
Filing Dt:
|
02/13/1996
|
Title:
|
DIGITAL SIGNAL TRANSMISSION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08597170
|
Filing Dt:
|
02/06/1996
|
Title:
|
CLEANING APPARATUS FOR CLEANING A SEMICONDUCTOR WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08619013
|
Filing Dt:
|
03/20/1996
|
Title:
|
A PATTERN FORM OF AN ACTIVE REGION OF A MOS TYPE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/1997
|
Application #:
|
08623901
|
Filing Dt:
|
03/27/1996
|
Title:
|
OFFSET CANCEL CIRCUIT AND OFFSET CANCEL SYSTEM USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
08639440
|
Filing Dt:
|
04/29/1996
|
Title:
|
SEMICONDUCTOR DEVICE INCORPORATING MULTILAYER WIRING STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08650367
|
Filing Dt:
|
05/20/1996
|
Title:
|
MULTI-PORT SEMICONDUCTOR MEMORY DEVICE WITH REDUCED COUPLING NOISE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/1998
|
Application #:
|
08651716
|
Filing Dt:
|
05/22/1996
|
Title:
|
DATA INPUT CIRCUIT OF SEMICONDUCTOR STORAGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08652107
|
Filing Dt:
|
05/23/1996
|
Title:
|
PHOTOELECTRIC SENSOR HAVING A LIGHT GUIDE BUILT-IN
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/1998
|
Application #:
|
08659057
|
Filing Dt:
|
06/04/1996
|
Title:
|
SEMICONDUCTOR MEMORY WITH IMPROVED WORD LINE STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
|
Application #:
|
08661922
|
Filing Dt:
|
06/11/1996
|
Title:
|
VARIABLE LEVEL SHIFTER AND MULTIPLIER SUITABLE FOR LOW-VOLTAGE DIFFERENTIAL OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1998
|
Application #:
|
08664546
|
Filing Dt:
|
06/17/1996
|
Title:
|
ADDRESS TRANSITION DETECTOR CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08671711
|
Filing Dt:
|
06/28/1996
|
Title:
|
METHOD OF MEMORY-DRIVING A DC GASEOUS DISCHARGE PANEL AND CIRCUITRY THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08678858
|
Filing Dt:
|
07/12/1996
|
Title:
|
CURRENT AMPLIFIER AND DATA BUS CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
|
Application #:
|
08678860
|
Filing Dt:
|
07/21/1996
|
Title:
|
CLOCK DISTRIBUTING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08681352
|
Filing Dt:
|
07/23/1996
|
Title:
|
DUAL PORT RAM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/1997
|
Application #:
|
08681389
|
Filing Dt:
|
07/23/1996
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2000
|
Application #:
|
08696460
|
Filing Dt:
|
08/14/1996
|
Title:
|
HIGH VOLTAGE MOS TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/1999
|
Application #:
|
08736610
|
Filing Dt:
|
10/24/1996
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A DIE PAD STRUCTURE FOR PREVENTING CRACKS IN A MOLDING RESIN
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08739970
|
Filing Dt:
|
10/30/1996
|
Title:
|
SEMICONDUCTOR MEMORY WITH BUILT-IN CACHE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08740899
|
Filing Dt:
|
11/04/1996
|
Title:
|
METHOD OF CORRECTING ERROR, SUITABLE FOR STORAGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08742181
|
Filing Dt:
|
10/30/1996
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH REDUCED LEAKAGE CURRENT AND IMPROVED DATA RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
08743363
|
Filing Dt:
|
11/04/1996
|
Title:
|
PULSE EXTENDING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/1998
|
Application #:
|
08749357
|
Filing Dt:
|
11/20/1996
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
|
Application #:
|
08756902
|
Filing Dt:
|
12/02/1996
|
Title:
|
METHOD AND APPARATUS FOR POLISHING WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/1997
|
Application #:
|
08757949
|
Filing Dt:
|
11/22/1996
|
Title:
|
ABSOLUTE VALUE CIRCUIT CAPABLE OF PROVIDING FULL-WAVE RECTIFICATION WITH LESS DISTORTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/1999
|
Application #:
|
08759720
|
Filing Dt:
|
12/06/1996
|
Title:
|
METHOD FOR ESTIMATING OPTIMUM POSITION OF A WAFER FOR FORMING IMAGE PATTERNS THEREON
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2002
|
Application #:
|
08760510
|
Filing Dt:
|
12/05/1996
|
Title:
|
LAMINATE PRINTED CIRCUIT BOARD WITH LEADS FOR PLATING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2001
|
Application #:
|
08760557
|
Filing Dt:
|
12/04/1996
|
Title:
|
SEMICONDUCTOR DEVICE HAVING MULTI-LAYERED METALIZATION AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08768293
|
Filing Dt:
|
12/17/1996
|
Title:
|
FERROELECTRIC THIN FILM, MAKING METHOD THEREOF AND COATING LIQUID FOR MAKING THIN FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08769158
|
Filing Dt:
|
12/18/1996
|
Title:
|
SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/1998
|
Application #:
|
08780847
|
Filing Dt:
|
01/09/1997
|
Title:
|
LOW-POWER CONSUMPTION TYPE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/1998
|
Application #:
|
08785601
|
Filing Dt:
|
01/17/1997
|
Title:
|
DECODER CIRCUIT HAVING A PREDECODER ACITIVATED BY A RESET SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/1998
|
Application #:
|
08788121
|
Filing Dt:
|
01/23/1997
|
Title:
|
A SIGNAL GENERATOR FOR GENERATOMG TEST MODE SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/1999
|
Application #:
|
08790282
|
Filing Dt:
|
01/28/1997
|
Title:
|
BUMPLESS METHOD OF ATTACHING INNER LEADS TO SEMICONDUCTOR INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08790756
|
Filing Dt:
|
01/27/1997
|
Title:
|
LINEAR TYPE DIGITAL-TO-ANALOG CONVERTER AND DRIVING METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08796388
|
Filing Dt:
|
02/04/1997
|
Title:
|
METHOD FOR TESTING A SEMICONDUCTOR MEMORY DEVICE AND A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/1998
|
Application #:
|
08798153
|
Filing Dt:
|
02/10/1997
|
Title:
|
MOLD FOR MOLDING A SEMICONDUCTOR PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/1999
|
Application #:
|
08804259
|
Filing Dt:
|
02/21/1997
|
Title:
|
OPERATIONAL AMPLIFICATION CIRCUIT CAPABLE OF DRIVING A HIGH LOAD
|
|