|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/1998
|
Application #:
|
08804828
|
Filing Dt:
|
02/24/1997
|
|
Title:
|
SEMICONDUCTOR IC DEVICE HAVING FIRST AND SECOND PADS ON SURFACE OF SEMICONDUCTOR CHIP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2001
|
Application #:
|
08807462
|
Filing Dt:
|
02/27/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR MEMORY CIRCUIT TO BE TESTED, METHOD OF TESTING SEMICONDUCTOR MEMORY CIRCUIT AND READ CIRCUIT FOR SEMICONDUCTOR MEMORY CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/1998
|
Application #:
|
08808255
|
Filing Dt:
|
02/28/1997
|
|
Title:
|
OUTPUT BUFFER CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08810284
|
Filing Dt:
|
03/03/1997
|
|
Title:
|
BIAS CIRCUIT WITH LOW SENSITIVITY TO THRESHOLD VARIATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1999
|
Application #:
|
08812923
|
Filing Dt:
|
03/10/1997
|
|
Title:
|
MULTI-STAGE VOLTAGE-BOOSTING CIRCUIT WITH BOOSTED BACK- GATE BIAS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08812932
|
Filing Dt:
|
03/04/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08817954
|
Filing Dt:
|
12/05/1997
|
|
Title:
|
'METHOD FOR MANUFACTURING SIOF FILMS'
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1998
|
Application #:
|
08822922
|
Filing Dt:
|
03/21/1997
|
|
Title:
|
OPTICAL SENSOR FOR READING A PATTERN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/29/2000
|
Application #:
|
08825465
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
METHOD OF IDENTIFYING PERIPHERAL DEVICE EMPLOYED IN A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08829175
|
Filing Dt:
|
03/31/1997
|
|
Title:
|
BOOSTER CIRCUIT AND METHOD OF DRIVING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08829176
|
Filing Dt:
|
03/31/1997
|
|
Title:
|
BAND-SELECTABLE PHASE-LOCKED LOOP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08829284
|
Filing Dt:
|
03/31/1997
|
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/1999
|
Application #:
|
08829547
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
INTERNAL VOLTAGE GENERATING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08833045
|
Filing Dt:
|
04/03/1997
|
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08833046
|
Filing Dt:
|
04/03/1997
|
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/1999
|
Application #:
|
08837360
|
Filing Dt:
|
04/17/1997
|
|
Title:
|
CIRCUIT FOR PROTECTING AN IC FROM NOISE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1998
|
Application #:
|
08838988
|
Filing Dt:
|
04/23/1997
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/1998
|
Application #:
|
08845207
|
Filing Dt:
|
04/21/1997
|
|
Title:
|
PHOTOSEMICONDUCTOR RELAY, PHOTOSEMICONDUCTOR RELAY DEVICE, CONTROLLER USING PHOTOSEMICONDUCTOR RELAY, POWER SUPPLY APPARATUS USING PHOTOSEMICONDUCTOR RELAY AND TERMINAL SWITCHING APPARATUS USING PHOTOSEMICONDUCTOR RELAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/1999
|
Application #:
|
08848286
|
Filing Dt:
|
04/29/1997
|
|
Title:
|
SEMICONDUCTOR IC DEVICE HAVING CHIP SUPPORT ELEMENT AND ELECTRODES ON THE SAME SURFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2000
|
Application #:
|
08851075
|
Filing Dt:
|
05/05/1997
|
|
Title:
|
MICROPROCESSOR WITH COMMON BUS FOR MEMORY AND PERIPHERAL CIRCUIT HAVING DATA LATCH GENERATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08857254
|
Filing Dt:
|
05/16/1997
|
|
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY CELL AND METHOD FOR PRODUCTION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08864672
|
Filing Dt:
|
05/28/1997
|
|
Title:
|
INTEGRATED CIRCUIT HAVING INDEPENDENTLY TESTABLE INPUT-OUTPUT CIRCUITS AND TEST METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
08864860
|
Filing Dt:
|
05/29/1997
|
|
Title:
|
INTEGRATED CIRCUIT AND FABRICATING METHOD AND EVALUATING METHOD OF INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/1999
|
Application #:
|
08868474
|
Filing Dt:
|
06/03/1997
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING AN IMPROVED ARRANGEMENT OF POWER SUPPLY LINES TO REDUCE NOISE OCCURRING THEREIN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08868475
|
Filing Dt:
|
06/03/1997
|
|
Title:
|
TRANSISTOR PROTECTION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/1999
|
Application #:
|
08881359
|
Filing Dt:
|
06/24/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE HAVING PROTECTION DEVICE FOR PREVENTING THE ELECTROSTATIC BREAKDOWN OF OUTPUT BUFFER MOSFETS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/1999
|
Application #:
|
08888629
|
Filing Dt:
|
07/07/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE HAVING TWO COMPOSITE FIELD EFFECT TRANSISTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/1999
|
Application #:
|
08900469
|
Filing Dt:
|
07/25/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE HAVING THE INNER END OF CONNECTOR LEADS DISPLACED ONTO THE SURFACE OF SEMICONDUCTOR CHIP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08901680
|
Filing Dt:
|
07/28/1997
|
|
Title:
|
SERIAL ACCESS MEMORY WITH REDUCED LOOP-LINE DELAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
08916252
|
Filing Dt:
|
08/22/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE PACKAGED IN PLASTIC PACKAGE AND MOLD EMPLOYABLE FOR PROCUCTION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08916445
|
Filing Dt:
|
08/22/1997
|
|
Title:
|
SEMICONDUCTOR APPARATUS AND METHOD FOR FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/1999
|
Application #:
|
08917348
|
Filing Dt:
|
08/26/1997
|
|
Title:
|
DUAL-MODE, CRYSTAL RESONATOR/EXTERNAL CLOCK, OSCILLATOR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2002
|
Application #:
|
08923246
|
Filing Dt:
|
09/04/1997
|
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE BY SPUTTERING DIELECTRIC FORMING MATERIALS WHILE SELECTIVELY HEATING GROWING LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08925091
|
Filing Dt:
|
09/08/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE HAVING AN IMPROVED STRUCTURE AND CAPABLE OF GREATLY REDUCING ITS OCCUPIED AREA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
08930127
|
Filing Dt:
|
10/29/1997
|
|
Title:
|
OUTPUT DRIVER CIRCUIT UTILIZING FLOATING WELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/1999
|
Application #:
|
08940954
|
Filing Dt:
|
10/08/1997
|
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/1999
|
Application #:
|
08941656
|
Filing Dt:
|
09/30/1997
|
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE CAPABLE OF HIGHER-SPEED OPERATION AND ACTIVATED IN SYNCHRONISM WITH CLOCK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2000
|
Application #:
|
08942304
|
Filing Dt:
|
10/01/1997
|
|
Title:
|
A BIPOLAR TRANSISTOR WITH COLLECTOR SURGE VOLTAGE PROTECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08951658
|
Filing Dt:
|
10/16/1997
|
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
|
Application #:
|
08962115
|
Filing Dt:
|
10/31/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2000
|
Application #:
|
08966217
|
Filing Dt:
|
11/07/1997
|
|
Title:
|
RING-TYPE VOLTAGE-CONTROLLED OSCILLATOR HAVING A SUB-FREQUENCY BAND SELECTION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08967710
|
Filing Dt:
|
11/10/1997
|
|
Title:
|
SEMICONDUCTOR MEMORY WITH IMPROVED WORD LINE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08976604
|
Filing Dt:
|
11/24/1997
|
|
Title:
|
CHIP LAYOUT OF SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08987834
|
Filing Dt:
|
12/09/1997
|
|
Title:
|
ADDRESS DECODER, SEMICONDUCTOR MEMORY AND SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
08990790
|
Filing Dt:
|
12/15/1997
|
|
Title:
|
RESIN SEALING TYPE SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/1999
|
Application #:
|
08998424
|
Filing Dt:
|
12/24/1997
|
|
Title:
|
METHOD AND APPARATUS FOR GENERATING INTERNAL SUPPLY VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
09028130
|
Filing Dt:
|
02/23/1998
|
|
Title:
|
SEMICONDUCTOR STORAGE DEVICE AND METHOD OF CONTROLLING IT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2000
|
Application #:
|
09050461
|
Filing Dt:
|
03/31/1998
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING INPUT CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09052127
|
Filing Dt:
|
03/31/1998
|
|
Title:
|
SERIAL COMMUNICATION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
09053040
|
Filing Dt:
|
04/01/1998
|
|
Publication #:
|
|
Pub Dt:
|
03/28/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND AN INFORMATION MANAGEMENT SYSTEM THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/1999
|
Application #:
|
09057536
|
Filing Dt:
|
04/09/1998
|
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING A MEMORY TEST CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1999
|
Application #:
|
09058291
|
Filing Dt:
|
04/10/1998
|
|
Title:
|
POWER ON RESET CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/1998
|
Application #:
|
09062972
|
Filing Dt:
|
04/21/1998
|
|
Title:
|
MOLDING DIE SET AND MOLD PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09072749
|
Filing Dt:
|
05/06/1998
|
|
Publication #:
|
|
Pub Dt:
|
01/10/2002
| | | | |
|
Title:
|
INTERACTIVE METHOD OF OPTIMUM LSI LAYOUT INCLUDING CONSIDERING LSI CHIP SIZE, TEST ELEMENT GROUPS, AND ALIGNMENT MARKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
09081562
|
Filing Dt:
|
05/19/1998
|
|
Title:
|
FABRICATING METHOD FOR SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2000
|
Application #:
|
09083887
|
Filing Dt:
|
05/26/1998
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2000
|
Application #:
|
09092909
|
Filing Dt:
|
06/08/1998
|
|
Title:
|
SEMICONDUCTOR MEMORY CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/29/2000
|
Application #:
|
09099434
|
Filing Dt:
|
06/18/1998
|
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING FLOATING GATE TRANSISTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2000
|
Application #:
|
09100876
|
Filing Dt:
|
06/22/1998
|
|
Title:
|
ALIGNMENT MARK AND STRUCTURE COVERING THE THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
09110965
|
Filing Dt:
|
07/07/1998
|
|
Title:
|
SEMICONDUCTOR DEVICE HAVING TWO PLURALITIES OF ELECTRODE PADS, PADS OF DIFFERENT PLURALITIES HAVING DIFFERENT WIDTHS AND RESPECTIVE PADS OF DIFFERENT PLURALITIES HAVING AN ALIGNED TRANSVERSE EDGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2000
|
Application #:
|
09115261
|
Filing Dt:
|
07/14/1998
|
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2000
|
Application #:
|
09120798
|
Filing Dt:
|
07/23/1998
|
|
Title:
|
SEMICONDUCTOR MEMORY WITH ARBITRARY DATA MASKING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2001
|
Application #:
|
09135553
|
Filing Dt:
|
08/18/1998
|
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING CONDUCTIVE PATTERNS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2003
|
Application #:
|
09139324
|
Filing Dt:
|
08/25/1998
|
|
Publication #:
|
|
Pub Dt:
|
05/02/2002
| | | | |
|
Title:
|
PHASE CONTROL CIRCUIT AND PHASE CONTROL METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2000
|
Application #:
|
09140329
|
Filing Dt:
|
08/26/1998
|
|
Title:
|
OUTPUT CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2001
|
Application #:
|
09140662
|
Filing Dt:
|
08/26/1998
|
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2001
|
Application #:
|
09141751
|
Filing Dt:
|
08/28/1998
|
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
09144433
|
Filing Dt:
|
09/01/1998
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING VIRTUAL POWER SUPPLY
LINE AND POWER CONTROL TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2000
|
Application #:
|
09150740
|
Filing Dt:
|
09/10/1998
|
|
Title:
|
CPU MODE SWITCHING CIRCUIT CHANGING OPERATION MODE RESPONSIVE TO A POWER ON RESET SIGNAL AND AN EXTERNAL RESET SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2001
|
Application #:
|
09153331
|
Filing Dt:
|
09/15/1998
|
|
Title:
|
DATA STORAGE APPARATUS, METHOD, AND MEDIUM WITH VARIABLE DATA STORAGE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09153341
|
Filing Dt:
|
09/15/1998
|
|
Title:
|
PRECHARGE CIRCUIT AND SEMICONDUCTOR STORAGE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
09159660
|
Filing Dt:
|
09/24/1998
|
|
Title:
|
SEMICONDUCTOR MEMORY CAPABLE OF WRITING AND READING DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2001
|
Application #:
|
09166846
|
Filing Dt:
|
10/06/1998
|
|
Title:
|
COUNTING CIRCUIT WITH REWRITABLE NON-VOLATILE MEMORY, AND COUNTING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2001
|
Application #:
|
09167529
|
Filing Dt:
|
10/07/1998
|
|
Title:
|
BOND PAD FOR STRESS RELEIF BETWEEN A SUBSTRATE AND AN EXTERNAL SUBSTRATE.
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2002
|
Application #:
|
09167992
|
Filing Dt:
|
10/08/1998
|
|
Title:
|
CIRCUITRY AND APPARATUS FOR CONVERTING A DECODED IMAGE WITH A MACROBLOCK/RASTER SCAN CONVERSION CAPABILITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2001
|
Application #:
|
09170214
|
Filing Dt:
|
10/13/1998
|
|
Title:
|
DRIVE CIRCUIT FOR LIQUID CRYSTAL DISPLAY APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2000
|
Application #:
|
09176775
|
Filing Dt:
|
10/22/1998
|
|
Title:
|
SEMICONDUCTOR MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2001
|
Application #:
|
09177822
|
Filing Dt:
|
10/23/1998
|
|
Title:
|
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2000
|
Application #:
|
09182423
|
Filing Dt:
|
10/30/1998
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING BIAS CIRCUITS EACH INCLUDING DIFFERENT REFERENCE RESISTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09182667
|
Filing Dt:
|
10/30/1998
|
|
Title:
|
IMAGE PICKUP UNIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2000
|
Application #:
|
09184836
|
Filing Dt:
|
11/03/1998
|
|
Title:
|
USING GROOVES AS ALIGNMENT MARKS WHEN DICING AN ENCAPSULATED SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2002
|
Application #:
|
09188184
|
Filing Dt:
|
11/10/1998
|
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2001
|
Application #:
|
09192593
|
Filing Dt:
|
11/17/1998
|
|
Title:
|
DATA MONITOR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
09195203
|
Filing Dt:
|
11/18/1998
|
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2000
|
Application #:
|
09200964
|
Filing Dt:
|
11/30/1998
|
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09216478
|
Filing Dt:
|
12/21/1998
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT TEST METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2002
|
Application #:
|
09216883
|
Filing Dt:
|
12/21/1998
|
|
Publication #:
|
|
Pub Dt:
|
12/27/2001
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A LOWER ELECTRODE APERTURE THAT IS LARGER THAN THE PHOTOLITHOGRAPHY RESOLUTION OF THE CAPACITOR PATTERN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2001
|
Application #:
|
09222867
|
Filing Dt:
|
12/30/1998
|
|
Title:
|
SEMICONDUCTOR WITH PLURALITY OF CONNECTING PARTS ARRANGED ON LOWER SURFACE OF A SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
09225351
|
Filing Dt:
|
01/05/1999
|
|
Title:
|
MULTILAYER INTERCONNECTION STRUCTURE OF A SEMICONDUCTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09225547
|
Filing Dt:
|
01/05/1999
|
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2000
|
Application #:
|
09227211
|
Filing Dt:
|
01/08/1999
|
|
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY AND METHOD FOR READING DATA STORED THEREIN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2002
|
Application #:
|
09228567
|
Filing Dt:
|
01/12/1999
|
|
Title:
|
MEMORY INTERFACE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2000
|
Application #:
|
09228576
|
Filing Dt:
|
01/12/1999
|
|
Title:
|
FORMATION OF ALIGNMENT MARK AND STRUCTURE COVERING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2006
|
Application #:
|
09229628
|
Filing Dt:
|
01/13/1999
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING TRANSISTOR WITH REDUCED RESISTANCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09231967
|
Filing Dt:
|
01/15/1999
|
|
Title:
|
LOW COST LINK AGGREGATION METHOD AND SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
|
Application #:
|
09231968
|
Filing Dt:
|
01/15/1999
|
|
Title:
|
LINK AGGREGATION PATH SELECTION METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2001
|
Application #:
|
09241402
|
Filing Dt:
|
02/02/1999
|
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2003
|
Application #:
|
09245860
|
Filing Dt:
|
02/08/1999
|
|
Title:
|
PROFILE EXTRACTION METHOD AND PROFILE EXTRACTION APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2002
|
Application #:
|
09246148
|
Filing Dt:
|
02/08/1999
|
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
|
Title:
|
PELLICLE, IDENTIFICATION SYSTEM OF THE SAME, AND METHOD OF IDENTIFYING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2000
|
Application #:
|
09251444
|
Filing Dt:
|
02/17/1999
|
|
Title:
|
STRUCTURES FOR OPTICAL SEMICONDUCTOR MODULE, OPTICAL CONNECTOR, AND SHAPE ADAPTING OPTICAL CONNECTOR
|
|
