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Reel/Frame:032856/0031   Pages: 443
Recorded: 05/08/2014
Attorney Dkt #:040981-0072
Conveyance: PATENT SECURITY AGREEMENT
Total properties: 11127
Page 110 of 112
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112
1
Patent #:
NONE
Issue Dt:
Application #:
14070836
Filing Dt:
11/04/2013
Publication #:
US20150085592
Pub Dt:
03/26/2015
Title:
Bit-Line Discharge Assistance in Memory Devices
2
Patent #:
9015398
Issue Dt:
04/21/2015
Application #:
14070870
Filing Dt:
11/04/2013
Publication #:
US20140059253
Pub Dt:
02/27/2014
Title:
METHODS AND STRUCTURE FOR IDENTIFYING SUPPORT FOR SUPER-STANDARD FEATURES IN COMMUNICATIONS BETWEEN SERIAL ATTACHED SCSI DEVICES
3
Patent #:
NONE
Issue Dt:
Application #:
14071702
Filing Dt:
11/05/2013
Publication #:
US20140208005
Pub Dt:
07/24/2014
Title:
System, Method and Computer-Readable Medium for Providing Selective Protection and Endurance Improvements in Flash-Based Cache
4
Patent #:
9424179
Issue Dt:
08/23/2016
Application #:
14072530
Filing Dt:
11/05/2013
Publication #:
US20150113205
Pub Dt:
04/23/2015
Title:
Systems and Methods for Latency Based Data Recycling in a Solid State Memory System
5
Patent #:
9201729
Issue Dt:
12/01/2015
Application #:
14072574
Filing Dt:
11/05/2013
Publication #:
US20150113318
Pub Dt:
04/23/2015
Title:
Systems and Methods for Soft Data Utilization in a Solid State Memory System
6
Patent #:
9219503
Issue Dt:
12/22/2015
Application #:
14072604
Filing Dt:
11/05/2013
Publication #:
US20150106675
Pub Dt:
04/16/2015
Title:
SYSTEMS AND METHODS FOR MULTI-ALGORITHM CONCATENATION ENCODING AND DECODING
7
Patent #:
9025655
Issue Dt:
05/05/2015
Application #:
14072895
Filing Dt:
11/06/2013
Publication #:
US20150110165
Pub Dt:
04/23/2015
Title:
Transmitter Training Using Receiver Equalizer Coefficients
8
Patent #:
8856398
Issue Dt:
10/07/2014
Application #:
14073016
Filing Dt:
11/06/2013
Publication #:
US20140067877
Pub Dt:
03/06/2014
Title:
PROCESS TO GENERATE VARIOUS LENGTH PARAMETERS IN A NUMBER OF SGLS BASED UPON THE LENGTH FIELDS OF ANOTHER SGL
9
Patent #:
NONE
Issue Dt:
Application #:
14073526
Filing Dt:
11/06/2013
Publication #:
US20140065791
Pub Dt:
03/06/2014
Title:
ALLOTROPIC OR MORPHOLOGIC CHANGE IN SILICON INDUCED BY ELECTROMAGNETIC RADIATION FOR RESISTANCE TURNING OF INTEGRATED CIRCUITS
10
Patent #:
9438308
Issue Dt:
09/06/2016
Application #:
14074026
Filing Dt:
11/07/2013
Publication #:
US20150055774
Pub Dt:
02/26/2015
Title:
ECHO CANCELLATION WITH QUANTIZATION COMPENSATION
11
Patent #:
8792197
Issue Dt:
07/29/2014
Application #:
14074325
Filing Dt:
11/07/2013
Title:
STORAGE DEVICE WITH DRIVER CONTROLLER PROVIDING PATTERN-DEPENDENT WRITE FUNCTIONALITY
12
Patent #:
9226128
Issue Dt:
12/29/2015
Application #:
14074812
Filing Dt:
11/08/2013
Publication #:
US20150117226
Pub Dt:
04/30/2015
Title:
METHOD AND SYSTEM FOR SESSION BASED DATA MONITORING FOR WIRELESS EDGE CONTENT CACHING NETWORKS
13
Patent #:
8867604
Issue Dt:
10/21/2014
Application #:
14074821
Filing Dt:
11/08/2013
Publication #:
US20140064353
Pub Dt:
03/06/2014
Title:
CROSSING ISI CANCELLATION
14
Patent #:
9135999
Issue Dt:
09/15/2015
Application #:
14077474
Filing Dt:
11/12/2013
Publication #:
US20140126287
Pub Dt:
05/08/2014
Title:
Methods And Apparatus For Storing Data In A Multi-Level Cell Flash Memory Device With Cross-Page Sectors, Multi-Page Coding And Per-Page Coding
15
Patent #:
9058879
Issue Dt:
06/16/2015
Application #:
14077489
Filing Dt:
11/12/2013
Publication #:
US20140126288
Pub Dt:
05/08/2014
Title:
METHODS AND APPARATUS FOR STORING DATA IN A MULTI-LEVEL CELL FLASH MEMORY DEVICE WITH CROSS-PAGE SECTORS, MULTI-PAGE CODING AND PER-PAGE CODING
16
Patent #:
9007828
Issue Dt:
04/14/2015
Application #:
14077519
Filing Dt:
11/12/2013
Publication #:
US20140126289
Pub Dt:
05/08/2014
Title:
Methods And Apparatus For Storing Data In A Multi-Level Cell Flash Memory Device With Cross-Page Sectors, Multi-Page Coding And Per-Page Coding
17
Patent #:
8854805
Issue Dt:
10/07/2014
Application #:
14077611
Filing Dt:
11/12/2013
Publication #:
US20140070682
Pub Dt:
03/13/2014
Title:
STORAGE DEVICE CARRIERS FOR ADAPTING A STORAGE DEVICE OF A FIRST SIZE TO A SLOT FOR A STORAGE DEVICE OF A SECOND SIZE
18
Patent #:
9323625
Issue Dt:
04/26/2016
Application #:
14080935
Filing Dt:
11/15/2013
Publication #:
US20150134613
Pub Dt:
05/14/2015
Title:
Systems and Methods for Lost Synchronization Data Set Reprocessing
19
Patent #:
8976475
Issue Dt:
03/10/2015
Application #:
14080946
Filing Dt:
11/15/2013
Title:
SYSTEMS AND METHODS FOR LARGE SECTOR DYNAMIC FORMAT INSERTION
20
Patent #:
9176866
Issue Dt:
11/03/2015
Application #:
14080950
Filing Dt:
11/15/2013
Publication #:
US20150074327
Pub Dt:
03/12/2015
Title:
Active Recycling for Solid State Drive
21
Patent #:
9436550
Issue Dt:
09/06/2016
Application #:
14082261
Filing Dt:
11/18/2013
Publication #:
US20150121173
Pub Dt:
04/30/2015
Title:
Systems and Methods for Internal Disk Drive Data Compression
22
Patent #:
NONE
Issue Dt:
Application #:
14084044
Filing Dt:
11/19/2013
Publication #:
US20140070849
Pub Dt:
03/13/2014
Title:
METHODS AND STRUCTURE FOR ON-CHIP CLOCK JITTER TESTING AND ANALYSIS
23
Patent #:
9274901
Issue Dt:
03/01/2016
Application #:
14085465
Filing Dt:
11/20/2013
Publication #:
US20150143164
Pub Dt:
05/21/2015
Title:
I/O REQUEST MIRRORING IN A CLUSTERED STORAGE SYSTEM
24
Patent #:
9378840
Issue Dt:
06/28/2016
Application #:
14085553
Filing Dt:
11/20/2013
Publication #:
US20150117097
Pub Dt:
04/30/2015
Title:
SYSTEMS AND METHODS FOR SUB-ZERO THRESHOLD CHARACTERIZATION IN A MEMORY CELL
25
Patent #:
8929013
Issue Dt:
01/06/2015
Application #:
14085816
Filing Dt:
11/21/2013
Title:
Storage System With Pattern Dependent Write
26
Patent #:
NONE
Issue Dt:
Application #:
14086171
Filing Dt:
11/21/2013
Publication #:
US20150138863
Pub Dt:
05/21/2015
Title:
INTERLEAVED WRITE ASSIST FOR HIERARCHICAL BITLINE SRAM ARCHITECTURES
27
Patent #:
NONE
Issue Dt:
Application #:
14086248
Filing Dt:
11/21/2013
Publication #:
US20150138864
Pub Dt:
05/21/2015
Title:
MEMORY ARCHITECTURE WITH ALTERNATING SEGMENTS AND MULTIPLE BITLINES
28
Patent #:
8976898
Issue Dt:
03/10/2015
Application #:
14086811
Filing Dt:
11/21/2013
Title:
LOW-DISTORTION CLASS S POWER AMPLIFIER WITH CONSTANT-IMPEDANCE BANDPASS FILTER
29
Patent #:
9620202
Issue Dt:
04/11/2017
Application #:
14087520
Filing Dt:
11/22/2013
Publication #:
US20150127883
Pub Dt:
05/07/2015
Title:
REDUCTION OR ELIMINATION OF A LATENCY PENALTY ASSOCIATED WITH ADJUSTING READ THRESHOLDS FOR NON-VOLATILE MEMORY
30
Patent #:
9176896
Issue Dt:
11/03/2015
Application #:
14088143
Filing Dt:
11/22/2013
Publication #:
US20150121088
Pub Dt:
04/30/2015
Title:
METHOD OF MANAGING ALIGNED AND UNALIGNED DATA BANDS IN A SELF ENCRYPTING SOLID STATE DRIVE
31
Patent #:
8779820
Issue Dt:
07/15/2014
Application #:
14088702
Filing Dt:
11/25/2013
Publication #:
US20140082577
Pub Dt:
03/20/2014
Title:
UNIFORM-FOOTPRINT PROGRAMMABLE-SKEW MULTI-STAGE CMOS CELL
32
Patent #:
9158319
Issue Dt:
10/13/2015
Application #:
14089212
Filing Dt:
11/25/2013
Publication #:
US20150109052
Pub Dt:
04/23/2015
Title:
CLOSED-LOOP ADAPTIVE VOLTAGE SCALING FOR INTEGRATED CIRCUITS
33
Patent #:
9201628
Issue Dt:
12/01/2015
Application #:
14090555
Filing Dt:
11/26/2013
Publication #:
US20140086367
Pub Dt:
03/27/2014
Title:
Maximum Likelihood Bit-Stream Generation and Detection Using M-Algorithm and Infinite Impulse Response Filtering
34
Patent #:
NONE
Issue Dt:
Application #:
14090670
Filing Dt:
11/26/2013
Publication #:
US20140380223
Pub Dt:
12/25/2014
Title:
USER INTERFACE COMPRISING RADIAL LAYOUT SOFT KEYPAD
35
Patent #:
9286175
Issue Dt:
03/15/2016
Application #:
14091397
Filing Dt:
11/27/2013
Publication #:
US20150135006
Pub Dt:
05/14/2015
Title:
System and Method of Write Hole Protection for a Multiple-Node Storage Cluster
36
Patent #:
9213600
Issue Dt:
12/15/2015
Application #:
14092215
Filing Dt:
11/27/2013
Publication #:
US20150135031
Pub Dt:
05/14/2015
Title:
DYNAMIC PER-DECODER CONTROL OF LOG LIKELIHOOD RATIO AND DECODING PARAMETERS
37
Patent #:
9606912
Issue Dt:
03/28/2017
Application #:
14092285
Filing Dt:
11/27/2013
Publication #:
US20150120989
Pub Dt:
04/30/2015
Title:
Tracking and Utilizing Second Level Map Index for Recycling of Solid State Drive Blocks
38
Patent #:
9176815
Issue Dt:
11/03/2015
Application #:
14093110
Filing Dt:
11/29/2013
Publication #:
US20150149871
Pub Dt:
05/28/2015
Title:
Flash Channel With Selective Decoder Likelihood Dampening
39
Patent #:
NONE
Issue Dt:
Application #:
14093189
Filing Dt:
11/29/2013
Publication #:
US20140089881
Pub Dt:
03/27/2014
Title:
Circuit Timing Analysis Incorporating the Effects of Temperature Inversion
40
Patent #:
9235346
Issue Dt:
01/12/2016
Application #:
14094846
Filing Dt:
12/03/2013
Publication #:
US20150074328
Pub Dt:
03/12/2015
Title:
DYNAMIC MAP PRE-FETCHING FOR IMPROVED SEQUENTIAL READS OF A SOLID-STATE MEDIA
41
Patent #:
9477423
Issue Dt:
10/25/2016
Application #:
14094900
Filing Dt:
12/03/2013
Publication #:
US20150149698
Pub Dt:
05/28/2015
Title:
ELIMINATING OR REDUCING PROGRAMMING ERRORS WHEN PROGRAMMING FLASH MEMORY CELLS
42
Patent #:
9542349
Issue Dt:
01/10/2017
Application #:
14096204
Filing Dt:
12/04/2013
Publication #:
US20150154138
Pub Dt:
06/04/2015
Title:
WIDE PORT EMULATION AT SERIAL ATTACHED SCSI EXPANDERS USING VIRTUAL PHYSICAL LINKS
43
Patent #:
9324039
Issue Dt:
04/26/2016
Application #:
14097763
Filing Dt:
12/05/2013
Publication #:
US20150149395
Pub Dt:
05/28/2015
Title:
INCREMENTAL UPDATES FOR ORDERED MULTI-FIELD CLASSIFICATION RULES WHEN REPRESENTED BY A TREE OF LONGEST PREFIX MATCHING TABLES
44
Patent #:
NONE
Issue Dt:
Application #:
14099589
Filing Dt:
12/06/2013
Publication #:
US20140095754
Pub Dt:
04/03/2014
Title:
BACK-OFF RETRY WITH PRIORITY ROUTING
45
Patent #:
9317361
Issue Dt:
04/19/2016
Application #:
14100280
Filing Dt:
12/09/2013
Publication #:
US20150149855
Pub Dt:
05/28/2015
Title:
BIT-LINE DEFECT DETECTION USING UNSATISFIED PARITY CODE CHECKS
46
Patent #:
9323606
Issue Dt:
04/26/2016
Application #:
14101368
Filing Dt:
12/10/2013
Publication #:
US20150143196
Pub Dt:
05/21/2015
Title:
Systems and Methods for FAID Follower Decoding
47
Patent #:
9489256
Issue Dt:
11/08/2016
Application #:
14101679
Filing Dt:
12/10/2013
Publication #:
US20150128006
Pub Dt:
05/07/2015
Title:
DEVICE QUALITY METRICS USING UNSATISFIED PARITY CHECKS
48
Patent #:
NONE
Issue Dt:
Application #:
14102649
Filing Dt:
12/11/2013
Publication #:
US20150103604
Pub Dt:
04/16/2015
Title:
MEMORY ARRAY ARCHITECTURES HAVING MEMORY CELLS WITH SHARED WRITE ASSIST CIRCUITRY
49
Patent #:
9021141
Issue Dt:
04/28/2015
Application #:
14103679
Filing Dt:
12/11/2013
Publication #:
US20150058533
Pub Dt:
02/26/2015
Title:
DATA STORAGE CONTROLLER AND METHOD FOR EXPOSING INFORMATION STORED IN A DATA STORAGE CONTROLLER TO A HOST SYSTEM
50
Patent #:
9337866
Issue Dt:
05/10/2016
Application #:
14104368
Filing Dt:
12/12/2013
Publication #:
US20140359394
Pub Dt:
12/04/2014
Title:
APPARATUS FOR PROCESSING SIGNALS CARRYING MODULATION-ENCODED PARITY BITS
51
Patent #:
9130507
Issue Dt:
09/08/2015
Application #:
14104458
Filing Dt:
12/12/2013
Title:
Gain Smoothing for Burst Demodulation in Servo Channel
52
Patent #:
NONE
Issue Dt:
Application #:
14104537
Filing Dt:
12/12/2013
Publication #:
US20150162781
Pub Dt:
06/11/2015
Title:
Illumination-Based Charging System for Portable Devices
53
Patent #:
8949700
Issue Dt:
02/03/2015
Application #:
14104626
Filing Dt:
12/12/2013
Publication #:
US20140177767
Pub Dt:
06/26/2014
Title:
METHOD AND APPARATUS FOR JOINT EQUALIZATION AND DECODING OF MULTIDIMENSIONAL CODES TRANSMITTED OVER MULTIPLE SYMBOL DURATIONS
54
Patent #:
9104334
Issue Dt:
08/11/2015
Application #:
14106045
Filing Dt:
12/13/2013
Publication #:
US20150058557
Pub Dt:
02/26/2015
Title:
Performance Improvements in Input / Output Operations Between a Host System and an Adapter-Coupled Cache
55
Patent #:
9001445
Issue Dt:
04/07/2015
Application #:
14106537
Filing Dt:
12/13/2013
Title:
MULTIPLE SYNC MARK STORAGE SYSTEM
56
Patent #:
9276609
Issue Dt:
03/01/2016
Application #:
14108226
Filing Dt:
12/16/2013
Publication #:
US20150143202
Pub Dt:
05/21/2015
Title:
Systems and Methods for Soft Decision Generation in a Solid State Memory System
57
Patent #:
8861122
Issue Dt:
10/14/2014
Application #:
14108282
Filing Dt:
12/16/2013
Title:
Systems and Methods for Sync Mark Based Read Offset Detection
58
Patent #:
9058115
Issue Dt:
06/16/2015
Application #:
14109570
Filing Dt:
12/17/2013
Publication #:
US20150160869
Pub Dt:
06/11/2015
Title:
Systems and Methods for Multi-Dimensional Data Processor Operational Marginalization
59
Patent #:
8937781
Issue Dt:
01/20/2015
Application #:
14109705
Filing Dt:
12/17/2013
Title:
Constant False Alarm Resonance Detector
60
Patent #:
8917467
Issue Dt:
12/23/2014
Application #:
14109804
Filing Dt:
12/17/2013
Title:
SYSTEMS AND METHODS FOR ATI MITIGATION
61
Patent #:
9734062
Issue Dt:
08/15/2017
Application #:
14132440
Filing Dt:
12/18/2013
Publication #:
US20150169458
Pub Dt:
06/18/2015
Title:
SYSTEM AND METHODS FOR CACHING A SMALL SIZE I/O TO IMPROVE CACHING DEVICE ENDURANCE
62
Patent #:
NONE
Issue Dt:
Application #:
14132881
Filing Dt:
12/18/2013
Publication #:
US20150145740
Pub Dt:
05/28/2015
Title:
Integrated Frequency Multiplier and Slot Antenna
63
Patent #:
9209835
Issue Dt:
12/08/2015
Application #:
14135837
Filing Dt:
12/20/2013
Publication #:
US20150149840
Pub Dt:
05/28/2015
Title:
Read Retry For Non-Volatile Memories
64
Patent #:
9679143
Issue Dt:
06/13/2017
Application #:
14135912
Filing Dt:
12/20/2013
Publication #:
US20150127871
Pub Dt:
05/07/2015
Title:
UPDATED IO MEMORY MANAGEMENT UNIT IDENTITY SETTINGS FOR DMA REMAPPING
65
Patent #:
8995072
Issue Dt:
03/31/2015
Application #:
14135984
Filing Dt:
12/20/2013
Title:
Servo System With Signal To Noise Ratio Marginalization
66
Patent #:
9129647
Issue Dt:
09/08/2015
Application #:
14136051
Filing Dt:
12/20/2013
Publication #:
US20150179213
Pub Dt:
06/25/2015
Title:
Servo Channel With Equalizer Adaptation
67
Patent #:
9148520
Issue Dt:
09/29/2015
Application #:
14136203
Filing Dt:
12/20/2013
Publication #:
US20150163363
Pub Dt:
06/11/2015
Title:
LOW COMPLEXITY TONE/VOICE DISCRIMINATION METHOD USING A RISING EDGE OF A FREQUENCY POWER ENVELOPE
68
Patent #:
9236099
Issue Dt:
01/12/2016
Application #:
14136283
Filing Dt:
12/20/2013
Publication #:
US20150162057
Pub Dt:
06/11/2015
Title:
MULTIPLE RETRY READS IN A READ CHANNEL OF A MEMORY
69
Patent #:
8943226
Issue Dt:
01/27/2015
Application #:
14136289
Filing Dt:
12/20/2013
Title:
INTERFACE FOR HETEROGENEOUS PCI-E STORAGE DEVICES
70
Patent #:
9304851
Issue Dt:
04/05/2016
Application #:
14136380
Filing Dt:
12/20/2013
Publication #:
US20150149856
Pub Dt:
05/28/2015
Title:
DECODING WITH LOG LIKELIHOOD RATIOS STORED IN A CONTROLLER
71
Patent #:
NONE
Issue Dt:
Application #:
14138637
Filing Dt:
12/23/2013
Publication #:
US20140164653
Pub Dt:
06/12/2014
Title:
Load Balancing with SCSI I/O Referrals
72
Patent #:
9400614
Issue Dt:
07/26/2016
Application #:
14138641
Filing Dt:
12/23/2013
Publication #:
US20150160886
Pub Dt:
06/11/2015
Title:
METHOD AND SYSTEM FOR PROGRAMMABLE SEQUENCER FOR PROCESSING I/O FOR VARIOUS PCIe DISK DRIVES
73
Patent #:
9130599
Issue Dt:
09/08/2015
Application #:
14140451
Filing Dt:
12/24/2013
Publication #:
US20150180512
Pub Dt:
06/25/2015
Title:
Systems and Methods of Converting Detector Output To Multi-Level Soft Information
74
Patent #:
9026687
Issue Dt:
05/05/2015
Application #:
14140669
Filing Dt:
12/26/2013
Title:
HOST BASED ENUMERATION AND CONFIGURATION FOR COMPUTER EXPANSION BUS CONTROLLERS
75
Patent #:
NONE
Issue Dt:
Application #:
14140769
Filing Dt:
12/26/2013
Publication #:
US20150077188
Pub Dt:
03/19/2015
Title:
VOLTAGE FOLLOWER AMPLIFIER
76
Patent #:
8792198
Issue Dt:
07/29/2014
Application #:
14141682
Filing Dt:
12/27/2013
Title:
HIGH IMPEDANCE LOW NOISE CROSS-COUPLED AMPLIFIER FOR USE IN AS A PREAMPLIFIER IN A MAGNETIC DATA STORAGE SYSTEM
77
Patent #:
9397674
Issue Dt:
07/19/2016
Application #:
14145493
Filing Dt:
12/31/2013
Publication #:
US20150188551
Pub Dt:
07/02/2015
Title:
CLOCK RECOVERY USING QUANTIZED PHASE ERROR SAMPLES USING JITTER FREQUENCY-DEPENDENT QUANTIZATION THRESHOLDS AND LOOP GAINS
78
Patent #:
9239679
Issue Dt:
01/19/2016
Application #:
14145943
Filing Dt:
01/01/2014
Publication #:
US20150178201
Pub Dt:
06/25/2015
Title:
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Filing Dt:
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Publication #:
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Pub Dt:
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Title:
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80
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Filing Dt:
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Publication #:
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Pub Dt:
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Title:
METHOD AND APPARATUS FOR DETECTING THE INITIATOR/TARGET ORIENTATION OF A SMART BRIDGE
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Application #:
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Filing Dt:
01/03/2014
Publication #:
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Pub Dt:
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Title:
RECEIVER WITH PIPELINED TAP COEFFICIENTS AND SHIFT CONTROL
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Filing Dt:
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Publication #:
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Pub Dt:
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Title:
PREVENTING PROGRAMMING ERRORS FROM OCCURRING WHEN PROGRAMMING FLASH MEMORY CELLS
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Publication #:
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Pub Dt:
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Title:
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Title:
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85
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Pub Dt:
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Title:
SYSTEM AND METHOD FOR USING CLOCK CHAIN SIGNALS OF AN ON-CHIP CLOCK CONTROLLER TO CONTROL CROSS-DOMAIN PATHS
86
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Title:
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Title:
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Title:
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91
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Title:
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Title:
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Title:
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94
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Title:
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Title:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
DECOUPLED LOCKING DMA ARCHITECTURE
Assignors
1
LSI CORPORATION
Exec Dt:
05/06/2014
2
AGERE SYSTEMS LLC
Exec Dt:
05/06/2014
Assignee
1
DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
60 WALL STREET
NEW YORK, NEW YORK 10005
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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