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Reel/Frame:032856/0031   Pages: 443
Recorded: 05/08/2014
Attorney Dkt #:040981-0072
Conveyance: PATENT SECURITY AGREEMENT
Total properties: 11127
Page 47 of 112
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112
1
Patent #:
6513992
Issue Dt:
02/04/2003
Application #:
09726097
Filing Dt:
11/29/2000
Publication #:
US20020064352
Pub Dt:
05/30/2002
Title:
PLANAR FIBER OPTICAL HOUSING
2
Patent #:
6338992
Issue Dt:
01/15/2002
Application #:
09726107
Filing Dt:
11/29/2000
Title:
Programmable read only memory in CMOS process flow
3
Patent #:
6948054
Issue Dt:
09/20/2005
Application #:
09726144
Filing Dt:
11/29/2000
Publication #:
US20020066006
Pub Dt:
05/30/2002
Title:
SIMPLE BRANCH PREDICTION AND MISPREDICTION RECOVERY METHOD
4
Patent #:
6987543
Issue Dt:
01/17/2006
Application #:
09726819
Filing Dt:
11/30/2000
Title:
SYSTEM TO EFFICIENTLY TRANSMIT TWO HDTV CHANNELS OVER SATELLITE USING TURBO CODED 8PSK MODULATION FOR DSS COMPLIANT RECEIVERS
5
Patent #:
6633032
Issue Dt:
10/14/2003
Application #:
09727014
Filing Dt:
11/30/2000
Publication #:
US20020063201
Pub Dt:
05/30/2002
Title:
MASS SPECTROMETER PARTICLE COUNTER
6
Patent #:
6507524
Issue Dt:
01/14/2003
Application #:
09727043
Filing Dt:
11/30/2000
Title:
INTEGRATED CIRCUIT MEMORY HAVING COLUMN REDUNDANCY
7
Patent #:
6432814
Issue Dt:
08/13/2002
Application #:
09727195
Filing Dt:
11/30/2000
Publication #:
US20020064940
Pub Dt:
05/30/2002
Title:
METHOD OF MANUFACTURING AN INTERCONNECT STRUCTURE HAVING A PASSIVATION LAYER FOR PREVENTING SUBSEQUENT PROCESSING REACTIONS
8
Patent #:
6537887
Issue Dt:
03/25/2003
Application #:
09727325
Filing Dt:
11/30/2000
Publication #:
US20020063308
Pub Dt:
05/30/2002
Title:
INTEGRATED CIRCUIT FABRICATION
9
Patent #:
6585830
Issue Dt:
07/01/2003
Application #:
09727326
Filing Dt:
11/30/2000
Publication #:
US20020062846
Pub Dt:
05/30/2002
Title:
METHOD FOR CLEANING TUNGSTEN FROM DEPOSITION WALL CHAMBERS
10
Patent #:
6449760
Issue Dt:
09/10/2002
Application #:
09727426
Filing Dt:
11/30/2000
Publication #:
US20020066066
Pub Dt:
05/30/2002
Title:
PIN PLACEMENT METHOD FOR INTEGRATED CIRCUITS
11
Patent #:
6466038
Issue Dt:
10/15/2002
Application #:
09727427
Filing Dt:
11/30/2000
Title:
NON-ISOTHERMAL ELECTROMIGRATION TESTING OF MICROELECTRONIC PACKAGING INTERCONNECTS
12
Patent #:
6504641
Issue Dt:
01/07/2003
Application #:
09727557
Filing Dt:
12/01/2000
Publication #:
US20020093722
Pub Dt:
07/18/2002
Title:
DRIVER AND METHOD OF OPERATING A MICRO-ELECTROMECHANICAL SYSTEM DEVICE
13
Patent #:
6550984
Issue Dt:
04/22/2003
Application #:
09727772
Filing Dt:
12/01/2000
Publication #:
US20020067899
Pub Dt:
06/06/2002
Title:
INTEGRATED OPTICAL COMPONENT WITH PHOTODETECTOR FOR AUTOMATED MANUFACTURING PLATFORM
14
Patent #:
6500717
Issue Dt:
12/31/2002
Application #:
09728448
Filing Dt:
12/01/2000
Publication #:
US20020068420
Pub Dt:
06/06/2002
Title:
METHOD FOR MAKING AN INTEGRATED CIRCUIT DEVICE WITH DIELECTRICALLY ISOLATED TUBS AND RELATED CIRCUIT
15
Patent #:
6469587
Issue Dt:
10/22/2002
Application #:
09729002
Filing Dt:
12/04/2000
Publication #:
US20020113659
Pub Dt:
08/22/2002
Title:
DIFFERENTIAL LC VOLTAGE-CONTROLLED OSCILLATOR
16
Patent #:
6785384
Issue Dt:
08/31/2004
Application #:
09729005
Filing Dt:
12/04/2000
Publication #:
US20020067824
Pub Dt:
06/06/2002
Title:
TWO-STEP ALGORITHM FOR TRAINING AN ECHO CANCELLATION FILTER
17
Patent #:
6366508
Issue Dt:
04/02/2002
Application #:
09729020
Filing Dt:
12/04/2000
Title:
INTEGRATED CIRCUIT MEMORY HAVING COLUMN REDUNDANCY WITH NO TIMING PENALITY
18
Patent #:
6973561
Issue Dt:
12/06/2005
Application #:
09729508
Filing Dt:
12/04/2000
Title:
PROCESSOR PIPELINE STALL BASED ON DATA REGISTER STATUS
19
Patent #:
6526141
Issue Dt:
02/25/2003
Application #:
09730442
Filing Dt:
12/05/2000
Publication #:
US20020114445
Pub Dt:
08/22/2002
Title:
METHOD AND APPARATUS FOR NETWORK ECHO CANCELLATION USING A PROPORTIONATE NORMALIZED LEAST MEAN SQUARES ALGORITHM
20
Patent #:
6413151
Issue Dt:
07/02/2002
Application #:
09730704
Filing Dt:
12/06/2000
Publication #:
US20010003700
Pub Dt:
06/14/2001
Title:
CMP SLURRY RECYCLING APPARATUS AND METHOD FOR RECYCLING CMP SLURRY
21
Patent #:
7003094
Issue Dt:
02/21/2006
Application #:
09730781
Filing Dt:
12/07/2000
Publication #:
US20020072331
Pub Dt:
06/13/2002
Title:
ADAPTIVE INTERFERENCE CANCELLATION FOR ADSL
22
Patent #:
6896583
Issue Dt:
05/24/2005
Application #:
09731402
Filing Dt:
02/06/2001
Publication #:
US20020106971
Pub Dt:
08/08/2002
Title:
METHOD AND APPARATUS FOR CONDITIONING A POLISHING PAD
23
Patent #:
6584537
Issue Dt:
06/24/2003
Application #:
09731476
Filing Dt:
12/06/2000
Title:
DATA-CACHE DATA-PATH
24
Patent #:
6574026
Issue Dt:
06/03/2003
Application #:
09731493
Filing Dt:
12/07/2000
Publication #:
US20020071166
Pub Dt:
06/13/2002
Title:
MAGNETICALLY PACKAGED OPTICAL MEMS DEVICE AND METHOD FOR MAKING THE SAME
25
Patent #:
6927079
Issue Dt:
08/09/2005
Application #:
09731596
Filing Dt:
12/06/2000
Title:
METHOD FOR PROBING A SEMICONDUCTOR WAFER
26
Patent #:
6671781
Issue Dt:
12/30/2003
Application #:
09732946
Filing Dt:
12/08/2000
Title:
DATA CACHE STORE BUFFER
27
Patent #:
6590433
Issue Dt:
07/08/2003
Application #:
09733445
Filing Dt:
12/08/2000
Publication #:
US20020070769
Pub Dt:
06/13/2002
Title:
REDUCED POWER CONSUMPTION BI-DIRECTIONAL BUFFER
28
Patent #:
6576522
Issue Dt:
06/10/2003
Application #:
09733570
Filing Dt:
12/08/2000
Publication #:
US20020072187
Pub Dt:
06/13/2002
Title:
METHODS FOR DEUTERIUM SINTERING
29
Patent #:
6912560
Issue Dt:
06/28/2005
Application #:
09733686
Filing Dt:
12/08/2000
Publication #:
US20020103842
Pub Dt:
08/01/2002
Title:
ADDER WITH IMPROVED OVERFLOW FLAG GENERATION
30
Patent #:
6725389
Issue Dt:
04/20/2004
Application #:
09734539
Filing Dt:
12/11/2000
Title:
A METHOD FOR MINIMIZING CLOCK SKEW BY RELOCATING A CLOCK BUFFER UNTIL CLOCK SKEW IS WITHIN A TOLERABLE LIMIT
31
Patent #:
6292409
Issue Dt:
09/18/2001
Application #:
09734999
Filing Dt:
12/12/2000
Title:
System for programmable chip initialization
32
Patent #:
6586814
Issue Dt:
07/01/2003
Application #:
09735084
Filing Dt:
12/11/2000
Title:
ETCH RESISTANT SHALLOW TRENCH ISOLATION IN A SEMICONDUCTOR WAFER
33
Patent #:
6605951
Issue Dt:
08/12/2003
Application #:
09735085
Filing Dt:
12/11/2000
Title:
INTERCONNECTOR AND METHOD OF CONNECTING PROBES TO A DIE FOR FUNCTIONAL ANALYSIS
34
Patent #:
6341092
Issue Dt:
01/22/2002
Application #:
09735233
Filing Dt:
12/11/2000
Title:
Designing memory for testability to support scan capability in an asic design
35
Patent #:
6634014
Issue Dt:
10/14/2003
Application #:
09735255
Filing Dt:
12/12/2000
Title:
DELAY/LOAD ESTIMATION FOR USE IN INTEGRATED CIRCUIT DESIGN
36
Patent #:
6552618
Issue Dt:
04/22/2003
Application #:
09735699
Filing Dt:
12/13/2000
Publication #:
US20020075080
Pub Dt:
06/20/2002
Title:
VCO GAIN SELF-CALIBRATION FOR LOW VOLTAGE PHASE LOCK-LOOP APPLICATIONS
37
Patent #:
6691272
Issue Dt:
02/10/2004
Application #:
09735820
Filing Dt:
12/12/2000
Publication #:
US20020071334
Pub Dt:
06/13/2002
Title:
TESTING OF HIGH SPEED DDR INTERFACE USING SINGLE CLOCK EDGE TRIGGERED TESTER DATA
38
Patent #:
6536027
Issue Dt:
03/18/2003
Application #:
09735837
Filing Dt:
12/13/2000
Title:
CELL PIN EXTENSIONS FOR INTEGRATED CIRCUITS
39
Patent #:
6487001
Issue Dt:
11/26/2002
Application #:
09736011
Filing Dt:
12/13/2000
Publication #:
US20020071171
Pub Dt:
06/13/2002
Title:
ARTICLE COMPRISING WEDGE-SHAPED ELECTRODES
40
Patent #:
6546539
Issue Dt:
04/08/2003
Application #:
09736571
Filing Dt:
12/14/2000
Title:
NETLIST RESYNTHESIS PROGRAM USING STRUCTURE CO-FACTORING
41
Patent #:
6973524
Issue Dt:
12/06/2005
Application #:
09736883
Filing Dt:
12/14/2000
Title:
INTERFACE FOR BUS INDEPENDENT CORE
42
Patent #:
6691275
Issue Dt:
02/10/2004
Application #:
09736989
Filing Dt:
12/14/2000
Title:
ENCODER WITH VECTOR-CALCULATED DISPARITY LOGIC
43
Patent #:
6469843
Issue Dt:
10/22/2002
Application #:
09737027
Filing Dt:
12/14/2000
Publication #:
US20020135884
Pub Dt:
09/26/2002
Title:
OPTICAL BENCH ASSEMBLY AND FABRICATION METHOD
44
Patent #:
6557144
Issue Dt:
04/29/2003
Application #:
09737239
Filing Dt:
12/14/2000
Title:
NETLIST RESYNTHESIS PROGRAM BASED ON PHYSICAL DELAY CALCULATION
45
Patent #:
6271911
Issue Dt:
08/07/2001
Application #:
09737504
Filing Dt:
12/15/2000
Publication #:
US20010000975
Pub Dt:
05/10/2001
Title:
Apparatus for enhancing image contrast using intensity filtration
46
Patent #:
6551410
Issue Dt:
04/22/2003
Application #:
09737717
Filing Dt:
12/15/2000
Publication #:
US20020074016
Pub Dt:
06/20/2002
Title:
METHOD OF CLEANING A SEMICONDUCTOR WAFER WITH A CLEANING BRUSH ASSEMBLY HAVING A CONTRACTIBLE AN EXPANDABLE ARBOR
47
Patent #:
6529400
Issue Dt:
03/04/2003
Application #:
09737837
Filing Dt:
12/15/2000
Title:
SOURCE PULSED, DYNAMIC THRESHOLD COMPLEMENTARY METAL OXIDE SEMICONDUCTOR STATIC RAM CELLS
48
Patent #:
7032104
Issue Dt:
04/18/2006
Application #:
09738485
Filing Dt:
12/15/2000
Title:
CONFIGURABLE HARDWARE REGISTER STACK FOR CPU ARCHITECTURES
49
Patent #:
6930688
Issue Dt:
08/16/2005
Application #:
09739956
Filing Dt:
12/19/2000
Title:
GENERATOR OF GRAPHICS IN COMPUTER SYSTEM
50
Patent #:
6370078
Issue Dt:
04/09/2002
Application #:
09740604
Filing Dt:
12/19/2000
Title:
NOVEL WAY TO COMPENSATE THE EFFECT OF COUPLING BETWEEN BITLINES IN A MULTI-PORT MEMORIES
51
Patent #:
6697900
Issue Dt:
02/24/2004
Application #:
09740907
Filing Dt:
12/19/2000
Title:
BUS MONITOR AND METHOD OF GATHERING BUS PHASE INFORMATION IN REAL-TIME
52
Patent #:
6561951
Issue Dt:
05/13/2003
Application #:
09741343
Filing Dt:
12/21/2000
Publication #:
US20020082142
Pub Dt:
06/27/2002
Title:
NETWORKED BIOMETRICALLY SECURED FITNESS DEVICE SCHEDULER
53
Patent #:
6576404
Issue Dt:
06/10/2003
Application #:
09741568
Filing Dt:
12/19/2000
Publication #:
US20020074313
Pub Dt:
06/20/2002
Title:
CARBON-DOPED HARD MASK AND METHOD OF PASSIVATING STRUCTURES DURING SEMICONDUCTOR DEVICE FABRICATION
54
Patent #:
6518619
Issue Dt:
02/11/2003
Application #:
09741667
Filing Dt:
12/19/2000
Publication #:
US20010030341
Pub Dt:
10/18/2001
Title:
VIRTUAL-GROUND, SPLIT-GATE FLASH MEMORY CELL ARRANGEMENTS AND METHOD FOR PRODUCING SAME
55
Patent #:
6794694
Issue Dt:
09/21/2004
Application #:
09742314
Filing Dt:
12/21/2000
Publication #:
US20020079522
Pub Dt:
06/27/2002
Title:
INTER-WIRING-LAYER CAPACITORS
56
Patent #:
6625250
Issue Dt:
09/23/2003
Application #:
09742855
Filing Dt:
12/19/2000
Publication #:
US20030142786
Pub Dt:
07/31/2003
Title:
OPTICAL STRUCTURES AND METHODS FOR X-RAY APPLICATIONS
57
Patent #:
6606371
Issue Dt:
08/12/2003
Application #:
09745236
Filing Dt:
12/19/2000
Publication #:
US20010043667
Pub Dt:
11/22/2001
Title:
X-RAY SYSTEM
58
Patent #:
7065151
Issue Dt:
06/20/2006
Application #:
09746352
Filing Dt:
12/21/2000
Publication #:
US20020118772
Pub Dt:
08/29/2002
Title:
CHANNEL OPTIMIZATION SYSTEM
59
Patent #:
6433714
Issue Dt:
08/13/2002
Application #:
09746724
Filing Dt:
12/20/2000
Publication #:
US20020105452
Pub Dt:
08/08/2002
Title:
APPARATUS AND METHOD FOR PRECISION TRIMMING OF A SEMICONDUCTOR DEVICE
60
Patent #:
6665245
Issue Dt:
12/16/2003
Application #:
09746748
Filing Dt:
12/22/2000
Title:
OPTICAL DISK INITIALIZATION METHOD AND APPARATUS
61
Patent #:
7873814
Issue Dt:
01/18/2011
Application #:
09746796
Filing Dt:
12/22/2000
Title:
MICROCODE BASED HARDWARE TRANSLATOR TO SUPPORT A MULTITUDE OF PROCESSORS
62
Patent #:
6461972
Issue Dt:
10/08/2002
Application #:
09747638
Filing Dt:
12/22/2000
Title:
INTEGRATED CIRCUIT FABRICATION DUAL PLASMA PROCESS WITH SEPARATE INTRODUCTION OF DIFFERENT GASES INTO GAS FLOW
63
Patent #:
6847513
Issue Dt:
01/25/2005
Application #:
09747924
Filing Dt:
12/27/2000
Publication #:
US20020080538
Pub Dt:
06/27/2002
Title:
CURRENT LIMITER FOR MAGNETO-RESISTIVE CIRCUIT ELEMENT
64
Patent #:
6990567
Issue Dt:
01/24/2006
Application #:
09748029
Filing Dt:
12/22/2000
Title:
USE OF INTERNAL GENERAL PURPOSE REGISTERS OF A PROCESSOR AS A JAVA VIRTUAL MACHINE TOP OF STACK AND DYNAMIC ALLOCATION OF THE REGISTERS ACCORDING TO STACK STATUS
65
Patent #:
6691306
Issue Dt:
02/10/2004
Application #:
09748030
Filing Dt:
12/22/2000
Title:
USE OF LIMITED PROGRAM SPACE OF GENERAL PURPOSE PROCESSOR FOR UNLIMITED SEQUENCE OF TRANSLATED INSTRUCTIONS
66
Patent #:
6804737
Issue Dt:
10/12/2004
Application #:
09748324
Filing Dt:
12/26/2000
Publication #:
US20020083249
Pub Dt:
06/27/2002
Title:
METHODS AND SYSTEMS FOR INTELLIGENT I/O CONTROLLER WITH CHANNEL EXPANDABILITY VIA MASTER/SLAVE CONFIGURATION
67
Patent #:
6718539
Issue Dt:
04/06/2004
Application #:
09748641
Filing Dt:
12/22/2000
Title:
INTERRUPT HANDLING MECHANISM IN TRANSLATOR FROM ONE INSTRUCTION SET TO ANOTHER
68
Patent #:
6348816
Issue Dt:
02/19/2002
Application #:
09749722
Filing Dt:
12/28/2000
Title:
Tracking percent overload signal as indicator of output signal magnitude
69
Patent #:
6439981
Issue Dt:
08/27/2002
Application #:
09750639
Filing Dt:
12/28/2000
Title:
ARRANGEMENT AND METHOD FOR POLISHING A SURFACE OF A SEMICONDUCTOR WAFER
70
Patent #:
6678625
Issue Dt:
01/13/2004
Application #:
09751760
Filing Dt:
12/29/2000
Title:
METHOD AND APPARATUS FOR A MULTIPURPOSE CONFIGURABLE BUS INDEPENDENT SIMULATION BUS FUNCTIONAL MODEL
71
Patent #:
6452713
Issue Dt:
09/17/2002
Application #:
09752240
Filing Dt:
12/29/2000
Publication #:
US20020084869
Pub Dt:
07/04/2002
Title:
DEVICE FOR TUNING THE PROPAGATION OF ELECTROMAGNETIC ENERGY
72
Patent #:
6353568
Issue Dt:
03/05/2002
Application #:
09752357
Filing Dt:
12/29/2000
Title:
Dual threshold voltage sense amplifier
73
Patent #:
6591410
Issue Dt:
07/08/2003
Application #:
09752626
Filing Dt:
12/28/2000
Title:
SIX-TO-ONE SIGNAL/POWER RATIO BUMP AND TRACE PATTERN FOR FLIP CHIP DESIGN
74
Patent #:
6407462
Issue Dt:
06/18/2002
Application #:
09753000
Filing Dt:
12/30/2000
Title:
IRREGULAR GRID BOND PAD LAYOUT ARRANGEMENT FOR A FLIP CHIP PACKAGE
75
Patent #:
6354908
Issue Dt:
03/12/2002
Application #:
09754429
Filing Dt:
01/04/2001
Publication #:
US20010021622
Pub Dt:
09/13/2001
Title:
Method and apparatus for detecting a planarized outer layer of a semiconductor wafer with a confocal optical system
76
Patent #:
6731386
Issue Dt:
05/04/2004
Application #:
09754611
Filing Dt:
01/04/2001
Publication #:
US20020085214
Pub Dt:
07/04/2002
Title:
MEASUREMENT TECHNIQUE FOR ULTRA-THIN OXIDES
77
Patent #:
6600851
Issue Dt:
07/29/2003
Application #:
09755727
Filing Dt:
01/05/2001
Publication #:
US20030103717
Pub Dt:
06/05/2003
Title:
ELECTROSTATICALLY ACTUATED MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) DEVICE
78
Patent #:
7927939
Issue Dt:
04/19/2011
Application #:
09755826
Filing Dt:
01/04/2001
Publication #:
US20010051400
Pub Dt:
12/13/2001
Title:
METHOD OF MANUFACTURING A LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE
79
Patent #:
7638380
Issue Dt:
12/29/2009
Application #:
09755828
Filing Dt:
01/04/2001
Publication #:
US20010049172
Pub Dt:
12/06/2001
Title:
METHOD FOR MANUFACTURING A LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE
80
Patent #:
6473014
Issue Dt:
10/29/2002
Application #:
09756353
Filing Dt:
01/08/2001
Publication #:
US20010002123
Pub Dt:
05/31/2001
Title:
SAMPLING DEVICE HAVING AN INTRINSIC FILTER
81
Patent #:
6535014
Issue Dt:
03/18/2003
Application #:
09756480
Filing Dt:
01/08/2001
Publication #:
US20020000824
Pub Dt:
01/03/2002
Title:
ELECTRICAL PARAMETER TESTER HAVING DECOUPLING MEANS
82
Patent #:
6526540
Issue Dt:
02/25/2003
Application #:
09756506
Filing Dt:
01/08/2001
Title:
FLIP CHIP TRACE LIBRARY GENERATOR
83
Patent #:
6898637
Issue Dt:
05/24/2005
Application #:
09756767
Filing Dt:
01/10/2001
Publication #:
US20020091847
Pub Dt:
07/11/2002
Title:
DISTRIBUTED AUDIO COLLABORATION METHOD AND APPARATUS
84
Patent #:
6664800
Issue Dt:
12/16/2003
Application #:
09756965
Filing Dt:
01/08/2001
Publication #:
US20020121914
Pub Dt:
09/05/2002
Title:
NON-CONTACT METHOD FOR DETERMINING QUALITY OF SEMICONDUCTOR DIELECTRICS
85
Patent #:
7142585
Issue Dt:
11/28/2006
Application #:
09758302
Filing Dt:
01/11/2001
Publication #:
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Pub Dt:
08/16/2001
Title:
ADAPTIVE CODE-TRACKING RECEIVER FOR DIRECT-SEQUENCE CODE-DIVISION MULTIPLE ACCESS (CDMA) COMMUNICATIONS OVER MULTIPATH FADING CHANNELS AND METHOD FOR SIGNAL PROCESSING IN A RAKE RECEIVER
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6741122
Issue Dt:
05/25/2004
Application #:
09758603
Filing Dt:
01/12/2001
Publication #:
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Pub Dt:
02/20/2003
Title:
ROUTING TECHNIQUE TO ADJUST CLOCK SKEW
87
Patent #:
6973441
Issue Dt:
12/06/2005
Application #:
09758909
Filing Dt:
01/10/2001
Title:
METHOD AND APPARATUS FOR MANAGING ACCOUNTS PAYABLE
88
Patent #:
7076439
Issue Dt:
07/11/2006
Application #:
09758972
Filing Dt:
01/10/2001
Title:
METHOD AND APPARATUS FOR MANAGING MULTIPLE PROJECTS
89
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6509242
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01/21/2003
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09759120
Filing Dt:
01/12/2001
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Pub Dt:
07/18/2002
Title:
HETEROJUNCTION BIPOLAR TRANSISTOR
90
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7058358
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06/06/2006
Application #:
09759527
Filing Dt:
01/16/2001
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Pub Dt:
07/18/2002
Title:
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91
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6745273
Issue Dt:
06/01/2004
Application #:
09759921
Filing Dt:
01/12/2001
Title:
AUTOMATIC DEADLOCK PREVENTION VIA ARBITRATION SWITCHING
92
Patent #:
7203220
Issue Dt:
04/10/2007
Application #:
09760094
Filing Dt:
01/12/2001
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Pub Dt:
03/28/2002
Title:
METHOD AND RAKE RECEIVER FOR CODE-TRACKING IN COMMUNICATION SYSTEMS
93
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6981164
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12/27/2005
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09760752
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01/17/2001
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Pub Dt:
12/06/2001
Title:
LINK INTEGRITY DUALITY FOR NETWORK DEVICES IN COLD POWER STATE
94
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6792297
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09/14/2004
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09760857
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01/17/2001
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Pub Dt:
07/18/2002
Title:
METHODS AND SYSTEMS FOR INDICATING CELLULAR TELEPHONE BATTERY- CHARGING INFORMATION
95
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7046649
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05/16/2006
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09761074
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01/16/2001
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08/02/2001
Title:
INTEROPERABILITY FOR BLUETOOTH/IEEE 802.11
96
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6870838
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03/22/2005
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09761172
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01/16/2001
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10/25/2001
Title:
MULTISTAGE DIGITAL CROSS CONNECT WITH INTEGRAL FRAME TIMING
97
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6628730
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09/30/2003
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09761306
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01/16/2001
Title:
DEMODULATING DIGITAL VIDEO BROADCAST SIGNALS
98
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7301941
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11/27/2007
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09761538
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01/16/2001
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US20010053160
Pub Dt:
12/20/2001
Title:
MULTISTAGE DIGITAL CROSS CONNECT WITH SYNCHRONIZED CONFIGURATION SWITCHING
99
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7260092
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08/21/2007
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09761539
Filing Dt:
01/16/2001
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Pub Dt:
10/25/2001
Title:
TIME SLOT INTERCHANGER
100
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6674166
Issue Dt:
01/06/2004
Application #:
09765827
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01/19/2001
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US20010020746
Pub Dt:
09/13/2001
Title:
FLIP-CHIP INTEGRATED CIRCUIT ROUTING TO I/O DEVICES
Assignors
1
LSI CORPORATION
Exec Dt:
05/06/2014
2
AGERE SYSTEMS LLC
Exec Dt:
05/06/2014
Assignee
1
DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
60 WALL STREET
NEW YORK, NEW YORK 10005
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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