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Reel/Frame:	032856/0031			Pages:	443
		Recorded:	05/08/2014
Attorney Dkt #:	040981-0072
Conveyance:	PATENT SECURITY AGREEMENT

Total properties: 11127
Page 63 of 112
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Patent #:	6861864	Issue Dt:	03/01/2005	Application #:	10418560	Filing Dt:	04/16/2003
Publication #:	US20040207406	Pub Dt:	10/21/2004
Title:	SELF-TIMED RELIABILITY AND YIELD VEHICLE ARRAY

Patent #:	7330428	Issue Dt:	02/12/2008	Application #:	10420017	Filing Dt:	04/18/2003
Publication #:	US20040114586	Pub Dt:	06/17/2004
Title:	GROOMING SWITCH HARDWARE SCHEDULER

Patent #:	7801934	Issue Dt:	09/21/2010	Application #:	10420153	Filing Dt:	04/22/2003
Publication #:	US20040213299	Pub Dt:	10/28/2004
Title:	POINTER GENERATION METHOD AND APPARATUS FOR DELAY COMPENSATION IN VIRTUAL CONCATENATION APPLICATIONS

Patent #:	7489710	Issue Dt:	02/10/2009	Application #:	10420156	Filing Dt:	04/22/2003
Publication #:	US20040213268	Pub Dt:	10/28/2004
Title:	STALL NEED DETECTION AND ASSOCIATED STALL MECHANISM FOR DELAY COMPENSATION IN VIRTUAL CONCATENATION APPLICATIONS

Patent #:	7062742	Issue Dt:	06/13/2006	Application #:	10420216	Filing Dt:	04/22/2003
Publication #:	US20040216071	Pub Dt:	10/28/2004
Title:	ROUTING STRUCTURE FOR TRANSCEIVER CORE

Patent #:	6768386	Issue Dt:	07/27/2004	Application #:	10420219	Filing Dt:	04/22/2003
Title:	DUAL CLOCK PACKAGE OPTION

Patent #:	7019923	Issue Dt:	03/28/2006	Application #:	10420236	Filing Dt:	04/22/2003
Publication #:	US20030234689	Pub Dt:	12/25/2003
Title:	PRE-AMPLIFIER EMPLOYING TRANSISTORS HAVING A DIMINISHED BREAKDOWN VOLTAGE AND A DISK DRIVE AND A THEVENIN WRITER EMPLOYING THE SAME

Patent #:	7029591	Issue Dt:	04/18/2006	Application #:	10421068	Filing Dt:	04/23/2003
Publication #:	US20040238492	Pub Dt:	12/02/2004
Title:	PLANARIZATION WITH REDUCED DISHING

Patent #:	7442113	Issue Dt:	10/28/2008	Application #:	10421421	Filing Dt:	04/23/2003
Publication #:	US20040214511	Pub Dt:	10/28/2004
Title:	VISUAL WEAR CONFIRMATION POLISHING PAD

Patent #:	6790784	Issue Dt:	09/14/2004	Application #:	10422270	Filing Dt:	04/24/2003
Publication #:	US20030207594	Pub Dt:	11/06/2003
Title:	PLASMA TREATMENT OF LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL TO FORM STRUCTURES USEFUL IN FORMATION OF METAL INTERCONNECTS AND/OR FILLED VIAS FOR INTERGRATED CIRCUIT STRUCTURE

Patent #:	6895365	Issue Dt:	05/17/2005	Application #:	10423081	Filing Dt:	04/25/2003
Publication #:	US20040215420	Pub Dt:	10/28/2004
Title:	SYSTEMS AND METHODS FOR ANALYZING DATA OF AN SPI DATA BUS

Patent #:	7120557	Issue Dt:	10/10/2006	Application #:	10423082	Filing Dt:	04/25/2003
Publication #:	US20040215421	Pub Dt:	10/28/2004
Title:	SYSTEMS AND METHODS FOR ANALYZING DATA OF A SAS/SATA DEVICE

Patent #:	6722948	Issue Dt:	04/20/2004	Application #:	10423096	Filing Dt:	04/25/2003
Title:	PAD CONDITIONING MONITOR

Patent #:	7262119	Issue Dt:	08/28/2007	Application #:	10423184	Filing Dt:	04/25/2003
Title:	METHOD FOR INCORPORATING GERMANIUM INTO A SEMICONDUCTOR WAFER

Patent #:	7039756	Issue Dt:	05/02/2006	Application #:	10424236	Filing Dt:	04/28/2003
Publication #:	US20040215893	Pub Dt:	10/28/2004
Title:	METHOD FOR USE OF TERNARY CAM TO IMPLEMENT SOFTWARE PROGRAMMABLE CACHE POLICIES

Patent #:	7062605	Issue Dt:	06/13/2006	Application #:	10424311	Filing Dt:	04/28/2003
Publication #:	US20040215877	Pub Dt:	10/28/2004
Title:	METHODS AND STRUCTURE FOR RAPID BACKGROUND INITIALIZATION OF A RAID LOGICAL UNIT

Patent #:	6728936	Issue Dt:	04/27/2004	Application #:	10425155	Filing Dt:	04/29/2003
Title:	DATAPATH BITSLICE TECHNOLOGY

Patent #:	7102732	Issue Dt:	09/05/2006	Application #:	10425369	Filing Dt:	04/28/2003
Publication #:	US20030206283	Pub Dt:	11/06/2003
Title:	METHOD OF MANUFACTURING A DEVICE BY EMPLOYING A LITHOGRAPHIC APPARATUS INCLUDING A SLIDING ELECTRON-OPTICAL ELEMENT

Patent #:	7007108	Issue Dt:	02/28/2006	Application #:	10426418	Filing Dt:	04/30/2003
Publication #:	US20040221246	Pub Dt:	11/04/2004
Title:	SYSTEM METHOD FOR USE OF HARDWARE SEMAPHORES FOR RESOURCE RELEASE NOTIFICATION WHEREIN MESSAGES COMPRISES READ-MODIFY-WRITE OPERATION AND ADDRESS

Patent #:	7062726	Issue Dt:	06/13/2006	Application #:	10426549	Filing Dt:	04/30/2003
Publication #:	US20040221247	Pub Dt:	11/04/2004
Title:	METHOD FOR GENERATING TECH-LIBRARY FOR LOGIC FUNCTION

Patent #:	7082584	Issue Dt:	07/25/2006	Application #:	10427609	Filing Dt:	04/30/2003
Publication #:	US20040221249	Pub Dt:	11/04/2004
Title:	AUTOMATED ANALYSIS OF RTL CODE CONTAINING ASIC VENDOR RULES

Patent #:	7263470	Issue Dt:	08/28/2007	Application #:	10429312	Filing Dt:	05/05/2003
Publication #:	US20040225481	Pub Dt:	11/11/2004
Title:	DIGITAL GAUSSIAN NOISE SIMULATOR

Patent #:	7018753	Issue Dt:	03/28/2006	Application #:	10429376	Filing Dt:	05/05/2003
Publication #:	US20040224236	Pub Dt:	11/11/2004
Title:	VARIABLE MASK FIELD EXPOSURE

Patent #:	7073023	Issue Dt:	07/04/2006	Application #:	10430529	Filing Dt:	05/05/2003
Publication #:	US20040225833	Pub Dt:	11/11/2004
Title:	METHOD FOR MINIMIZING RAID 0 DATA TRANSFER RATE VARIABILITY

Patent #:	6778462	Issue Dt:	08/17/2004	Application #:	10431940	Filing Dt:	05/08/2003
Title:	METAL-PROGRAMMABLE SINGLE-PORT SRAM ARRAY FOR DUAL-PORT FUNCTIONALITY

Patent #:	6963515	Issue Dt:	11/08/2005	Application #:	10431945	Filing Dt:	05/08/2003
Publication #:	US20040223398	Pub Dt:	11/11/2004
Title:	METHOD AND DEVICE FOR A SCALABLE MEMORY BUILDING BLOCK

Patent #:	6929532	Issue Dt:	08/16/2005	Application #:	10434028	Filing Dt:	05/08/2003
Title:	METHOD AND APPARATUS FOR FILTERING A CHEMICAL POLISHING SLURRY OF A WAFER FABRICATION PROCESS

Patent #:	6835972	Issue Dt:	12/28/2004	Application #:	10434715	Filing Dt:	05/09/2003
Publication #:	US20040129955	Pub Dt:	07/08/2004
Title:	BOWTIE AND T-SHAPED STRUCTURES OF L-SHAPED MESH IMPLEMENTATION

Patent #:	7020852	Issue Dt:	03/28/2006	Application #:	10435168	Filing Dt:	05/08/2003
Publication #:	US20040225972	Pub Dt:	11/11/2004
Title:	AUTOMATION OF THE DEVELOPMENT, TESTING, AND RELEASE OF A FLOW FRAMEWORK AND METHODOLOGY TO DESIGN INTEGRATED CIRCUITS

Patent #:	7001695	Issue Dt:	02/21/2006	Application #:	10435442	Filing Dt:	05/09/2003
Publication #:	US20040224239	Pub Dt:	11/11/2004
Title:	MULTIPLE ALTERNATING PHASE SHIFT TECHNOLOGY FOR AMPLIFYING RESOLUTION

Patent #:	6852648	Issue Dt:	02/08/2005	Application #:	10435561	Filing Dt:	05/09/2003
Publication #:	US20030207595	Pub Dt:	11/06/2003
Title:	SEMICONDUCTOR DEVICE HAVING A LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL AND PROCESS FOR ITS MANUFACTURE

Patent #:	6973637	Issue Dt:	12/06/2005	Application #:	10435870	Filing Dt:	05/12/2003
Publication #:	US20040230938	Pub Dt:	11/18/2004
Title:	PROCESS FOR THE SELECTIVE CONTROL OF FEATURE SIZE IN LITHOGRAPHIC PROCESSING

Patent #:	6912099	Issue Dt:	06/28/2005	Application #:	10436526	Filing Dt:	05/13/2003
Publication #:	US20040228019	Pub Dt:	11/18/2004
Title:	MAXIMUM LIKELIHOOD DETECTION OF ASYNCHRONOUS SERVO DATA EMPLOYING INTERPOLATION

Patent #:	7231001	Issue Dt:	06/12/2007	Application #:	10436527	Filing Dt:	05/13/2003
Publication #:	US20040190646	Pub Dt:	09/30/2004
Title:	PROCESSING SERVO DATA HAVING DC LEVEL SHIFTS

Patent #:	7107375	Issue Dt:	09/12/2006	Application #:	10437149	Filing Dt:	05/13/2003
Publication #:	US20040230728	Pub Dt:	11/18/2004
Title:	METHOD FOR IMPROVING SELECTION PERFORMANCE BY USING AN ARBITRATION ELIMINATION SCHEME IN A SCSI TOPOLOGY

Patent #:	7949723	Issue Dt:	05/24/2011	Application #:	10438109	Filing Dt:	05/14/2003
Publication #:	US20030236901	Pub Dt:	12/25/2003
Title:	REAL TIME TUNER FOR PROVIDING GRAPHICAL USER INTERFACE

Patent #:	6990651	Issue Dt:	01/24/2006	Application #:	10438530	Filing Dt:	05/14/2003
Publication #:	US20040230919	Pub Dt:	11/18/2004
Title:	ADVANCED DESIGN FORMAT LIBRARY FOR INTEGRATED CIRCUIT DESIGN SYNTHESIS AND FLOORPLANNING TOOLS

Patent #:	7817721	Issue Dt:	10/19/2010	Application #:	10438584	Filing Dt:	05/15/2003
Publication #:	US20040228414	Pub Dt:	11/18/2004
Title:	POSTING STATUS DATA IN DIGITAL TRANSPORT STREAM PROCESSING

Patent #:	7007248	Issue Dt:	02/28/2006	Application #:	10439373	Filing Dt:	05/15/2003
Publication #:	US20040230920	Pub Dt:	11/18/2004
Title:	METHOD AND APPARATUS FOR IMPLEMENTING ENGINEERING CHANGE ORDERS

Patent #:	6710416	Issue Dt:	03/23/2004	Application #:	10439863	Filing Dt:	05/16/2003
Title:	SPLIT-GATE METAL-OXIDE-SEMICONDUCTOR DEVICE

Patent #:	6981082	Issue Dt:	12/27/2005	Application #:	10440385	Filing Dt:	05/16/2003
Publication #:	US20040230729	Pub Dt:	11/18/2004
Title:	ON CHIP STREAMING MULTIPLE BUS PROTOCOL WITH DEDICATED ARBITER

Patent #:	7058379	Issue Dt:	06/06/2006	Application #:	10440897	Filing Dt:	05/19/2003
Publication #:	US20040235444	Pub Dt:	11/25/2004
Title:	ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING TRANSCEIVER AND METHOD OF OPERATING THE SAME

Patent #:	7047470	Issue Dt:	05/16/2006	Application #:	10441000	Filing Dt:	05/19/2003
Publication #:	US20040210806	Pub Dt:	10/21/2004
Title:	FLEXIBLE AND EXTENSIBLE IMPLEMENTATION OF SHARING TEST PINS IN ASIC

Patent #:	7185039	Issue Dt:	02/27/2007	Application #:	10441651	Filing Dt:	05/19/2003
Publication #:	US20040236813	Pub Dt:	11/25/2004
Title:	MULTIPLIER FOR MODULAR EXPONENTIATION

Patent #:	7286850	Issue Dt:	10/23/2007	Application #:	10441886	Filing Dt:	05/20/2003
Publication #:	US20040235519	Pub Dt:	11/25/2004
Title:	WIRELESS COMMUNICATION MODULE SYSTEM AND METHOD FOR PERFORMING A WIRELESS COMMUNICATION

Patent #:	6864152	Issue Dt:	03/08/2005	Application #:	10442533	Filing Dt:	05/20/2003
Title:	FABRICATION OF TRENCHES WITH MULTIPLE DEPTHS ON THE SAME SUBSTRATE

Patent #:	7076698	Issue Dt:	07/11/2006	Application #:	10442623	Filing Dt:	05/21/2003
Publication #:	US20040237007	Pub Dt:	11/25/2004
Title:	VECTOR MONITOR, RELATED METHOD OF CONTROLLING A TRANSMITTER AND TRANSMITTER EMPLOYING THE SAME

Patent #:	7345531	Issue Dt:	03/18/2008	Application #:	10442738	Filing Dt:	05/21/2003
Publication #:	US20040233599	Pub Dt:	11/25/2004
Title:	COMPARATOR CIRCUIT, RELATED METHOD OF COMPARING A VECTOR TO COMPARISON BOUNDARIES AND TRANSMITTER EMPLOYING THE SAME

Patent #:	6879509	Issue Dt:	04/12/2005	Application #:	10442832	Filing Dt:	05/21/2003
Publication #:	US20040233693	Pub Dt:	11/25/2004
Title:	READ-ONLY MEMORY ARCHITECTURE

Patent #:	7421273	Issue Dt:	09/02/2008	Application #:	10443072	Filing Dt:	05/22/2003
Publication #:	US20040092278	Pub Dt:	05/13/2004
Title:	MANAGING PRIORITY QUEUES AND ESCALATION IN WIRELESS COMMUNICATION SYSTEMS

Patent #:	7434223	Issue Dt:	10/07/2008	Application #:	10443493	Filing Dt:	05/22/2003
Publication #:	US20040236930	Pub Dt:	11/25/2004
Title:	SYSTEM AND METHOD FOR ALLOWING A CURRENT CONTEXT TO CHANGE AN EVENT SENSITIVITY OF A FUTURE CONTEXT

Patent #:	7236525	Issue Dt:	06/26/2007	Application #:	10443973	Filing Dt:	05/22/2003
Publication #:	US20040233994	Pub Dt:	11/25/2004
Title:	RECONFIGURABLE COMPUTING BASED MULTI-STANDARD VIDEO CODEC

Patent #:	7260164	Issue Dt:	08/21/2007	Application #:	10444697	Filing Dt:	05/23/2003
Publication #:	US20040234015	Pub Dt:	11/25/2004
Title:	EFFICIENT FILTERING OF RXLOS SIGNAL IN SERDES APPLICATIONS

Patent #:	6978407	Issue Dt:	12/20/2005	Application #:	10445437	Filing Dt:	05/27/2003
Publication #:	US20040243890	Pub Dt:	12/02/2004
Title:	METHOD AND ARCHITECTURE FOR DETECTING RANDOM AND SYSTEMATIC TRANSISTOR DEGRADATION FOR TRANSISTOR RELIABILITY EVALUATION IN HIGH-DENSITY MEMORY

Patent #:	7817716	Issue Dt:	10/19/2010	Application #:	10447739	Filing Dt:	05/29/2003
Publication #:	US20040240546	Pub Dt:	12/02/2004
Title:	METHOD AND/OR APPARATUS FOR ANALYZING THE CONTENT OF A SURVEILLANCE IMAGE

Patent #:	6777807	Issue Dt:	08/17/2004	Application #:	10448082	Filing Dt:	05/29/2003
Title:	INTERCONNECT INTEGRATION

Patent #:	7310371	Issue Dt:	12/18/2007	Application #:	10449471	Filing Dt:	05/30/2003
Publication #:	US20040240549	Pub Dt:	12/02/2004
Title:	METHOD AND/OR APPARATUS FOR REDUCING THE COMPLEXITY OF H.264 B-FRAME ENCODING USING SELECTIVE RECONSTRUCTION

Patent #:	6828831	Issue Dt:	12/07/2004	Application #:	10452089	Filing Dt:	05/30/2003
Publication #:	US20040239412	Pub Dt:	12/02/2004
Title:	CIRCUIT FOR CONTROLLING FIELD EFFECT DEVICE TRANSCONDUCTANCE

Patent #:	6842082	Issue Dt:	01/11/2005	Application #:	10452091	Filing Dt:	05/30/2003
Publication #:	US20040239431	Pub Dt:	12/02/2004
Title:	PROGRAMMABLE VOLTAGE-CONTROLLED OSCILLATOR WITH SELF-CALIBRATION FEATURE

Patent #:	7899659	Issue Dt:	03/01/2011	Application #:	10452260	Filing Dt:	06/02/2003
Publication #:	US20040243372	Pub Dt:	12/02/2004
Title:	RECORDING AND DISPLAYING LOGIC CIRCUIT SIMULATION WAVEFORMS

Patent #:	7327786	Issue Dt:	02/05/2008	Application #:	10452262	Filing Dt:	06/02/2003
Publication #:	US20040240556	Pub Dt:	12/02/2004
Title:	METHOD FOR IMPROVING RATE-DISTORTION PERFORMANCE OF A VIDEO COMPRESSION SYSTEM THROUGH PARALLEL COEFFICIENT CANCELLATION IN THE TRANSFORM

Patent #:	6937028	Issue Dt:	08/30/2005	Application #:	10452329	Filing Dt:	05/30/2003
Publication #:	US20040239340	Pub Dt:	12/02/2004
Title:	RESISTOR VALUE DETECTION CIRCUIT

Patent #:	7332062	Issue Dt:	02/19/2008	Application #:	10452360	Filing Dt:	06/02/2003
Title:	ELECTROPLATING TOOL FOR SEMICONDUCTOR MANUFACTURE HAVING ELECTRIC FIELD CONTROL

Patent #:	7577952	Issue Dt:	08/18/2009	Application #:	10452472	Filing Dt:	05/30/2003
Publication #:	US20040244002	Pub Dt:	12/02/2004
Title:	COMMON STATE SEQUENCES IN A FINITE STATE MACHINE

Patent #:	6812797	Issue Dt:	11/02/2004	Application #:	10452657	Filing Dt:	05/30/2003
Title:	PHASE-LOCKED LOOP WITH LOOP SELECT SIGNAL BASED SWITCHING BETWEEN FREQUENCY DETECTION AND PHASE DETECTION

Patent #:	6806740	Issue Dt:	10/19/2004	Application #:	10452661	Filing Dt:	05/30/2003
Title:	REDUCED COMPLEXITY LINEAR PHASE DETECTOR

Patent #:	7020859	Issue Dt:	03/28/2006	Application #:	10452689	Filing Dt:	06/02/2003
Publication #:	US20040241990	Pub Dt:	12/02/2004
Title:	PROCESS SKEW RESULTS FOR INTEGRATED CIRCUITS

Patent #:	6864141	Issue Dt:	03/08/2005	Application #:	10453118	Filing Dt:	06/03/2003
Title:	METHOD OF INCORPORATING NITROGEN INTO METAL SILICATE BASED DIELECTRICS BY ENERGIZED NITROGEN ION BEAMS

Patent #:	7143250	Issue Dt:	11/28/2006	Application #:	10453133	Filing Dt:	06/02/2003
Title:	METHODS AND SYSTEMS FOR IMPROVING MIRROR PERFORMANCE VIA OPTIMIZED MULTI-CHANNEL UTILIZATION

Patent #:	7069535	Issue Dt:	06/27/2006	Application #:	10453182	Filing Dt:	06/03/2003
Publication #:	US20040250232	Pub Dt:	12/09/2004
Title:	OPTICAL PROXIMITY CORRECTION METHOD USING WEIGHTED PRIORITIES

Patent #:	6948142	Issue Dt:	09/20/2005	Application #:	10453819	Filing Dt:	06/02/2003
Publication #:	US20040243956	Pub Dt:	12/02/2004
Title:	INTELLIGENT ENGINE FOR PROTECTION AGAINST INJECTED CROSSTALK DELAY

Patent #:	6911093	Issue Dt:	06/28/2005	Application #:	10453821	Filing Dt:	06/02/2003
Publication #:	US20040237891	Pub Dt:	12/02/2004
Title:	LID LINER FOR CHEMICAL VAPOR DEPOSITION CHAMBER

Patent #:	6880140	Issue Dt:	04/12/2005	Application #:	10454027	Filing Dt:	06/04/2003
Publication #:	US20040249598	Pub Dt:	12/09/2004
Title:	METHOD TO SELECTIVELY IDENTIFY RELIABILITY RISK DIE BASED ON CHARACTERISTICS OF LOCAL REGIONS ON THE WAFER

Patent #:	6825089	Issue Dt:	11/30/2004	Application #:	10454133	Filing Dt:	06/04/2003
Publication #:	US20040245604	Pub Dt:	12/09/2004
Title:	INCREASED QUALITY FACTOR OF A VARACTOR IN AN INTEGRATED CIRCUIT VIA A HIGH CONDUCTIVE REGION IN A WELL

Patent #:	7429749	Issue Dt:	09/30/2008	Application #:	10455489	Filing Dt:	06/04/2003
Publication #:	US20040247894	Pub Dt:	12/09/2004
Title:	STRAINED-SILICON FOR CMOS DEVICE USING AMORPHOUS SILICON DEPOSITION OR SILICON EPITAXIAL GROWTH

Patent #:	6911736	Issue Dt:	06/28/2005	Application #:	10456281	Filing Dt:	06/06/2003
Publication #:	US20040245632	Pub Dt:	12/09/2004
Title:	ELECTROSTATIC DISCHARGE PROTECTION

Patent #:	6864716	Issue Dt:	03/08/2005	Application #:	10457138	Filing Dt:	06/09/2003
Publication #:	US20040246023	Pub Dt:	12/09/2004
Title:	RECONFIGURABLE MEMORY ARCHITECTURE

Patent #:	6949446	Issue Dt:	09/27/2005	Application #:	10457942	Filing Dt:	06/09/2003
Title:	METHOD OF SHALLOW TRENCH ISOLATION FORMATION AND PLANARIZATION

Patent #:	6867480	Issue Dt:	03/15/2005	Application #:	10458130	Filing Dt:	06/10/2003
Publication #:	US20040251522	Pub Dt:	12/16/2004
Title:	ELECTROMAGNETIC INTERFERENCE PACKAGE PROTECTION

Patent #:	6737342	Issue Dt:	05/18/2004	Application #:	10458141	Filing Dt:	06/09/2003
Title:	COMPOSITE SPACER SCHEME WITH LOW OVERLAPPED PARASITIC CAPACITANCE

Patent #:	7015918	Issue Dt:	03/21/2006	Application #:	10458157	Filing Dt:	06/10/2003
Publication #:	US20040252127	Pub Dt:	12/16/2004
Title:	2-D LUMA AND CHROMA DMA OPTIMIZED FOR 4 MEMORY BANKS

Patent #:	6982891	Issue Dt:	01/03/2006	Application #:	10458409	Filing Dt:	06/10/2003
Publication #:	US20040252537	Pub Dt:	12/16/2004
Title:	RE-CONFIGURABLE CONTENT ADDRESSABLE/DUAL PORT MEMORY

Patent #:	7043708	Issue Dt:	05/09/2006	Application #:	10458547	Filing Dt:	06/09/2003
Publication #:	US20040250225	Pub Dt:	12/09/2004
Title:	INTELLIGENT CROSSTALK DELAY ESTIMATOR FOR INTEGRATED CIRCUIT DESIGN FLOW

Patent #:	6784698	Issue Dt:	08/31/2004	Application #:	10459058	Filing Dt:	06/11/2003
Title:	SENSE AMPLIFIER WITH IMPROVED COMMON MODE REJECTION

Patent #:	6806162	Issue Dt:	10/19/2004	Application #:	10459072	Filing Dt:	06/11/2003
Title:	METHOD FOR COMPOSING A DIELECTRIC LAYER WITHIN AN INTERCONNECT STRUCTURE OF A MULTILAYER SEMICONDUCTOR DEVICE

Patent #:	6871154	Issue Dt:	03/22/2005	Application #:	10459158	Filing Dt:	06/11/2003
Publication #:	US20040254755	Pub Dt:	12/16/2004
Title:	METHOD AND APPARATUS FOR AUTOMATICALLY CONFIGURING AND/OR INSERTING CHIP RESOURCES FOR MANUFACTURING TESTS

Patent #:	6805338	Issue Dt:	10/19/2004	Application #:	10461255	Filing Dt:	06/13/2003
Title:	SEMICONDUCTOR WAFER CHUCK ASSEMBLY FOR A SEMICONDUCTOR PROCESSING DEVICE

Patent #:	7539803	Issue Dt:	05/26/2009	Application #:	10461671	Filing Dt:	06/13/2003
Publication #:	US20040252078	Pub Dt:	12/16/2004
Title:	BI-DIRECTIONAL INTERFACE FOR LOW DATA RATE APPLICATION

Patent #:	7212573	Issue Dt:	05/01/2007	Application #:	10461780	Filing Dt:	06/13/2003
Publication #:	US20040252760	Pub Dt:	12/16/2004
Title:	METHOD AND/OR APPARATUS FOR DETERMINING MINIMUM POSITIVE REFERENCE INDICES FOR A DIRECT PREDICTION MODE

Patent #:	6710453	Issue Dt:	03/23/2004	Application #:	10462524	Filing Dt:	06/16/2003
Publication #:	US20030211641	Pub Dt:	11/13/2003
Title:	INTEGRATED CIRCUIT CONTAINING REDUNDANT CORE AND PERIPHERAL CONTACTS

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100

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Assignors

LSI CORPORATION

Exec Dt:

05/06/2014

AGERE SYSTEMS LLC

Exec Dt:

05/06/2014

Assignee

DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT

60 WALL STREET

NEW YORK, NEW YORK 10005

Correspondence name and address
	LATHAM & WATKINS LLP
	650 TOWN CENTER DRIVE, SUITE 2000
	COSTA MESA, CA 92626

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