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Reel/Frame:032856/0031   Pages: 443
Recorded: 05/08/2014
Attorney Dkt #:040981-0072
Conveyance: PATENT SECURITY AGREEMENT
Total properties: 11127
Page 74 of 112
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112
1
Patent #:
7839885
Issue Dt:
11/23/2010
Application #:
11113617
Filing Dt:
04/25/2005
Publication #:
US20060239262
Pub Dt:
10/26/2006
Title:
CONNECTION MEMORY FOR TRIBUTARY TIME-SPACE SWITCHES
2
Patent #:
7488614
Issue Dt:
02/10/2009
Application #:
11113782
Filing Dt:
04/25/2005
Publication #:
US20050196891
Pub Dt:
09/08/2005
Title:
PROVIDING A CHARGE DISSIPATION STRUCTURE FOR AN ELECTROSTATICALLY DRIVEN DEVICE
3
Patent #:
7577697
Issue Dt:
08/18/2009
Application #:
11114025
Filing Dt:
04/26/2005
Publication #:
US20060239340
Pub Dt:
10/26/2006
Title:
MEASUREMENT OF EQUALIZER SPAN ALIGNMENT WITH RESPECT TO CHANNEL CONDITION
4
Patent #:
7555688
Issue Dt:
06/30/2009
Application #:
11114583
Filing Dt:
04/26/2005
Publication #:
US20060242515
Pub Dt:
10/26/2006
Title:
METHOD FOR IMPLEMENTING TEST GENERATION FOR SYSTEMATIC SCAN RECONFIGURATION IN AN INTEGRATED CIRCUIT
5
Patent #:
7751484
Issue Dt:
07/06/2010
Application #:
11115463
Filing Dt:
04/27/2005
Publication #:
US20060244868
Pub Dt:
11/02/2006
Title:
METHOD FOR COMPOSITE VIDEO ARTIFACTS REDUCTION
6
Patent #:
7259586
Issue Dt:
08/21/2007
Application #:
11115561
Filing Dt:
04/27/2005
Publication #:
US20060244482
Pub Dt:
11/02/2006
Title:
CONFIGURABLE I/OS FOR MULTI-CHIP MODULES
7
Patent #:
7496168
Issue Dt:
02/24/2009
Application #:
11115671
Filing Dt:
04/27/2005
Publication #:
US20060245531
Pub Dt:
11/02/2006
Title:
PHASE-LOCKED LOOP USING MULTI-PHASE FEEDBACK SIGNALS
8
Patent #:
7539200
Issue Dt:
05/26/2009
Application #:
11115715
Filing Dt:
04/27/2005
Publication #:
US20060245453
Pub Dt:
11/02/2006
Title:
LINE-TIMING IN PACKET-BASED NETWORKS
9
Patent #:
7543261
Issue Dt:
06/02/2009
Application #:
11115798
Filing Dt:
04/27/2005
Publication #:
US20060248491
Pub Dt:
11/02/2006
Title:
I /O PLANNING WITH LOCK AND INSERTION FEATURES
10
Patent #:
7277813
Issue Dt:
10/02/2007
Application #:
11116591
Filing Dt:
04/28/2005
Publication #:
US20060190207
Pub Dt:
08/24/2006
Title:
PATTERN DETECTION FOR INTEGRATED CIRCUIT SUBSTRATES
11
Patent #:
7240264
Issue Dt:
07/03/2007
Application #:
11116616
Filing Dt:
04/28/2005
Publication #:
US20060248418
Pub Dt:
11/02/2006
Title:
SCAN TEST EXPANSION MODULE
12
Patent #:
7297606
Issue Dt:
11/20/2007
Application #:
11116903
Filing Dt:
04/28/2005
Publication #:
US20050191815
Pub Dt:
09/01/2005
Title:
METAL-OXIDE-SEMICONDUCTOR DEVICE INCLUDING A BURIED LIGHTLY-DOPED DRAIN REGION
13
Patent #:
7081841
Issue Dt:
07/25/2006
Application #:
11117682
Filing Dt:
04/28/2005
Title:
ANALOG TO DIGITAL CONVERTER BUILT IN SELF TEST
14
Patent #:
7587657
Issue Dt:
09/08/2009
Application #:
11119038
Filing Dt:
04/29/2005
Publication #:
US20060248435
Pub Dt:
11/02/2006
Title:
METHOD AND APPARATUS FOR ITERATIVE ERROR-ERASURE DECODING
15
Patent #:
7292063
Issue Dt:
11/06/2007
Application #:
11120067
Filing Dt:
05/02/2005
Publication #:
US20060279326
Pub Dt:
12/14/2006
Title:
METHOD OF INTERCONNECT FOR MULTI-SLOT METAL-MASK PROGRAMMABLE RELOCATABLE FUNCTION PLACED IN AN I/O REGION
16
Patent #:
7272756
Issue Dt:
09/18/2007
Application #:
11121152
Filing Dt:
05/03/2005
Publication #:
US20060253748
Pub Dt:
11/09/2006
Title:
EXPLOITIVE TEST PATTERN APPARATUS AND METHOD
17
Patent #:
7447965
Issue Dt:
11/04/2008
Application #:
11121164
Filing Dt:
05/03/2005
Publication #:
US20060253757
Pub Dt:
11/09/2006
Title:
OFFSET TEST PATTERN APPARATUS AND METHOD
18
Patent #:
7526705
Issue Dt:
04/28/2009
Application #:
11121191
Filing Dt:
05/03/2005
Publication #:
US20060253765
Pub Dt:
11/09/2006
Title:
ACKNOWLEDGEMENT MESSAGE MODIFICATION IN COMMUNICATION NETWORKS
19
Patent #:
7515876
Issue Dt:
04/07/2009
Application #:
11121323
Filing Dt:
05/03/2005
Publication #:
US20060251155
Pub Dt:
11/09/2006
Title:
RAKE RECEIVER WITH TIME-SHARED FINGERS
20
Patent #:
7366250
Issue Dt:
04/29/2008
Application #:
11122147
Filing Dt:
05/04/2005
Publication #:
US20060250943
Pub Dt:
11/09/2006
Title:
METHOD AND APPARATUS FOR IMPROVED EFFICIENCY IN AN EXTENDED MULTIPLE ANTENNA COMMUNICATION SYSTEM
21
Patent #:
7242240
Issue Dt:
07/10/2007
Application #:
11122417
Filing Dt:
05/05/2005
Publication #:
US20060250178
Pub Dt:
11/09/2006
Title:
LOW NOISE BANDGAP CIRCUIT
22
Patent #:
7852351
Issue Dt:
12/14/2010
Application #:
11122426
Filing Dt:
05/05/2005
Publication #:
US20050262532
Pub Dt:
11/24/2005
Title:
MULTIPLEXED BUTTON DATA SYSTEM
23
Patent #:
7461307
Issue Dt:
12/02/2008
Application #:
11123432
Filing Dt:
05/06/2005
Publication #:
US20060253753
Pub Dt:
11/09/2006
Title:
SYSTEM AND METHOD FOR IMPROVING TRANSITION DELAY FAULT COVERAGE IN DELAY FAULT TESTS THROUGH USE OF AN ENHANCED SCAN FLIP-FLOP
24
Patent #:
7834634
Issue Dt:
11/16/2010
Application #:
11123569
Filing Dt:
05/06/2005
Publication #:
US20060255812
Pub Dt:
11/16/2006
Title:
LOW-POWER SWITCH STATE DETECTION CIRCUIT AND METHOD AND MOBILE TELEPHONE DEVICE INCORPORATING THE SAME
25
Patent #:
7399648
Issue Dt:
07/15/2008
Application #:
11124307
Filing Dt:
05/06/2005
Publication #:
US20060253820
Pub Dt:
11/09/2006
Title:
METHODS AND APPARATUS FOR DETERMINING LOCATION-BASED ON-CHIP VARIATION FACTOR
26
Patent #:
7293210
Issue Dt:
11/06/2007
Application #:
11124438
Filing Dt:
05/06/2005
Publication #:
US20060253754
Pub Dt:
11/09/2006
Title:
SYSTEM AND METHOD FOR IMPROVING TRANSITION DELAY FAULT COVERAGE IN DELAY FAULT TESTS THROUGH USE OF TRANSITION LAUNCH FLIP-FLOP
27
Patent #:
7590819
Issue Dt:
09/15/2009
Application #:
11124536
Filing Dt:
05/09/2005
Publication #:
US20060253684
Pub Dt:
11/09/2006
Title:
COMPACT MEMORY MANAGEMENT UNIT
28
Patent #:
7461315
Issue Dt:
12/02/2008
Application #:
11124649
Filing Dt:
05/09/2005
Publication #:
US20060253751
Pub Dt:
11/09/2006
Title:
METHOD AND SYSTEM FOR IMPROVING QUALITY OF A CIRCUIT THROUGH NON-FUNCTIONAL TEST PATTERN IDENTIFICATION
29
Patent #:
7305646
Issue Dt:
12/04/2007
Application #:
11125307
Filing Dt:
05/09/2005
Publication #:
US20060253825
Pub Dt:
11/09/2006
Title:
RELOCATABLE MIXED-SIGNAL FUNCTIONS
30
Patent #:
7071704
Issue Dt:
07/04/2006
Application #:
11125860
Filing Dt:
05/10/2005
Title:
CIRCUIT FOR IMPROVED DIAGNOSABILITY OF DEFECTS IN A FUSE SCAN STRUCTURE
31
Patent #:
NONE
Issue Dt:
Application #:
11125863
Filing Dt:
05/10/2005
Publication #:
US20060258023
Pub Dt:
11/16/2006
Title:
Method and system for improving integrated circuit manufacturing yield
32
Patent #:
7272802
Issue Dt:
09/18/2007
Application #:
11126880
Filing Dt:
05/11/2005
Publication #:
US20060259892
Pub Dt:
11/16/2006
Title:
R-CELLS CONTAINING CDM CLAMPS
33
Patent #:
7509564
Issue Dt:
03/24/2009
Application #:
11129193
Filing Dt:
05/13/2005
Publication #:
US20050210353
Pub Dt:
09/22/2005
Title:
HIGH SPEED SYNDROME-BASED FEC ENCODER AND SYSTEM USING SAME
34
Patent #:
7373622
Issue Dt:
05/13/2008
Application #:
11129547
Filing Dt:
05/13/2005
Publication #:
US20060259841
Pub Dt:
11/16/2006
Title:
RELOCATABLE BUILT-IN SELF TEST (BIST) ELEMENTS FOR RELOCATABLE MIXED-SIGNAL ELEMENTS
35
Patent #:
7202722
Issue Dt:
04/10/2007
Application #:
11129996
Filing Dt:
05/16/2005
Publication #:
US20050253637
Pub Dt:
11/17/2005
Title:
DUTY-CYCLE CORRECTION CIRCUIT
36
Patent #:
8044437
Issue Dt:
10/25/2011
Application #:
11130350
Filing Dt:
05/16/2005
Title:
INTEGRATED CIRCUIT CELL ARCHITECTURE CONFIGURABLE FOR MEMORY OR LOGIC ELEMENTS
37
Patent #:
7427563
Issue Dt:
09/23/2008
Application #:
11131003
Filing Dt:
05/16/2005
Publication #:
US20050208758
Pub Dt:
09/22/2005
Title:
DIELECTRIC BARRIER FILMS FOR USE AS COPPER BARRIER LAYERS IN SEMICONDUCTOR TRENCH AND VIA STRUCTURES
38
Patent #:
7323768
Issue Dt:
01/29/2008
Application #:
11131705
Filing Dt:
05/18/2005
Publication #:
US20050224963
Pub Dt:
10/13/2005
Title:
VOLTAGE CONTRAST MONITOR FOR INTEGRATED CIRCUIT DEFECTS
39
Patent #:
7053639
Issue Dt:
05/30/2006
Application #:
11131885
Filing Dt:
05/18/2005
Title:
PROBING FIXTURE FOR SEMICONDUCTOR WAFER
40
Patent #:
7328386
Issue Dt:
02/05/2008
Application #:
11131990
Filing Dt:
05/18/2005
Publication #:
US20060282728
Pub Dt:
12/14/2006
Title:
METHODS FOR USING CHECKSUMS IN X-TOLERANT TEST RESPONSE COMPACTION IN SCAN-BASED TESTING OF INTEGRATED CIRCUITS
41
Patent #:
7354790
Issue Dt:
04/08/2008
Application #:
11132751
Filing Dt:
05/18/2005
Publication #:
US20060160269
Pub Dt:
07/20/2006
Title:
METHOD AND APPARATUS FOR AVOIDING DICING CHIP-OUTS IN INTEGRATED CIRCUIT DIE
42
Patent #:
7359690
Issue Dt:
04/15/2008
Application #:
11133538
Filing Dt:
05/20/2005
Publication #:
US20060264191
Pub Dt:
11/23/2006
Title:
SINGLE PATH FRONT END WITH DIGITAL AGC IN SDARS SYSTEM
43
Patent #:
7478354
Issue Dt:
01/13/2009
Application #:
11133815
Filing Dt:
05/20/2005
Publication #:
US20060263933
Pub Dt:
11/23/2006
Title:
USE OF CONFIGURABLE MIXED-SIGNAL BUILDING BLOCK FUNCTIONS TO ACCOMPLISH CUSTOM FUNCTIONS
44
Patent #:
7360178
Issue Dt:
04/15/2008
Application #:
11136180
Filing Dt:
05/24/2005
Publication #:
US20060271901
Pub Dt:
11/30/2006
Title:
MIXED-SIGNAL FUNCTIONS USING R-CELLS
45
Patent #:
7855969
Issue Dt:
12/21/2010
Application #:
11136236
Filing Dt:
05/24/2005
Publication #:
US20060268723
Pub Dt:
11/30/2006
Title:
SELECTIVE TEST POINT FOR HIGH SPEED SERDES CORES IN SEMICONDUCTOR DESIGN
46
Patent #:
NONE
Issue Dt:
Application #:
11136911
Filing Dt:
05/25/2005
Publication #:
US20060266446
Pub Dt:
11/30/2006
Title:
Whisker-free electronic structures
47
Patent #:
7132840
Issue Dt:
11/07/2006
Application #:
11138152
Filing Dt:
05/26/2005
Publication #:
US20060022689
Pub Dt:
02/02/2006
Title:
METHOD OF ELECTRICAL TESTING
48
Patent #:
7212048
Issue Dt:
05/01/2007
Application #:
11138703
Filing Dt:
05/26/2005
Publication #:
US20060267635
Pub Dt:
11/30/2006
Title:
MULTIPLE PHASE DETECTION FOR DELAY LOOPS
49
Patent #:
7236037
Issue Dt:
06/26/2007
Application #:
11138777
Filing Dt:
05/26/2005
Publication #:
US20060267660
Pub Dt:
11/30/2006
Title:
ALTERNATING CLOCK SIGNAL GENERATION FOR DELAY LOOPS
50
Patent #:
7106073
Issue Dt:
09/12/2006
Application #:
11140142
Filing Dt:
05/27/2005
Title:
METHOD AND SYSTEM FOR AREA EFFICIENT CHARGE-BASED CAPACITANCE MEASUREMENT
51
Patent #:
7630159
Issue Dt:
12/08/2009
Application #:
11140262
Filing Dt:
05/27/2005
Publication #:
US20060267582
Pub Dt:
11/30/2006
Title:
RESISTANCE MODE COMPARATOR FOR DETERMINING HEAD RESISTANCE
52
Patent #:
7746590
Issue Dt:
06/29/2010
Application #:
11140269
Filing Dt:
05/27/2005
Publication #:
US20060072231
Pub Dt:
04/06/2006
Title:
CURRENT MIRRORS HAVING FAST TURN-ON TIME
53
Patent #:
7742506
Issue Dt:
06/22/2010
Application #:
11140297
Filing Dt:
05/27/2005
Publication #:
US20060268915
Pub Dt:
11/30/2006
Title:
CONTROLLING TIMESLOT DELAY IN A DIGITAL COMMUNICATION SYSTEM
54
Patent #:
7340700
Issue Dt:
03/04/2008
Application #:
11140392
Filing Dt:
05/27/2005
Publication #:
US20060271904
Pub Dt:
11/30/2006
Title:
METHOD FOR ABSTRACTION OF MANUFACTURING TEST ACCESS AND CONTROL PORTS TO SUPPORT AUTOMATED RTL MANUFACTURING TEST INSERTION FLOW FOR REUSABLE MODULES
55
Patent #:
7830899
Issue Dt:
11/09/2010
Application #:
11140428
Filing Dt:
05/27/2005
Publication #:
US20060268730
Pub Dt:
11/30/2006
Title:
OBTAINING CHANNEL STATUS IN A NETWORK-BASED DATA TRANSPORT ARCHITECTURE
56
Patent #:
7528616
Issue Dt:
05/05/2009
Application #:
11140455
Filing Dt:
05/27/2005
Publication #:
US20060267615
Pub Dt:
11/30/2006
Title:
ZERO ATE INSERTION FORCE INTERPOSER DAUGHTER CARD
57
Patent #:
7457180
Issue Dt:
11/25/2008
Application #:
11140497
Filing Dt:
05/27/2005
Publication #:
US20060268641
Pub Dt:
11/30/2006
Title:
METHOD AND APPARATUS FOR STORING DATA IN A WRITE-ONCE NON-VOLATILE MEMORY
58
Patent #:
7334207
Issue Dt:
02/19/2008
Application #:
11140896
Filing Dt:
05/31/2005
Publication #:
US20060268486
Pub Dt:
11/30/2006
Title:
AUTOMATIC PLACEMENT BASED ESD PROTECTION INSERTION
59
Patent #:
7860174
Issue Dt:
12/28/2010
Application #:
11141271
Filing Dt:
05/31/2005
Publication #:
US20060269003
Pub Dt:
11/30/2006
Title:
METHOD AND APPARATUS FOR FREQUENCY DOMAIN COMPENSATION OF DC OFFSET IN AN ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING SYSTEM
60
Patent #:
7355451
Issue Dt:
04/08/2008
Application #:
11141337
Filing Dt:
05/31/2005
Publication #:
US20060017468
Pub Dt:
01/26/2006
Title:
COMMON-MODE SHIFTING CIRCUIT FOR CML BUFFERS
61
Patent #:
7352313
Issue Dt:
04/01/2008
Application #:
11141498
Filing Dt:
05/31/2005
Publication #:
US20060267824
Pub Dt:
11/30/2006
Title:
METHOD AND APPARATUS FOR MASTER/SLAVE DIGITAL-TO-ANALOG CONVERSION
62
Patent #:
7778377
Issue Dt:
08/17/2010
Application #:
11141695
Filing Dt:
05/31/2005
Publication #:
US20060268958
Pub Dt:
11/30/2006
Title:
METHODS AND APPARATUS FOR SPREAD SPECTRUM GENERATION USING A VOLTAGE CONTROLLED DELAY LOOP
63
Patent #:
7495494
Issue Dt:
02/24/2009
Application #:
11141703
Filing Dt:
05/31/2005
Publication #:
US20060267657
Pub Dt:
11/30/2006
Title:
PARALLEL TRIMMING METHOD AND APPARATUS FOR A VOLTAGE CONTROLLED DELAY LOOP
64
Patent #:
7801184
Issue Dt:
09/21/2010
Application #:
11141795
Filing Dt:
05/31/2005
Publication #:
US20060268941
Pub Dt:
11/30/2006
Title:
ADAPTIVE METHOD FOR TRAINING A SOURCE SYNCHRONOUS PARALLEL RECEIVER
65
Patent #:
7480821
Issue Dt:
01/20/2009
Application #:
11142562
Filing Dt:
05/31/2005
Publication #:
US20050223276
Pub Dt:
10/06/2005
Title:
METHOD FOR ENCODING/DECODING A BINARY SIGNAL STATE IN A FAULT TOLERANT ENVIRONMENT
66
Patent #:
7549074
Issue Dt:
06/16/2009
Application #:
11143370
Filing Dt:
06/02/2005
Publication #:
US20060273941
Pub Dt:
12/07/2006
Title:
CONTENT DESKEWING FOR MULTICHANNEL SYNCHRONIZATION
67
Patent #:
NONE
Issue Dt:
Application #:
11143911
Filing Dt:
06/02/2005
Publication #:
US20060274144
Pub Dt:
12/07/2006
Title:
Communications device with a visual ring signal and a method of generating a visual signal
68
Patent #:
7703006
Issue Dt:
04/20/2010
Application #:
11145262
Filing Dt:
06/02/2005
Publication #:
US20060277459
Pub Dt:
12/07/2006
Title:
SYSTEM AND METHOD OF ACCELERATING DOCUMENT PROCESSING
69
Patent #:
7542858
Issue Dt:
06/02/2009
Application #:
11145366
Filing Dt:
06/03/2005
Publication #:
US20060273800
Pub Dt:
12/07/2006
Title:
SIMULATED BATTERY LOGIC TESTING DEVICE
70
Patent #:
7328497
Issue Dt:
02/12/2008
Application #:
11146179
Filing Dt:
06/06/2005
Publication #:
US20050224450
Pub Dt:
10/13/2005
Title:
INCREMENTAL TUNING PROCESS FOR ELECTRICAL RESONATORS BASED ON MECHANICAL MOTION
71
Patent #:
8041394
Issue Dt:
10/18/2011
Application #:
11146511
Filing Dt:
06/07/2005
Publication #:
US20050227735
Pub Dt:
10/13/2005
Title:
METHODS AND SYSTEMS FOR TRANSMITTING AN INFORMATION SIGNAL IN A MULTIPLE ANTENNA COMMUNICATION SYSTEM
72
Patent #:
8260982
Issue Dt:
09/04/2012
Application #:
11147855
Filing Dt:
06/07/2005
Publication #:
US20060277329
Pub Dt:
12/07/2006
Title:
METHOD FOR REDUCING LATENCY
73
Patent #:
7380229
Issue Dt:
05/27/2008
Application #:
11151043
Filing Dt:
06/13/2005
Publication #:
US20060282808
Pub Dt:
12/14/2006
Title:
AUTOMATIC GENERATION OF CORRECT MINIMAL CLOCKING CONSTRAINTS FOR A SEMICONDUCTOR PRODUCT
74
Patent #:
7558160
Issue Dt:
07/07/2009
Application #:
11152554
Filing Dt:
06/14/2005
Publication #:
US20060280104
Pub Dt:
12/14/2006
Title:
DEMODULATION OF A FOCUSING ERROR SIGNAL DURING A FOCUS SEARCH FOR A LENS FOCUSING CONTROL IN AN OPTICAL DISC SYSTEM
75
Patent #:
7375570
Issue Dt:
05/20/2008
Application #:
11153879
Filing Dt:
06/15/2005
Publication #:
US20060284665
Pub Dt:
12/21/2006
Title:
HIGH-SPEED TDF TESTING ON LOW COST TESTERS USING ON-CHIP PULSE GENERATORS AND DUAL ATE REFERENCES FOR RAPIDCHIP AND ASIC DEVICES
76
Patent #:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Assignors
1
LSI CORPORATION
Exec Dt:
05/06/2014
2
AGERE SYSTEMS LLC
Exec Dt:
05/06/2014
Assignee
1
DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
60 WALL STREET
NEW YORK, NEW YORK 10005
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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