Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 032869/0333 | |
| Pages: | 4 |
| | Recorded: | 05/12/2014 | | |
| Attorney Dkt #: | 131727/1173-098 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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05/03/2016
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Application #:
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14256360
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Filing Dt:
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04/18/2014
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Publication #:
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Pub Dt:
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10/22/2015
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Title:
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CACHE MEMORY ERROR DETECTION CIRCUITS FOR DETECTING BIT FLIPS IN VALID INDICATORS IN CACHE MEMORY FOLLOWING INVALIDATE OPERATIONS, AND RELATED METHODS AND PROCESSOR-BASED SYSTEMS
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Assignee
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| 5775 MOREHOUSE DRIVE |
| SAN DIEGO, CALIFORNIA 92121 |
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Correspondence name and address
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W&T/QUALCOMM
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100 REGENCY FOREST DRIVE
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SUITE 160
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CARY, NC 27518
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