Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 033092/0054 | |
| Pages: | 12 |
| | Recorded: | 06/12/2014 | | |
Attorney Dkt #: | RA132.P2D1C1C1C.B11 +4 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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12/01/2009
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Application #:
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11368012
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Filing Dt:
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03/03/2006
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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LOW LATENCY MULTI-LEVEL COMMUNICATION INTERFACE
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Patent #:
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Issue Dt:
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10/05/2010
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Application #:
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12624365
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Filing Dt:
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11/23/2009
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Publication #:
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Pub Dt:
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06/03/2010
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Title:
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MULTIPHASE RECEIVER WITH EQUALIZATION
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Patent #:
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Issue Dt:
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06/12/2012
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Application #:
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12897661
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Filing Dt:
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10/04/2010
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Publication #:
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Pub Dt:
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06/16/2011
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Title:
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INTEGRATING RECEIVER WITH PRECHARGE CIRCUITRY
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13491508
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Filing Dt:
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06/07/2012
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Publication #:
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Pub Dt:
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01/10/2013
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Title:
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MULTIPHASE RECEIVER WITH EQUALIZATION CIRCUITRY
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Patent #:
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Issue Dt:
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01/10/2017
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Application #:
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14158675
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Filing Dt:
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01/17/2014
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Publication #:
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Pub Dt:
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09/25/2014
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Title:
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Multiphase Receiver with Equalization Circuitry
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Assignee
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1050 ENTERPRISE WAY, SUITE 700 |
SUNNYVALE, CALIFORNIA 94089 |
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Correspondence name and address
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TARISA WAIN
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1050 ENTERPRISE WAY #700
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SUNNYVALE, CA 94089
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