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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:033303/0124   Pages: 80
Recorded: 07/11/2014
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 414
Page 4 of 5
Pages: 1 2 3 4 5
1
Patent #:
8749021
Issue Dt:
06/10/2014
Application #:
11964015
Filing Dt:
12/25/2007
Publication #:
US20080150623
Pub Dt:
06/26/2008
Title:
VOLTAGE REGULATOR INTEGRATED WITH SEMICONDUCTOR CHIP
2
Patent #:
8158508
Issue Dt:
04/17/2012
Application #:
11981125
Filing Dt:
10/31/2007
Publication #:
US20080088019
Pub Dt:
04/17/2008
Title:
STRUCTURE AND MANUFACTURING METHOD OF A CHIP SCALE PACKAGE
3
Patent #:
7902679
Issue Dt:
03/08/2011
Application #:
11981138
Filing Dt:
10/31/2007
Publication #:
US20080067677
Pub Dt:
03/20/2008
Title:
A STRUCTURE AND MANUFACTURING METHOD OF A CHIP SCALE PACKAGE WITH LOW FABRICATION COST, FINE PITCH AND HIGH RELIABILITY SOLDER BUMP
4
Patent #:
8304907
Issue Dt:
11/06/2012
Application #:
12001676
Filing Dt:
12/12/2007
Publication #:
US20080121943
Pub Dt:
05/29/2008
Title:
TOP LAYERS OF METAL FOR INTEGRATED CIRCUITS
5
Patent #:
8018060
Issue Dt:
09/13/2011
Application #:
12014812
Filing Dt:
01/16/2008
Publication #:
US20080128910
Pub Dt:
06/05/2008
Title:
POST PASSIVATION INTERCONNECTION PROCESS AND STRUCTURES
6
Patent #:
7928576
Issue Dt:
04/19/2011
Application #:
12019635
Filing Dt:
01/25/2008
Publication #:
US20080116581
Pub Dt:
05/22/2008
Title:
POST PASSIVATION INTERCONNECTION SCHEMES ON TOP OF THE IC CHIPS
7
Patent #:
7498255
Issue Dt:
03/03/2009
Application #:
12019644
Filing Dt:
01/25/2008
Publication #:
US20080138978
Pub Dt:
06/12/2008
Title:
POST PASSIVATION INTERCONNECTION SCHEMES ON TOP OF THE IC CHIPS
8
Patent #:
8008776
Issue Dt:
08/30/2011
Application #:
12024998
Filing Dt:
02/02/2008
Publication #:
US20080142978
Pub Dt:
06/19/2008
Title:
CHIP STRUCTURE AND PROCESS FOR FORMING THE SAME
9
Patent #:
7919867
Issue Dt:
04/05/2011
Application #:
12024999
Filing Dt:
02/02/2008
Publication #:
US20080122099
Pub Dt:
05/29/2008
Title:
CHIP STRUCTURE AND PROCESS FOR FORMING THE SAME
10
Patent #:
7482259
Issue Dt:
01/27/2009
Application #:
12025000
Filing Dt:
02/02/2008
Publication #:
US20080146019
Pub Dt:
06/19/2008
Title:
CHIP STRUCTURE AND PROCESS FOR FORMING THE SAME
11
Patent #:
7915157
Issue Dt:
03/29/2011
Application #:
12025001
Filing Dt:
02/02/2008
Publication #:
US20080124918
Pub Dt:
05/29/2008
Title:
CHIP STRUCTURE AND PROCESS FOR FORMING THE SAME
12
Patent #:
7462558
Issue Dt:
12/09/2008
Application #:
12025002
Filing Dt:
02/02/2008
Publication #:
US20080146018
Pub Dt:
06/19/2008
Title:
METHOD FOR FABRICATING A CIRCUIT COMPONENT
13
Patent #:
7915734
Issue Dt:
03/29/2011
Application #:
12032706
Filing Dt:
02/18/2008
Publication #:
US20080142979
Pub Dt:
06/19/2008
Title:
CHIP STRUCTURE AND PROCESS FOR FORMING THE SAME
14
Patent #:
7906849
Issue Dt:
03/15/2011
Application #:
12032707
Filing Dt:
02/18/2008
Publication #:
US20080136034
Pub Dt:
06/12/2008
Title:
CHIP STRUCTURE AND PROCESS FOR FORMING THE SAME
15
Patent #:
8107311
Issue Dt:
01/31/2012
Application #:
12034668
Filing Dt:
02/21/2008
Publication #:
US20080143387
Pub Dt:
06/19/2008
Title:
SOFTWARE PROGRAMMABLE MULTIPLE FUNCTION INTEGRATED CIRCUIT MODULE
16
Patent #:
NONE
Issue Dt:
Application #:
12036306
Filing Dt:
02/25/2008
Publication #:
US20080142980
Pub Dt:
06/19/2008
Title:
Top layers of metal for high performance IC's
17
Patent #:
8022545
Issue Dt:
09/20/2011
Application #:
12036308
Filing Dt:
02/25/2008
Publication #:
US20080142981
Pub Dt:
06/19/2008
Title:
TOP LAYERS OF METAL FOR HIGH PERFORMANCE IC'S
18
Patent #:
NONE
Issue Dt:
Application #:
12036309
Filing Dt:
02/25/2008
Publication #:
US20080146020
Pub Dt:
06/19/2008
Title:
Top layers of metal for high performance IC's
19
Patent #:
8193636
Issue Dt:
06/05/2012
Application #:
12045029
Filing Dt:
03/10/2008
Publication #:
US20080284014
Pub Dt:
11/20/2008
Title:
CHIP ASSEMBLY WITH INTERCONNECTION BY METAL BUMP
20
Patent #:
8013448
Issue Dt:
09/06/2011
Application #:
12098465
Filing Dt:
04/07/2008
Publication #:
US20080185736
Pub Dt:
08/07/2008
Title:
MULTIPLE SELECTABLE FUNCTION INTEGRATED CIRCUIT MODULE
21
Patent #:
7535102
Issue Dt:
05/19/2009
Application #:
12098467
Filing Dt:
04/07/2008
Title:
HIGH PERFORMANCE SUB-SYSTEM DESIGN AND ASSEMBLY
22
Patent #:
NONE
Issue Dt:
Application #:
12098468
Filing Dt:
04/07/2008
Publication #:
US20080258305
Pub Dt:
10/23/2008
Title:
Low fabrication cost, fine pitch and high reliability solder bump
23
Patent #:
NONE
Issue Dt:
Application #:
12098469
Filing Dt:
04/07/2008
Publication #:
US20080188071
Pub Dt:
08/07/2008
Title:
Low fabrication cost, fine pitch and high reliability solder bump
24
Patent #:
7964961
Issue Dt:
06/21/2011
Application #:
12101127
Filing Dt:
04/10/2008
Publication #:
US20080251940
Pub Dt:
10/16/2008
Title:
CHIP PACKAGE
25
Patent #:
NONE
Issue Dt:
Application #:
12109367
Filing Dt:
04/25/2008
Publication #:
US20080241992
Pub Dt:
10/02/2008
Title:
Method of assembling chips
26
Patent #:
NONE
Issue Dt:
Application #:
12121778
Filing Dt:
05/15/2008
Publication #:
US20080211105
Pub Dt:
09/04/2008
Title:
Method of assembling chips
27
Patent #:
7855461
Issue Dt:
12/21/2010
Application #:
12127794
Filing Dt:
05/27/2008
Publication #:
US20080224326
Pub Dt:
09/18/2008
Title:
CHIP STRUCTURE WITH BUMPS AND TESTING PADS
28
Patent #:
8021921
Issue Dt:
09/20/2011
Application #:
12128644
Filing Dt:
05/29/2008
Publication #:
US20080227237
Pub Dt:
09/18/2008
Title:
METHOD OF JOINING CHIPS UTILIZING COPPER PILLAR
29
Patent #:
8004092
Issue Dt:
08/23/2011
Application #:
12132626
Filing Dt:
06/04/2008
Publication #:
US20080265413
Pub Dt:
10/30/2008
Title:
SEMICONDUCTOR CHIP WITH POST-PASSIVATION SCHEME FORMED OVER PASSIVATION LAYER
30
Patent #:
8890336
Issue Dt:
11/18/2014
Application #:
12132628
Filing Dt:
06/04/2008
Publication #:
US20080296761
Pub Dt:
12/04/2008
Title:
CYLINDRICAL BONDING STRUCTURE AND METHOD OF MANUFACTURE
31
Patent #:
8022546
Issue Dt:
09/20/2011
Application #:
12138453
Filing Dt:
06/13/2008
Publication #:
US20080246154
Pub Dt:
10/09/2008
Title:
TOP LAYERS OF METAL FOR HIGH PERFORMANCE IC'S
32
Patent #:
8035227
Issue Dt:
10/11/2011
Application #:
12138455
Filing Dt:
06/13/2008
Publication #:
US20090146307
Pub Dt:
06/11/2009
Title:
TOP LAYERS OF METAL FOR HIGH PERFORMANCE IC'S
33
Patent #:
8013449
Issue Dt:
09/06/2011
Application #:
12142825
Filing Dt:
06/20/2008
Publication #:
US20080251924
Pub Dt:
10/16/2008
Title:
POST PASSIVATION INTERCONNECTION SCHEMES ON TOP OF THE IC CHIPS
34
Patent #:
NONE
Issue Dt:
Application #:
12142829
Filing Dt:
06/20/2008
Publication #:
US20080251925
Pub Dt:
10/16/2008
Title:
TOP LAYERS OF METAL FOR INTEGRATED CIRCUITS
35
Patent #:
7898058
Issue Dt:
03/01/2011
Application #:
12172275
Filing Dt:
07/14/2008
Publication #:
US20080265401
Pub Dt:
10/30/2008
Title:
INTEGRATED CHIP PACKAGE STRUCTURE USING ORGANIC SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
36
Patent #:
8901733
Issue Dt:
12/02/2014
Application #:
12182145
Filing Dt:
07/30/2008
Publication #:
US20110291259
Pub Dt:
12/01/2011
Title:
RELIABLE METAL BUMPS ON TOP OF I/O PADS AFTER REMOVAL OF TEST PROBE MARKS
37
Patent #:
8120181
Issue Dt:
02/21/2012
Application #:
12182148
Filing Dt:
07/30/2008
Publication #:
US20080290520
Pub Dt:
11/27/2008
Title:
POST PASSIVATION INTERCONNECTION PROCESS AND STRUCTURES
38
Patent #:
NONE
Issue Dt:
Application #:
12186523
Filing Dt:
08/06/2008
Publication #:
US20090309225
Pub Dt:
12/17/2009
Title:
Top layers of metal for high performance IC's
39
Patent #:
8384189
Issue Dt:
02/26/2013
Application #:
12186530
Filing Dt:
08/06/2008
Publication #:
US20080284032
Pub Dt:
11/20/2008
Title:
HIGH PERFORMANCE SYSTEM-ON-CHIP USING POST PASSIVATION PROCESS
40
Patent #:
8030775
Issue Dt:
10/04/2011
Application #:
12198899
Filing Dt:
08/27/2008
Publication #:
US20090206486
Pub Dt:
08/20/2009
Title:
WIREBOND OVER POST PASSIVATION THICK METAL
41
Patent #:
NONE
Issue Dt:
Application #:
12202341
Filing Dt:
09/01/2008
Publication #:
US20080315424
Pub Dt:
12/25/2008
Title:
CHIP PACKAGE
42
Patent #:
7964973
Issue Dt:
06/21/2011
Application #:
12202342
Filing Dt:
09/01/2008
Publication #:
US20090108453
Pub Dt:
04/30/2009
Title:
CHIP STRUCTURE
43
Patent #:
7863654
Issue Dt:
01/04/2011
Application #:
12203154
Filing Dt:
09/03/2008
Publication #:
US20090045516
Pub Dt:
02/19/2009
Title:
TOP LAYERS OF METAL FOR HIGH PERFORMANCE IC'S
44
Patent #:
9018774
Issue Dt:
04/28/2015
Application #:
12206751
Filing Dt:
09/09/2008
Publication #:
US20090008778
Pub Dt:
01/08/2009
Title:
CHIP PACKAGE
45
Patent #:
8748227
Issue Dt:
06/10/2014
Application #:
12206754
Filing Dt:
09/09/2008
Publication #:
US20090011542
Pub Dt:
01/08/2009
Title:
METHOD OF FABRICATING CHIP PACKAGE
46
Patent #:
NONE
Issue Dt:
Application #:
12208353
Filing Dt:
09/11/2008
Publication #:
US20090001511
Pub Dt:
01/01/2009
Title:
High performance system-on-chip using post passivation process
47
Patent #:
NONE
Issue Dt:
Application #:
12260086
Filing Dt:
10/28/2008
Publication #:
US20090051027
Pub Dt:
02/26/2009
Title:
METHOD OF MANUFACTURE AND IDENTIFICATION OF SEMICONDUCTOR CHIP MARKED FOR IDENTIFICATION WITH INTERNAL MARKING INDICIA AND PROTECTION THEREOF BY NON-BLACK LAYER AND DEVICE PRODUCED THEREBY
48
Patent #:
8581404
Issue Dt:
11/12/2013
Application #:
12262195
Filing Dt:
10/31/2008
Publication #:
US20090057894
Pub Dt:
03/05/2009
Title:
STRUCTURE OF GOLD BUMPS AND GOLD CONDUCTORS ON ONE IC DIE AND METHODS OF MANUFACTURING THE STRUCTURES
49
Patent #:
8558383
Issue Dt:
10/15/2013
Application #:
12264271
Filing Dt:
11/04/2008
Publication #:
US20090057895
Pub Dt:
03/05/2009
Title:
POST PASSIVATION STRUCTURE FOR A SEMICONDUCTOR DEVICE AND PACKAGING PROCESS FOR SAME
50
Patent #:
7973401
Issue Dt:
07/05/2011
Application #:
12269045
Filing Dt:
11/12/2008
Publication #:
US20090057900
Pub Dt:
03/05/2009
Title:
STACKED CHIP PACKAGE WITH REDISTRIBUTION LINES
51
Patent #:
8148806
Issue Dt:
04/03/2012
Application #:
12269053
Filing Dt:
11/12/2008
Publication #:
US20090057919
Pub Dt:
03/05/2009
Title:
MULTIPLE CHIPS BONDED TO PACKAGING STRUCTURE WITH LOW NOISE AND MULTIPLE SELECTABLE FUNCTIONS
52
Patent #:
NONE
Issue Dt:
Application #:
12269054
Filing Dt:
11/12/2008
Publication #:
US20090056988
Pub Dt:
03/05/2009
Title:
Multiple chips bonded to packaging structure with low noise and multiple selectable functions
53
Patent #:
7919873
Issue Dt:
04/05/2011
Application #:
12269064
Filing Dt:
11/12/2008
Publication #:
US20090065937
Pub Dt:
03/12/2009
Title:
STRUCTURE OF HIGH PERFORMANCE COMBO CHIP AND PROCESSING METHOD
54
Patent #:
7960842
Issue Dt:
06/14/2011
Application #:
12269065
Filing Dt:
11/12/2008
Publication #:
US20090057901
Pub Dt:
03/05/2009
Title:
STRUCTURE OF HIGH PERFORMANCE COMBO CHIP AND PROCESSING METHOD
55
Patent #:
7919412
Issue Dt:
04/05/2011
Application #:
12273546
Filing Dt:
11/19/2008
Publication #:
US20090111261
Pub Dt:
04/30/2009
Title:
OVER-PASSIVATION PROCESS OF FORMING POLYMER LAYER OVER IC CHIP
56
Patent #:
7932172
Issue Dt:
04/26/2011
Application #:
12273548
Filing Dt:
11/19/2008
Publication #:
US20090065871
Pub Dt:
03/12/2009
Title:
SEMICONDUCTOR CHIP AND PROCESS FOR FORMING THE SAME
57
Patent #:
7985653
Issue Dt:
07/26/2011
Application #:
12276419
Filing Dt:
11/24/2008
Publication #:
US20090104769
Pub Dt:
04/23/2009
Title:
SEMICONDUCTOR CHIP WITH COIL ELEMENT OVER PASSIVATION LAYER
58
Patent #:
8044475
Issue Dt:
10/25/2011
Application #:
12353250
Filing Dt:
01/13/2009
Publication #:
US20090121302
Pub Dt:
05/14/2009
Title:
CHIP PACKAGE
59
Patent #:
7923848
Issue Dt:
04/12/2011
Application #:
12353251
Filing Dt:
01/13/2009
Publication #:
US20090134391
Pub Dt:
05/28/2009
Title:
HIGH PERFORMANCE SUB-SYSTEM DESIGN AND ASSEMBLY
60
Patent #:
7868463
Issue Dt:
01/11/2011
Application #:
12353252
Filing Dt:
01/13/2009
Publication #:
US20090114914
Pub Dt:
05/07/2009
Title:
HIGH PERFORMANCE SUB-SYSTEM DESIGN AND ASSEMBLY
61
Patent #:
7999381
Issue Dt:
08/16/2011
Application #:
12353254
Filing Dt:
01/13/2009
Publication #:
US20090121220
Pub Dt:
05/14/2009
Title:
HIGH PERFORMANCE SUB-SYSTEM DESIGN AND ASSEMBLY
62
Patent #:
7868454
Issue Dt:
01/11/2011
Application #:
12353255
Filing Dt:
01/13/2009
Publication #:
US20090121221
Pub Dt:
05/14/2009
Title:
HIGH PERFORMANCE SUB-SYSTEM DESIGN AND ASSEMBLY
63
Patent #:
NONE
Issue Dt:
Application #:
12365180
Filing Dt:
02/04/2009
Publication #:
US20090184394
Pub Dt:
07/23/2009
Title:
System-on-chip with post passivation capacitor
64
Patent #:
7880304
Issue Dt:
02/01/2011
Application #:
12370617
Filing Dt:
02/13/2009
Publication #:
US20090146305
Pub Dt:
06/11/2009
Title:
POST PASSIVATION INTERCONNECTION SCHEMES ON TOP OF THE IC CHIPS
65
Patent #:
NONE
Issue Dt:
Application #:
12384977
Filing Dt:
04/09/2009
Publication #:
US20090267213
Pub Dt:
10/29/2009
Title:
Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump
66
Patent #:
8242601
Issue Dt:
08/14/2012
Application #:
12464896
Filing Dt:
05/13/2009
Publication #:
US20090218687
Pub Dt:
09/03/2009
Title:
SEMICONDUCTOR CHIP WITH PASSIVATION LAYER COMPRISING METAL INTERCONNECT AND CONTACT PADS
67
Patent #:
8072070
Issue Dt:
12/06/2011
Application #:
12493258
Filing Dt:
06/29/2009
Publication #:
US20090261473
Pub Dt:
10/22/2009
Title:
LOW FABRICATION COST, FINE PITCH AND HIGH RELIABILITY SOLDER BUMP
68
Patent #:
9391021
Issue Dt:
07/12/2016
Application #:
12506278
Filing Dt:
07/21/2009
Publication #:
US20100013082
Pub Dt:
01/21/2010
Title:
CHIP PACKAGE AND METHOD FOR FABRICATING THE SAME
69
Patent #:
8426982
Issue Dt:
04/23/2013
Application #:
12512073
Filing Dt:
07/30/2009
Publication #:
US20090289346
Pub Dt:
11/26/2009
Title:
Structure and manufacturing method of chip scale package
70
Patent #:
8168527
Issue Dt:
05/01/2012
Application #:
12534885
Filing Dt:
08/04/2009
Publication #:
US20090291554
Pub Dt:
11/26/2009
Title:
SEMICONDUCTOR CHIP AND METHOD FOR FABRICATING THE SAME
71
Patent #:
8884433
Issue Dt:
11/11/2014
Application #:
12545880
Filing Dt:
08/24/2009
Publication #:
US20090309224
Pub Dt:
12/17/2009
Title:
CIRCUITRY COMPONENT AND METHOD FOR FORMING THE SAME
72
Patent #:
NONE
Issue Dt:
Application #:
12645361
Filing Dt:
12/22/2009
Publication #:
US20100165585
Pub Dt:
07/01/2010
Title:
CHIP PACKAGES WITH POWER MANAGEMENT INTEGRATED CIRCUITS AND RELATED TECHNIQUES
73
Patent #:
8350386
Issue Dt:
01/08/2013
Application #:
12691597
Filing Dt:
01/21/2010
Publication #:
US20100117236
Pub Dt:
05/13/2010
Title:
TOP LAYERS OF METAL FOR HIGH PERFORMANCE IC'S
74
Patent #:
8193555
Issue Dt:
06/05/2012
Application #:
12703139
Filing Dt:
02/09/2010
Publication #:
US20100200898
Pub Dt:
08/12/2010
Title:
IMAGE AND LIGHT SENSOR CHIP PACKAGES
75
Patent #:
8456856
Issue Dt:
06/04/2013
Application #:
12722483
Filing Dt:
03/11/2010
Publication #:
US20100246152
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT CHIP USING TOP POST-PASSIVATION TECHNOLOGY AND BOTTOM STRUCTURE TECHNOLOGY
76
Patent #:
8159070
Issue Dt:
04/17/2012
Application #:
12748295
Filing Dt:
03/26/2010
Publication #:
US20100244263
Pub Dt:
09/30/2010
Title:
CHIP PACKAGES
77
Patent #:
8164171
Issue Dt:
04/24/2012
Application #:
12779863
Filing Dt:
05/13/2010
Publication #:
US20100290191
Pub Dt:
11/18/2010
Title:
SYSTEM-IN PACKAGES
78
Patent #:
8503186
Issue Dt:
08/06/2013
Application #:
12841981
Filing Dt:
07/22/2010
Publication #:
US20110026232
Pub Dt:
02/03/2011
Title:
SYSTEM-IN PACKAGES
79
Patent #:
NONE
Issue Dt:
Application #:
12852467
Filing Dt:
08/07/2010
Publication #:
US20110024905
Pub Dt:
02/03/2011
Title:
STRUCTURE AND MANUFACTURING METHOD OF A CHIP SCALE PACKAGE WITH LOW FABRICATION COST, FINE PITCH AND HIGH RELIABILITY SOLDER BUMP
80
Patent #:
NONE
Issue Dt:
Application #:
12852470
Filing Dt:
08/07/2010
Publication #:
US20110024902
Pub Dt:
02/03/2011
Title:
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03/03/2011
Title:
CHIP STRUCTURE WITH BUMPS AND TESTING PADS
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SEMICONDUCTOR CHIP WITH COIL ELEMENT OVER PASSIVATION LAYER
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SEMICONDUCTOR PACKAGE WITH INTERCONNECT LAYERS
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Pub Dt:
11/24/2011
Title:
MULTIPLE SELECTABLE FUNCTION INTEGRATED CIRCUIT MODULE
Assignor
1
MEGIT ACQUISITION CORP.
Exec Dt:
07/09/2014
Assignee
1
QUALCOMM INCORPORATED
5775 MOREHOUSE DRIVE
SAN DIEGO, CALIFORNIA 92121
Correspondence name and address
QUALCOMM INCORPORATED
5775 MOREHOUSE DRIVE
SAN DIEGO, CA 92121

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